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ols: combine demux samples 

demux mode allows DDR sampling which disables group 2 & 3
and thus samples group 0 & 1 to sample on rising and falling of
the clock.

Signed-off-by: Matt Ranostay <mranostay@gmail.com>
This commit is contained in:
Matt Ranostay 2013-08-27 22:17:05 -07:00 committed by Bert Vermeulen
parent 7b0a57fd1c
commit f51acd69d7
1 changed files with 13 additions and 3 deletions
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16
hardware/openbench-logic-sniffer/protocol.c
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@ -341,7 +341,7 @@ SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data)
GSList *l; GSList *l;
uint32_t sample; uint32_t sample;
int num_channels, offset, j; int num_channels, offset, j;
unsigned int i; unsigned int i, max_channels;
unsigned char byte; unsigned char byte;
drvc = di->priv; drvc = di->priv;
@ -379,9 +379,16 @@ SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data)
} }
num_channels = 0; num_channels = 0;
for (i = 0x20; i > 0x02; i /= 2) { max_channels = NUM_PROBES / (devc->flag_reg & FLAG_DEMUX ? 2 : 1);
if ((devc->flag_reg & i) == 0)
for (i = NUM_PROBES; i > 0x02; i /= 2) {
if ((devc->flag_reg & i) == 0) {
if (i >= max_channels) {
sr_err("Channels over the limit of %d\n", max_channels);
return FALSE;
}
num_channels++; num_channels++;
}
} }
if (revents == G_IO_IN && devc->num_samples < devc->limit_samples) { if (revents == G_IO_IN && devc->num_samples < devc->limit_samples) {
@ -442,6 +449,9 @@ SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data)
* sample. * sample.
*/ */
devc->tmp_sample[i] = devc->sample[j++]; devc->tmp_sample[i] = devc->sample[j++];
} else if (devc->flag_reg & FLAG_DEMUX && (i > 2)) {
/* group 3 & 4 get added to 1 & 2 */
devc->tmp_sample[i - 2] = devc->sample[j++];
} }
} }
memcpy(devc->sample, devc->tmp_sample, 4); memcpy(devc->sample, devc->tmp_sample, 4);