Commit Graph

4464 Commits

Author SHA1 Message Date
Gerhard Sittig 7f4c3a6224 input/csv: Accept absence of last end-of-line termination sequence
On the Windows platform it appears to be popular to _not_ terminate the
very last line in a text file. Which results in an unmet constraint in
the CSV input module and an internal exception in PulseView which aborts
program execution.

Cope with the absence of the text line termination sequence at the very
end of the input stream. Keep all other checks in place, such that only
completely received text lines get processed.

This fixes bug #635.
2017-06-06 23:28:09 +02:00
Gerhard Sittig 4439363aa0 input/csv: Skip leading UTF-8 BOM in the input stream
This fixes bug #756.
2017-06-06 23:28:05 +02:00
Gerhard Sittig ccff468b5e input/csv: Add developer comment with TODO items
"Document" the current state of the implementation in the CSV input
module's source code. Discuss how text handling is non-trivial, which
approaches are available and how they have drawbacks.

Mention the lack of support for the import of analog data as well.
2017-06-06 23:28:05 +02:00
Gerhard Sittig 241c386a4f input/csv: Correctly skip over last processed end-of-line sequence
The CSV input module supports variable length end-of-line encodings
(either CRLF, or CR, or LF). When a bunch of accumulated text lines got
processed, do skip the corresponding number of characters after the end
of the last processed line.

This fixes one of the issues discussed in bug #635.
2017-06-06 23:28:00 +02:00
Gerhard Sittig 4555d3bda0 input/csv: Fix a false negative after successful import
The input module runs receive() and end() invocations which end up
calling process_buffer(). It's perfectly legal to call the process
routine with an empty accumulation buffer, especially when the process
routine was called from end().

This fixes a condition where PulseView raised a fatal error at the end
of a completed successful import.

Reported-By: Sergey Alirzaev <zl29ah@gmail.com>
2017-06-06 23:27:52 +02:00
Gerhard Sittig f9b7486154 input/csv: Re-order processing steps (column mode vs text line split)
Move an independent test for single/multi column operation out of a code
path that checked for and then processed text lines. This commit does
not change behaviour, but prepares a subsequent commit.
2017-06-06 19:00:14 +02:00
Gerhard Sittig 492dfa9025 input/csv: Concentrate text line encoding in a single spot
Factor out a magic string literal which held a delimiter set yet could
be mistaken for an (assumed) fixed termination string. Concentrate the
determination of the end-of-line text encoding as well as the resulting
set of possible deliminters in one nearby location. The symbolic name
for the delimiter set eliminates the doubt on its purpose.
2017-06-06 19:00:14 +02:00
Gerhard Sittig df0db9fdda input/csv: Improve readability (bool expr vs assign, nested arrays)
Move variable assignments out of boolean condition checks. Factor out
repeated access to nested arrays. This shall improve readability.
2017-06-06 19:00:14 +02:00
Uwe Hermann b4698e4d61 HACKING: Update URL to Linux kernel coding style. 2017-06-06 14:41:55 +02:00
Uwe Hermann 176d785d33 Drop trailing whitespace in various files. 2017-06-06 14:10:02 +02:00
Uwe Hermann faf6dc4633 Minor cosmetics. 2017-06-06 12:17:44 +02:00
Uwe Hermann 09b2ca47e6 uninstall: Remove empty libsigrok/libsigrokcxx include directories.
Change uninstall-local to uninstall-hook, since the latter is guaranteed
to run last (order is apparently not guaranteed for uninstall-local).

This fixes bug #861.
2017-06-03 18:39:35 +02:00
Soeren Apel 77463bd397 Demo: Convert white spaces to dashes for walking one/zero pattern 2017-05-28 14:19:22 +02:00
Soeren Apel c5d081f721 Bindings: Provide helper method that auto-converts analog 2017-05-27 22:37:28 +02:00
Soeren Apel 0cee3a3ea5 Bindings: Flesh out the analog payload bindings 2017-05-27 22:37:28 +02:00
Soeren Apel 845060fa9d Demo: Add walking one/walking zero pattern 2017-05-27 19:39:54 +02:00
Gerhard Sittig eac48b3491 asix-sigma: Silence a compiler warning (declared but not used)
The call site which referenced the variable was conditional (disabled
trigger support) but the variable declaration was not. Fix that.
2017-05-26 22:48:40 +02:00
Gerhard Sittig 2f425a56ed asix-sigma: Use monotonic time not wallclock time
Switch from gettimeofday() to g_get_monotonic_time() calls.

This commit is based on work done by jry@ (but with reduced diff size).
2017-05-26 22:48:39 +02:00
Gerhard Sittig 74d453abfd asix-sigma: Handle sample memory wrap around (circular buffer)
Handle the case when the sample data memory was filled and has wrapped
around during acquisition. Download the respective part of the data
which is reliably available, only skipping a single 1KB row which might
contain either old or new data while it's not certain which it would be.

This will be essential when triggers later become available. Right now
it copes with user requests for sample counts that exceed the total DRAM
capacity. Instead the maximum available amount of data is provided.

Of course acquisition no longer gets stopped when the end of DRAM is
reached.
2017-05-26 22:48:39 +02:00
Gerhard Sittig 547c4cdc60 asix-sigma: Fixup the download of the last data acquisition chunk
Correctly determine the size of a download chunk for the last DRAM row
that's involved in the recent data acquisition.

This commit is based on work done by jry@.

This addresses bug #838 (trailing garbage).

It's assumed that the previously downloaded excess data was "swallowed"
by the sample count enforcement logic that was applied earlier, so the
(remainder of the) issue could have gone unnoticed, unless some other
termination condition than sample count was used.
2017-05-26 22:48:36 +02:00
Gerhard Sittig 468f17f2d6 asix-sigma: Comment on RLE decompression upon data retrieval
Rephrase and shorten a comment on how RLE decompression works. Drop the
part of the comment which is not related to (de-)compression.
2017-05-26 22:48:35 +02:00
Gerhard Sittig 13262b48c1 asix-sigma: Remove an unused variable 2017-05-26 22:48:33 +02:00
Gerhard Sittig 8256ed15c6 asix-sigma: Adjust clock configuration upon acquisition start
Configure the samplerate clock and channel count during acquisition
start in identical ways for 50MHz, 100MHz, and 200MHz modes.

This part was inspired by work done by jry@ yet was addressed in
different ways (no exception, do everything in every mode the same way).

Eliminate a portability issue in the previous implementation. Make sure
to send the configuration bytes in the correct order to the hardware.
Don't typecase a struct reference to a bytepointer and hope that the
internal memory representation might fit the external hardware's idea.
2017-05-26 22:48:32 +02:00
Gerhard Sittig 5b1d15efb9 asix-sigma: Document the sample memory layout
Add a comment about sample memory organization in a central spot. This
concentrates knowledge which otherwise would be spread across several
locations all over the driver's codebase, yet is essential to have at
hand during maintenance.

All of the information was determined/updated by jry@ with the help of
Ondrej at Asix when he did lots of fixes and improvements to asix-sigma.
2017-05-26 22:48:30 +02:00
Gerhard Sittig 735ed8a18e asix-sigma: Enforce optionally specified sample count
The Asix Sigma hardware does not support a sample count limit. Instead
this optional input parameter gets mapped to a sample time, and some
slack for hardware pipelines and compression gets added. When data
acquisition completes and sample data gets downloaded, chances are that
there is more data than requested by the user.

Do enforce the optional sample count limit. Stop sending data to the
sigrok session when the configured number of samples was sent.

This commit is based on work done by jry@.

This fixes bug #838.
2017-05-26 22:48:27 +02:00
Gerhard Sittig 22f64ed88c asix-sigma: Acquisition stop, symbolic identifiers for mode register fields
Enhance how the data acquisition is stopped. Wait for the hardware to
flag the successful completion of data retrieval as well as flushing
through hardware pipelines.

Use symbolic identifiers for the mode register's fields (for read as
well as write access).

This commit uses part of a code update to better match the documentation
done by jry@, but not all of it to reduce the size of the commit.
2017-05-26 22:48:24 +02:00
Gerhard Sittig f06fb3e9f1 asix-sigma: Nit, separate declaration from assignment statements
Minor adjustment for improved readability. Don't hide assignments in
variable declarations. Move initialization of some variables closer to
related evaluation or subsequent processing. Break a complicated looking
roundup expression into several short steps.
2017-05-26 22:48:22 +02:00
Gerhard Sittig 84a6ed1a12 asix-sigma: Fix a register addressing bug (non-issue)
Fix how the READ_ID register index was passed to the hardware access.
Addresses are sent in nibbles, so shift by eight is wrong here. No harm
was done, as the register's index is zero.
2017-05-26 22:48:21 +02:00
Gerhard Sittig a9016883f8 asix-sigma: Only download firmware when necessary
The Asix Sigma driver is aware of three firmware images, which are
required for acquisition with up to 50MHz, 100MHz, and 200MHz. The
previous implementation always downloaded the corresponding firmware
image whenever the sample rate has changed, which was redundant.

Skip the download when the new samplerate uses the same firmware as the
previously selected samplerate did. This results in faster responses in
the GUI when the samplerate selection changes.

Move assignments out of the variable declaration block for improved
readability while we are here.
2017-05-26 22:48:18 +02:00
Gerhard Sittig 85c032e485 asix-sigma: Properly decode data gathered at 100 and 200 MHz
The hardware provides captured data at a maximum rate of 16bits per 20ns
(50 MHz). For samplerates of 100 and 200 MHz one individual 16bit entity
contains multiple samples for a reduced number of channels. The bits of
several sample points are interleaved within the 16bit entity.

This commit is based on work done by jry@ who fixed a lot of issues with
the help from Ondrej at Asix.

This fixes bug #840.
2017-05-26 22:48:13 +02:00
Gerhard Sittig 3281cf59aa asix-sigma: Stabilize channel assignment for different samplerates
Adjust the interpretation of acquired sample data such that regardless
of 50/100/200MHz samplerate the assignment of LA pins to sigrok channels
remains stable.
2017-05-26 22:48:11 +02:00
Gerhard Sittig 0498f7439f asix-sigma: Factor out access to sample data and session data
Introduce helper routines to access the sample data that is provided by
the ASIX hardware, as well as the buffer which accumulates logic data
before it gets sent to the session's datafeed.

This hides endianess issues from call sites, and prepares access to
memory layout which varies with sample frequencies.

This commit is based on work done by jry@.
2017-05-26 22:48:08 +02:00
Gerhard Sittig de3f7acb4d asix-sigma: Disable support for triggers, they don't work right now
This works around bug #359. Triggers currently are not operational for
Asix Sigma. Don't claim support in the driver so that UIs won't use the
feature. Yet allow research in this issue, by concentrating the switch
for the feature's support in a central location.

Add/update a comment and unobfuscate an error code path while we are here.
2017-05-26 22:48:02 +02:00
Gerhard Sittig e686119cc2 asix-sigma: Nit, remove redundant USB VID/PID declaration
Both the .c and the .h file declared the same identifiers for USB
properties of ASIX hardware with identical values. Remove the .c
incarnation and keep the .h content, as the names are used in api.c
as well as protocol.c sources.
2017-05-26 22:48:01 +02:00
Gerhard Sittig 9a0a606a82 asix-sigma: Improve sample time estimation, consider hardware pipeline
Introduce a separate routine which maps sample counts and sample period
to an elapsed sample time after which acquisition shall get stopped.
Add some more time to make sure the most recent captured data has passed
the hardware pipeline and is available for download.

This commit is based on work done by jry@.
2017-05-26 22:47:59 +02:00
Gerhard Sittig a44b3b3f16 asix-sigma: Fixed RLE decoder
When "tsdiff < EVENTS_PER_CLUSTER" we don't want "tsdiff - EVENTS_PER_CLUSTER"
(a negative number) to be treated as (int).

Submitted-By: jry <jrysig@gmail.com>
[ gsi: massaged for mainline submission ]
2017-05-26 22:47:45 +02:00
Uwe Hermann 42be2adb5a Add APIs to query libsigrok build information. 2017-05-26 18:00:58 +02:00
Uwe Hermann 9d12555fba serial-dmm: Use a custom dummy struct for m2110.
This DMM/parser is not related to metex14, don't use that struct.
2017-05-24 19:04:17 +02:00
Uwe Hermann decc199654 uni-t-dmm: Fix incorrect Tenma 72-7745 list entry.
This is a regression from f05406117d.
2017-05-24 01:34:06 +02:00
Uwe Hermann 06f0872ea9 uni-t-dmm: Add missing special cases for some ES519xx protocols. 2017-05-24 01:29:28 +02:00
Angus Gratton 8a68f96eae fx2lafw: Always enable wide sampling for dslogic firmware
Fixes regression in 8399f68a3.

Ref: https://sourceforge.net/p/sigrok/mailman/message/35780588/

Signed-off-by: Angus Gratton <gus@projectgus.com>
2017-05-23 20:00:57 +02:00
Uwe Hermann 45fcaf2cca ut71x: Fix incorrect resistance values on some DMMs.
The resistance values of some DMMs were incorrectly reported due to a
missing factor of 10 in the calculations.

Tested on Voltcraft VC-920/VC-940 and Tenma 72-9380A/72-7730/72-7732.
2017-05-23 19:38:19 +02:00
Uwe Hermann 7db9027985 demo: Retain the default of 8 digital channels for now. 2017-05-21 18:35:21 +02:00
Gerhard Sittig b1e6eec6f5 demo: support up to 128 logic channels, enable the lower 8 by default
Bump the number of supported logic channels from 8 to 128. This is
mostly motivated to test the 64 channels limit which some of the
components/subprojects of the sigrok project might have (input/output
modules, user interfaces).

Only automatically enable the first 8 of the 128 total logic channels,
i.e. default to the previous behaviour. Prepare to only enable part of
the set of analog channels, but stick with their being active by default
as well.

Factor out the choice for the default logic pattern, too. This allows
for easier adjustment of the default configuration, when settings are
concentrated in a single spot.
2017-05-21 18:35:01 +02:00
Gerhard Sittig 81d53a29d6 demo: add "cable squid" logic waveform (works-with logo, many channels)
Extend the demo driver, add another waveform choice for logic channels.
Create a "cable squid" logo representation which occupies a large number
of channels.

This pattern occupies 128x128 pixels. Unlike the 'sigrok' pattern it
gets repeated when more channels are involved, but is not shifted in the
repetition.
2017-05-21 18:35:01 +02:00
Uwe Hermann 2b17aeb874 ut71x: Fix float printing issue in a debug message.
Old:
ut71x: Applying exponent -12, new value is 0.000000.
P1: 1.500 nF AUTO
P1: 1.500 nF AUTO

New:
ut71x: Applying exponent -12, new value is 1.5e-09.
P1: 1.500 nF AUTO
P1: 1.500 nF AUTO

This fixes bug #700.
2017-05-21 18:17:58 +02:00
Soeren Apel 16a1d50a63 Virtual session: Workaround for SR_CONF_CAPTUREFILE (#944)
This is a (hopefully temporary) workaround for the
SR_CONF_CAPTUREFILE mechanism. The value for
vdev->capturefile is set by this, however only once
via stream_session_data().
During stream processing in stream_session_data(),
capturefile may receive new values - e.g. when there
are multiple logic files or if there is analog data.
With that, the initially set capturefile is overwritten.

When re-loading the file, we are then running into
issues because we don't know what the initial value was.
As all .sr files use "logic-1" by default and, we
simulate the behavior of stream_session_data() and
assign this name to capturefile if there are logic
channels present.

With this change, all three kinds of files reload
as expected: logic only, analog only and mixed signal.
For this reason, it's a short-term fix for #944.
2017-05-21 17:10:38 +02:00
Soeren Apel 6fb5570b15 Virtual session: rename num_channels to num_logic_channels 2017-05-21 17:10:16 +02:00
Uwe Hermann 64f628bf8a hantek-6xxx: Only list DC coupling once.
Avoid incorrect indexing and the follow-up segfault.

This fixes bug #822.
2017-05-17 01:46:50 +02:00
Martin Ling 01dd7a4cc7 rigol-ds: Handle digital channels correctly for MSO2000A series.
The handling of the digital channels for this series is somewhere
between that of the DS1000D series (PROTOCOL_V2) and the MSO1000Z
(PROTOCOL_V4).

The :LA command set is similar to that of V4, but the LA data has to be
requested with :WAV:SOUR:LA and arrives in interleaved form like V2.

None of these changes should affect other models. They only affect the
case of PROTOCOL_V3 with digital channels, which occurs only for the
MSO2000A series.
2017-05-17 00:20:29 +01:00