d27e406e13
sr: new output format 'float', just floating point values
...
Also outputs FRAME-BEGIN and FRAME-END, if present in the stream.
2012-06-19 02:05:28 +02:00
c73d2ea421
sr: adjust copyright year
2012-02-13 14:31:51 +01:00
7c1d391c8b
sr: input/output: Mark more symbols with SR_PRIV.
2012-02-05 15:05:13 +01:00
1a081ca67d
sr: Mark API functions with SR_API/SR_PRIV.
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Use SR_API to mark public API symbols, and SR_PRIV for private symbols.
Variables and functions marked 'static' are private already and don't
need SR_PRIV. However, functions which are not static (because they need
to be used in other libsigrok-internal files) but are also not meant to
be part of the public libsigrok API, must use SR_PRIV.
This uses the 'visibility' feature of gcc (requires gcc >= 4.0).
Details: http://gcc.gnu.org/wiki/Visibility
2012-02-02 00:03:17 +01:00
cd315a80d8
sr/srd: Fix left-over #includes.
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The libs themselves should use #include "sigrok.h" etc., while the
frontends must use #include <sigrok.h> and so on.
2012-01-03 19:56:01 +01:00
02604ed6de
Initial support for CSV as output format.
2011-04-27 00:25:57 +02:00
8c48f17944
Add chronovu-la8 output file format.
2011-04-10 23:59:38 +02:00
77b454421a
Disable analog bits/gnuplot output for now.
2011-02-20 21:16:20 +01:00
f50f3f40d9
Add sr_ prefix to input/output structs.
2011-01-30 18:32:54 +01:00
81bbdf6a6a
add incomplete DF_ANALOG support to output_gnuplot.c
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RAW->Voltage conversion is not implemented yet, its hardcoded for
signed 16bit conversion.
2011-01-21 16:11:44 -02:00
6eb0e3ea95
change output_text.c to support analog
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Only the "bits" output format was converted.
Analog values, are scaled down to A-Z letters.
2011-01-21 02:12:48 -02:00
d4f228d094
output_text: Add ASCII output.
2011-01-17 22:56:14 +01:00
ab224f7b61
Initial support for the OLS output format.
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This is the file format for the OpenBench Logic Sniffer "Alternative" client.
Details: https://github.com/jawi/ols/wiki/OLS-data-file-format
This is work-in-progress.
Currently the number of samples is hardcoded to 10000. Also, this will
require a real logic analyzer as input at the moment, and will not yet
work with the "demo" driver.
2011-01-15 19:05:14 +01:00
1437e8934b
add DF_ANALOG, and an analog output module
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Samples in DF_ANALOG packets are fixed in length to sizeof(double).
2011-01-10 05:13:46 +01:00
408e719989
Refactoring and code simplifications.
2010-04-15 23:21:30 +02:00
02076d69f9
Rename "bin" output module to "bits" everywhere.
2010-04-12 23:21:12 +02:00
1c5b9d302c
Add raw binary output format.
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Also, rename the "bin" format to "bits" for now to avoid confusion.
2010-04-12 21:22:58 +02:00
e2ad47b5b0
Gnuplot output format support.
2010-04-06 16:54:37 +02:00
4c9ffa83cf
Initial Value Change Dump (VCD) output support.
2010-04-04 13:19:20 +02:00
a1bb33afbd
Start of code base layout restructuring.
2010-04-02 20:27:54 +02:00
Bert Vermeulen
Uwe Hermann
Daniel Ribeiro
Håvard Espeland