Bump the number of supported logic channels from 8 to 128. This is
mostly motivated to test the 64 channels limit which some of the
components/subprojects of the sigrok project might have (input/output
modules, user interfaces).
Only automatically enable the first 8 of the 128 total logic channels,
i.e. default to the previous behaviour. Prepare to only enable part of
the set of analog channels, but stick with their being active by default
as well.
Factor out the choice for the default logic pattern, too. This allows
for easier adjustment of the default configuration, when settings are
concentrated in a single spot.
Extend the demo driver, add another waveform choice for logic channels.
Create a "cable squid" logo representation which occupies a large number
of channels.
This pattern occupies 128x128 pixels. Unlike the 'sigrok' pattern it
gets repeated when more channels are involved, but is not shifted in the
repetition.
devc->step is not reset on acquistion start, so acquisition
starts with a different value every time. Thats annoying when
using the demo driver to debug sigrok, so lets make sure that
it's reset to 0.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Soeren Apel
Uwe Hermann
Gerhard Sittig
Sven Schnelle