f50f3f40d9
Add sr_ prefix to input/output structs.
2011-01-30 18:32:54 +01:00
81bbdf6a6a
add incomplete DF_ANALOG support to output_gnuplot.c
...
RAW->Voltage conversion is not implemented yet, its hardcoded for
signed 16bit conversion.
2011-01-21 16:11:44 -02:00
6eb0e3ea95
change output_text.c to support analog
...
Only the "bits" output format was converted.
Analog values, are scaled down to A-Z letters.
2011-01-21 02:12:48 -02:00
d4f228d094
output_text: Add ASCII output.
2011-01-17 22:56:14 +01:00
ab224f7b61
Initial support for the OLS output format.
...
This is the file format for the OpenBench Logic Sniffer "Alternative" client.
Details: https://github.com/jawi/ols/wiki/OLS-data-file-format
This is work-in-progress.
Currently the number of samples is hardcoded to 10000. Also, this will
require a real logic analyzer as input at the moment, and will not yet
work with the "demo" driver.
2011-01-15 19:05:14 +01:00
1437e8934b
add DF_ANALOG, and an analog output module
...
Samples in DF_ANALOG packets are fixed in length to sizeof(double).
2011-01-10 05:13:46 +01:00
408e719989
Refactoring and code simplifications.
2010-04-15 23:21:30 +02:00
02076d69f9
Rename "bin" output module to "bits" everywhere.
2010-04-12 23:21:12 +02:00
1c5b9d302c
Add raw binary output format.
...
Also, rename the "bin" format to "bits" for now to avoid confusion.
2010-04-12 21:22:58 +02:00
e2ad47b5b0
Gnuplot output format support.
2010-04-06 16:54:37 +02:00
4c9ffa83cf
Initial Value Change Dump (VCD) output support.
2010-04-04 13:19:20 +02:00
a1bb33afbd
Start of code base layout restructuring.
2010-04-02 20:27:54 +02:00
Uwe Hermann
Daniel Ribeiro
Håvard Espeland
Bert Vermeulen