221 lines
6.4 KiB
C
221 lines
6.4 KiB
C
/*
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* This file is part of the sigrok project.
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*
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* Copyright (C) 2011 Daniel Ribeiro <drwyrm@gmail.com>
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* Copyright (C) 2012 Renato Caldas <rmsc@fe.up.pt>
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* Copyright (C) 2013 Lior Elazary <lelazary@yahoo.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
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#define LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
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#include <stdint.h>
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#include <string.h>
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#include <glib.h>
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#include <libudev.h>
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#include "libsigrok.h"
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#include "libsigrok-internal.h"
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/* Message logging helpers with driver-specific prefix string. */
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#define DRIVER_LOG_DOMAIN "mso19: "
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#define sr_log(l, s, args...) sr_log(l, DRIVER_LOG_DOMAIN s, ## args)
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#define sr_spew(s, args...) sr_spew(DRIVER_LOG_DOMAIN s, ## args)
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#define sr_dbg(s, args...) sr_dbg(DRIVER_LOG_DOMAIN s, ## args)
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#define sr_info(s, args...) sr_info(DRIVER_LOG_DOMAIN s, ## args)
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#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
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#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
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#define USB_VENDOR "3195"
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#define USB_PRODUCT "f190"
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#define NUM_PROBES 8
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#define NUM_TRIGGER_STAGES 4
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#define TRIGGER_TYPES "01" //the first r/f is used for the whole group
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#define SERIALCOMM "460800/8n1/flow=2"
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#define SERIALCONN "/dev/ttyUSB0"
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#define CLOCK_RATE SR_MHZ(100)
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#define MIN_NUM_SAMPLES 4
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#define MSO_TRIGGER_UNKNOWN '!'
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#define MSO_TRIGGER_UNKNOWN1 '1'
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#define MSO_TRIGGER_UNKNOWN2 '2'
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#define MSO_TRIGGER_UNKNOWN3 '3'
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#define MSO_TRIGGER_WAIT '4'
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#define MSO_TRIGGER_FIRED '5'
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#define MSO_TRIGGER_DATAREADY '6'
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enum trigger_slopes {
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SLOPE_POSITIVE = 0,
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SLOPE_NEGATIVE,
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};
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/* Structure for the pattern generator state */
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struct mso_patgen {
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/* Pattern generator clock config */
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uint16_t clock;
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/* Buffer start address */
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uint16_t start;
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/* Buffer end address */
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uint16_t end;
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/* Pattern generator config */
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uint8_t config;
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/* Samples buffer */
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uint8_t buffer[1024];
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/* Input/output configuration for the samples buffer (?) */
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uint8_t io[1024];
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/* Number of loops for the pattern generator */
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uint8_t loops;
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/* Bit enable mask for the I/O lines */
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uint8_t mask;
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};
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/* Data structure for the protocol trigger state */
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struct mso_prototrig {
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/* Word match buffer */
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uint8_t word[4];
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/* Masks for the wordmatch buffer */
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uint8_t mask[4];
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/* SPI mode 0, 1, 2, 3. Set to 0 for I2C */
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uint8_t spimode;
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};
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/* Private, per-device-instance driver context. */
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struct dev_context {
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/* info */
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uint8_t hwmodel;
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uint8_t hwrev;
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struct sr_serial_dev_inst *serial;
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// uint8_t num_sample_rates;
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/* calibration */
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double vbit;
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uint16_t dac_offset;
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uint16_t offset_range;
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uint64_t limit_samples;
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uint64_t num_samples;
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/* register cache */
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uint8_t ctlbase1;
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uint8_t ctlbase2;
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/* state */
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uint8_t la_threshold;
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uint64_t cur_rate;
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uint8_t dso_probe_attn;
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int8_t use_trigger;
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uint8_t trigger_chan;
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uint8_t trigger_slope;
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uint8_t trigger_outsrc;
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uint8_t trigger_state;
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uint8_t trigger_holdoff[2];
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uint8_t la_trigger;
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uint8_t la_trigger_mask;
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double dso_trigger_voltage;
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uint16_t dso_trigger_width;
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struct mso_prototrig protocol_trigger;
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void *session_dev_id;
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uint16_t buffer_n;
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char buffer[4096];
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};
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SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
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struct dev_context *ctx);
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SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial,
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uint8_t * info);
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SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi);
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SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val);
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SR_PRIV int mso_configure_rate(const struct sr_dev_inst *sdi, uint32_t rate);
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SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data);
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SR_PRIV int mso_configure_trigger(const struct sr_dev_inst *sdi);
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SR_PRIV int mso_configure_threshold_level(const struct sr_dev_inst *sdi);
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SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi);
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SR_PRIV int mso_arm(const struct sr_dev_inst *sdi);
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SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi);
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SR_PRIV int mso_dac_out(const struct sr_dev_inst *sdi, uint16_t val);
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SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc);
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SR_PRIV int mso_reset_fsm(struct sr_dev_inst *sdi);
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SR_PRIV int mso_toggle_led(struct sr_dev_inst *sdi, int state);
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SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi);
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SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi);
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/* bank agnostic registers */
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#define REG_CTL2 15
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/* bank 0 registers */
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#define REG_BUFFER 1
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#define REG_TRIGGER 2
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#define REG_CLKRATE1 9
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#define REG_CLKRATE2 10
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#define REG_DAC1 12
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#define REG_DAC2 13
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/* possibly bank agnostic: */
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#define REG_CTL1 14
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/* bank 2 registers (SPI/I2C protocol trigger) */
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#define REG_PT_WORD(x) (x)
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#define REG_PT_MASK(x) (x + 4)
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#define REG_PT_SPIMODE 8
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/* bits - REG_CTL1 */
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#define BIT_CTL1_RESETFSM (1 << 0)
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#define BIT_CTL1_ARM (1 << 1)
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#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */
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#define BIT_CTL1_RESETADC (1 << 6)
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#define BIT_CTL1_LED (1 << 7)
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/* bits - REG_CTL2 */
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#define BITS_CTL2_BANK(x) (x & 0x3)
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#define BIT_CTL2_SLOWMODE (1 << 5)
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struct rate_map {
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uint32_t rate;
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uint16_t val;
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uint8_t slowmode;
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};
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static const struct rate_map rate_map[] = {
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{ SR_MHZ(200), 0x0205, 0 },
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{ SR_MHZ(100), 0x0105, 0 },
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{ SR_MHZ(50), 0x0005, 0 },
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{ SR_MHZ(20), 0x0303, 0 },
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{ SR_MHZ(10), 0x0308, 0 },
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{ SR_MHZ(5), 0x030c, 0 },
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{ SR_MHZ(2), 0x0330, 0 },
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{ SR_MHZ(1), 0x0362, 0 },
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{ SR_KHZ(500), 0x03c6, 0 },
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{ SR_KHZ(200), 0x07f2, 0 },
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{ SR_KHZ(100), 0x0fe6, 0 },
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{ SR_KHZ(50), 0x1fce, 0 },
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{ SR_KHZ(20), 0x4f86, 0 },
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{ SR_KHZ(10), 0x9f0e, 0 },
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{ SR_KHZ(5), 0x03c7, 0x20 },
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{ SR_KHZ(2), 0x07f3, 0x20 },
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{ SR_KHZ(1), 0x0fe7, 0x20 },
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{ SR_HZ(500), 0x1fcf, 0x20 },
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{ SR_HZ(200), 0x4f87, 0x20 },
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{ SR_HZ(100), 0x9f0f, 0x20 },
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};
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/* FIXME: Determine corresponding voltages */
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static const uint16_t la_threshold_map[] = {
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0x8600,
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0x8770,
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0x88ff,
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0x8c70,
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0x8eff,
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0x8fff,
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};
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#endif
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