178 lines
5.1 KiB
C
178 lines
5.1 KiB
C
/*
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* This file is part of the libsigrok project.
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*
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* Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
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* Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
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* Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
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#define LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
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#include <stdint.h>
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#include <glib.h>
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#include <string.h>
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#include <libsigrok/libsigrok.h>
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#include "libsigrok-internal.h"
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#define LOG_PREFIX "hantek-4032l"
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#define H4032L_USB_VENDOR 0x04b5
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#define H4032L_USB_PRODUCT 0x4032
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#define H4032L_DATA_BUFFER_SIZE (2 * 1024)
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#define H4032L_DATA_TRANSFER_MAX_NUM 32
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#define H4043L_NUM_SAMPLES_MIN (2 * 1024)
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#define H4032L_NUM_SAMPLES_MAX (64 * 1024 * 1024)
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#define H4032L_CMD_PKT_MAGIC 0x017f
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#define H4032L_STATUS_PACKET_MAGIC 0x2B1A037F
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#define H4032L_START_PACKET_MAGIC 0x2B1A027F
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#define H4032L_END_PACKET_MAGIC 0x4D3C037F
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enum h4032l_clock_edge_type {
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H4032L_CLOCK_EDGE_TYPE_RISE,
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H4032L_CLOCK_EDGE_TYPE_FALL,
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H4032L_CLOCK_EDGE_TYPE_BOTH
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};
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enum h4032l_ext_clock_source {
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H4032L_EXT_CLOCK_SOURCE_CHANNEL_A,
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H4032L_EXT_CLOCK_SOURCE_CHANNEL_B
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};
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enum h4032l_clock_edge_type_channel {
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H4032L_CLOCK_EDGE_TYPE_RISE_A = 0x24,
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H4032L_CLOCK_EDGE_TYPE_RISE_B,
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H4032L_CLOCK_EDGE_TYPE_BOTH_A,
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H4032L_CLOCK_EDGE_TYPE_BOTH_B,
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H4032L_CLOCK_EDGE_TYPE_FALL_A,
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H4032L_CLOCK_EDGE_TYPE_FALL_B
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};
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enum h4032l_trigger_edge_type {
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H4032L_TRIGGER_EDGE_TYPE_RISE,
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H4032L_TRIGGER_EDGE_TYPE_FALL,
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H4032L_TRIGGER_EDGE_TYPE_TOGGLE,
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H4032L_TRIGGER_EDGE_TYPE_DISABLED
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};
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enum h4032l_trigger_data_range_type {
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H4032L_TRIGGER_DATA_RANGE_TYPE_MAX,
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H4032L_TRIGGER_DATA_RANGE_TYPE_MIN_OR_MAX,
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H4032L_TRIGGER_DATA_RANGE_TYPE_OUT_OF_RANGE,
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H4032L_TRIGGER_DATA_RANGE_TYPE_WITHIN_RANGE
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};
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enum h4032l_trigger_time_range_type {
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H4032L_TRIGGER_TIME_RANGE_TYPE_MAX,
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H4032L_TRIGGER_TIME_RANGE_TYPE_MIN_OR_MAX,
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H4032L_TRIGGER_TIME_RANGE_TYPE_OUT_OF_RANGE,
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H4032L_TRIGGER_TIME_RANGE_TYPE_WITHIN_RANGE
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};
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enum h4032l_trigger_data_selection {
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H4032L_TRIGGER_DATA_SELECTION_NEXT,
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H4032L_TRIGGER_DATA_SELECTION_CURRENT,
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H4032L_TRIGGER_DATA_SELECTION_PREV
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};
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enum h4032l_status {
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H4032L_STATUS_IDLE,
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H4032L_STATUS_CMD_CONFIGURE,
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H4032L_STATUS_CMD_STATUS,
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H4032L_STATUS_RESPONSE_STATUS,
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H4032L_STATUS_RESPONSE_STATUS_RETRY,
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H4032L_STATUS_RESPONSE_STATUS_CONTINUE,
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H4032L_STATUS_CMD_GET,
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H4032L_STATUS_FIRST_TRANSFER,
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H4032L_STATUS_TRANSFER
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};
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#pragma pack(push,2)
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struct h4032l_trigger {
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struct {
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uint32_t edge_signal:5;
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uint32_t edge_type:2;
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uint32_t :1;
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uint32_t data_range_type:2;
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uint32_t time_range_type:2;
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uint32_t data_range_enabled:1;
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uint32_t time_range_enabled:1;
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uint32_t :2;
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uint32_t data_sel:2;
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uint32_t combined_enabled:1;
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} flags;
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uint32_t data_range_min;
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uint32_t data_range_max;
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uint32_t time_range_min;
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uint32_t time_range_max;
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uint32_t data_range_mask;
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uint32_t combine_mask;
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uint32_t combine_data;
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};
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struct h4032l_cmd_pkt {
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uint16_t magic; /* 0x017f */
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uint8_t sample_rate;
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struct {
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uint8_t enable_trigger1:1;
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uint8_t enable_trigger2:1;
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uint8_t trigger_and_logic:1;
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} trig_flags;
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uint16_t pwm_a;
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uint16_t pwm_b;
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uint16_t reserved;
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uint32_t sample_size; /* Sample depth in bits per channel, 2k-64M, must be multiple of 512. */
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uint32_t pre_trigger_size; /* Pretrigger buffer depth in bits, must be < sample_size. */
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struct h4032l_trigger trigger[2];
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uint16_t cmd;
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};
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#pragma pack(pop)
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struct dev_context {
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enum h4032l_status status;
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uint64_t sample_rate;
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unsigned int sent_samples;
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int submitted_transfers;
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uint32_t remaining_samples;
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gboolean acq_aborted;
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struct h4032l_cmd_pkt cmd_pkt;
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unsigned int num_transfers;
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struct libusb_transfer **transfers;
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uint8_t buf[512];
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uint64_t capture_ratio;
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uint32_t trigger_pos;
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gboolean external_clock;
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enum h4032l_ext_clock_source external_clock_source;
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enum h4032l_clock_edge_type clock_edge;
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double cur_threshold[2];
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uint32_t fpga_version;
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};
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SR_PRIV int h4032l_receive_data(int fd, int revents, void *cb_data);
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SR_PRIV uint16_t h4032l_voltage2pwm(double voltage);
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SR_PRIV void LIBUSB_CALL h4032l_usb_callback(struct libusb_transfer *transfer);
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SR_PRIV void LIBUSB_CALL h4032l_data_transfer_callback(struct libusb_transfer *transfer);
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SR_PRIV int h4032l_start_data_transfers(const struct sr_dev_inst *sdi);
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SR_PRIV int h4032l_start(const struct sr_dev_inst *sdi);
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SR_PRIV int h4032l_stop(struct sr_dev_inst *sdi);
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SR_PRIV int h4032l_dev_open(struct sr_dev_inst *sdi);
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SR_PRIV int h4032l_get_fpga_version(const struct sr_dev_inst *sdi);
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#endif
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