kicad/demos/complex_hierarchy/complex_hierarchy.kicad_pcb

(kicad_pcb (version 20210228) (generator pcbnew)

  (general
    (thickness 1.6)
  )

  (paper "A4")
  (title_block
    (title "Actionneur_piezo")
    (company "Kicad devs")
    (comment 1 "Demo")
  )

  (layers
    (0 "F.Cu" power "top_copper")
    (31 "B.Cu" signal "bottom_copper")
    (32 "B.Adhes" user "B.Adhesive")
    (33 "F.Adhes" user "F.Adhesive")
    (34 "B.Paste" user)
    (35 "F.Paste" user)
    (36 "B.SilkS" user "B.Silkscreen")
    (37 "F.SilkS" user "F.Silkscreen")
    (38 "B.Mask" user)
    (39 "F.Mask" user)
    (40 "Dwgs.User" user "User.Drawings")
    (41 "Cmts.User" user "User.Comments")
    (42 "Eco1.User" user "User.Eco1")
    (43 "Eco2.User" user "User.Eco2")
    (44 "Edge.Cuts" user)
    (45 "Margin" user)
    (46 "B.CrtYd" user "B.Courtyard")
    (47 "F.CrtYd" user "F.Courtyard")
    (48 "B.Fab" user)
    (49 "F.Fab" user)
  )

  (setup
    (stackup
      (layer "F.SilkS" (type "Top Silk Screen") (color "White"))
      (layer "F.Paste" (type "Top Solder Paste"))
      (layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness 0.01))
      (layer "F.Cu" (type "copper") (thickness 0.035))
      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
      (layer "B.Cu" (type "copper") (thickness 0.035))
      (layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness 0.01))
      (layer "B.Paste" (type "Bottom Solder Paste"))
      (layer "B.SilkS" (type "Bottom Silk Screen") (color "White"))
      (copper_finish "None")
      (dielectric_constraints no)
    )
    (pad_to_mask_clearance 0)
    (aux_axis_origin 83.5 138)
    (pcbplotparams
      (layerselection 0x00000fc_80000001)
      (disableapertmacros false)
      (usegerberextensions false)
      (usegerberattributes true)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (svguseinch false)
      (svgprecision 6)
      (excludeedgelayer false)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin true)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (dxfpolygonmode true)
      (dxfimperialunits true)
      (dxfusepcbnewfont true)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (sketchpadsonfab false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory "")
    )
  )


  (net 0 "")
  (net 1 "-VAA")
  (net 2 "/12Vext")
  (net 3 "/ampli_ht_horizontal/PIEZO_IN")
  (net 4 "/ampli_ht_horizontal/PIEZO_OUT")
  (net 5 "/ampli_ht_horizontal/S_OUT+")
  (net 6 "/ampli_ht_horizontal/Vpil_0_3,3V")
  (net 7 "/ampli_ht_vertical/PIEZO_IN")
  (net 8 "/ampli_ht_vertical/PIEZO_OUT")
  (net 9 "/ampli_ht_vertical/S_OUT+")
  (net 10 "/ampli_ht_vertical/Vpil_0_3,3V")
  (net 11 "GND")
  (net 12 "HT")
  (net 13 "Net-(C10-Pad1)")
  (net 14 "Net-(C10-Pad2)")
  (net 15 "Net-(C12-Pad1)")
  (net 16 "Net-(C14-Pad1)")
  (net 17 "Net-(C3-Pad2)")
  (net 18 "Net-(C4-Pad1)")
  (net 19 "Net-(C5-Pad1)")
  (net 20 "Net-(C6-Pad2)")
  (net 21 "Net-(C7-Pad1)")
  (net 22 "Net-(C8-Pad1)")
  (net 23 "Net-(D4-Pad1)")
  (net 24 "Net-(D4-Pad2)")
  (net 25 "Net-(D7-Pad1)")
  (net 26 "Net-(D7-Pad2)")
  (net 27 "Net-(R11-Pad1)")
  (net 28 "Net-(R19-Pad2)")
  (net 29 "Net-(R21-Pad1)")
  (net 30 "Net-(R9-Pad2)")
  (net 31 "Net-(RV1-Pad2)")
  (net 32 "Net-(RV2-Pad2)")
  (net 33 "VCC")
  (net 34 "Net-(D2-Pad1)")
  (net 35 "Net-(D3-Pad1)")
  (net 36 "Net-(D5-Pad1)")
  (net 37 "Net-(D6-Pad1)")
  (net 38 "Net-(D8-Pad2)")
  (net 39 "Net-(D9-Pad2)")
  (net 40 "+12C")
  (net 41 "Net-(Q1-Pad1)")
  (net 42 "Net-(Q2-Pad1)")
  (net 43 "Net-(Q3-Pad1)")
  (net 44 "Net-(Q4-Pad1)")
  (net 45 "Net-(Q4-Pad2)")
  (net 46 "Net-(Q5-Pad1)")
  (net 47 "Net-(Q6-Pad1)")
  (net 48 "Net-(Q7-Pad1)")
  (net 49 "Net-(Q8-Pad1)")
  (net 50 "Net-(Q8-Pad2)")
  (net 51 "unconnected-(U1-Pad6)")
  (net 52 "unconnected-(U1-Pad7)")

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    (at 126.619 60.706)
    (descr "CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=10*4.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf")
    (tags "CP Axial series Axial Horizontal pin pitch 15mm  length 10mm diameter 4.5mm Electrolytic Capacitor")
    (property "Sheetfile" "complex_hierarchy.kicad_sch")
    (property "Sheetname" "")
    (path "/00000000-0000-0000-0000-00004ae173cf")
    (attr through_hole)
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    )
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    (fp_text user "${REFERENCE}" (at 7.5 0) (layer "F.Fab")
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    (fp_line (start 1.24 0) (end 2.38 0) (layer "F.SilkS") (width 0.12) (tstamp 77c66cb0-3007-4510-aef9-e1975743a3ce))
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    (pad "1" thru_hole rect (at 0 0) (locked) (size 2 2) (drill 1) (layers *.Cu *.Mask)
      (net 40 "+12C") (pintype "passive") (tstamp 87b15f05-cfc2-47e8-afe0-328539c951d0))
    (pad "2" thru_hole oval (at 15 0) (locked) (size 2 2) (drill 1) (layers *.Cu *.Mask)
      (net 11 "GND") (pintype "passive") (tstamp d910ec16-88ba-4f14-8fac-e1629e5b1805))
    (model "${KICAD6_3DMODEL_DIR}/Capacitor_THT.3dshapes/CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal.wrl"
      (offset (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (footprint "Capacitor_THT:CP_Axial_L11.0mm_D6.0mm_P18.00mm_Horizontal" (layer "F.Cu")
    (tedit 5AE50EF2) (tstamp 00000000-0000-0000-0000-00005592cf60)
    (at 121.793 60.579 180)
    (descr "CP, Axial series, Axial, Horizontal, pin pitch=18mm, , length*diameter=11*6mm^2, Electrolytic Capacitor")
    (tags "CP Axial series Axial Horizontal pin pitch 18mm  length 11mm diameter 6mm Electrolytic Capacitor")
    (property "Sheetfile" "complex_hierarchy.kicad_sch")
    (property "Sheetname" "")
    (path "/00000000-0000-0000-0000-00004b3a1558")
    (attr through_hole)
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    (fp_text value "47uF/63V" (at 9 4.12) (layer "F.Fab")
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    (fp_text user "${REFERENCE}" (at 9 0) (layer "F.Fab")
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    (fp_line (start 14.62 -3.12) (end 14.62 3.12) (layer "F.SilkS") (width 0.12) (tstamp 02796805-8dcb-4d2b-a382-b25d559832b3))
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  )

  (footprint "Capacitor_THT:CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal" (layer "F.Cu")
    (tedit 5AE50EF2) (tstamp 00000000-0000-0000-0000-00005592cf70)
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    (tags "CP Axial series Axial Horizontal pin pitch 15mm  length 10mm diameter 4.5mm Electrolytic Capacitor")
    (property "Sheetfile" "complex_hierarchy.kicad_sch")
    (property "Sheetname" "")
    (path "/00000000-0000-0000-0000-00004b4b15e7")
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