2007-08-23 04:28:46 +00:00
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/*
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2011-09-30 18:15:37 +00:00
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* This program source code file is part of KiCad, a free EDA CAD application.
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2007-08-23 04:28:46 +00:00
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*
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2008-01-22 20:35:46 +00:00
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* Copyright (C) 2007-2008 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
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2018-03-27 08:18:20 +00:00
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* Copyright (C) 2004-2018 KiCad Developers, see AUTHORS.txt for contributors.
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2008-01-08 17:44:20 +00:00
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*
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2007-08-23 04:28:46 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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2008-01-08 17:44:20 +00:00
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*
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2007-08-23 04:28:46 +00:00
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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2008-01-08 17:44:20 +00:00
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*
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2007-08-23 04:28:46 +00:00
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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2008-01-08 17:44:20 +00:00
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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2007-08-23 04:28:46 +00:00
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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2012-01-23 04:33:36 +00:00
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#include <collectors.h>
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#include <class_board_item.h> // class BOARD_ITEM
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2011-09-23 13:57:12 +00:00
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2012-01-23 04:33:36 +00:00
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#include <class_module.h>
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2020-02-03 02:23:27 +00:00
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#include <class_edge_mod.h>
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2012-01-23 04:33:36 +00:00
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#include <class_pad.h>
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2012-10-04 17:47:28 +00:00
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#include <class_track.h>
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2012-02-09 20:33:38 +00:00
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#include <class_marker_pcb.h>
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2018-11-02 23:50:33 +00:00
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#include <class_zone.h>
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2020-02-03 02:23:27 +00:00
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#include <class_drawsegment.h>
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2020-08-12 11:23:30 +00:00
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#include <class_pcb_group.h>
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2020-04-24 23:44:09 +00:00
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#include <macros.h>
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2020-01-07 17:12:59 +00:00
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#include <math/util.h> // for KiROUND
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2007-08-23 04:28:46 +00:00
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2017-09-28 17:00:24 +00:00
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/* This module contains out of line member functions for classes given in
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* collectors.h. Those classes augment the functionality of class PCB_EDIT_FRAME.
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2008-01-08 17:44:20 +00:00
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*/
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2007-08-23 04:28:46 +00:00
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2007-08-30 22:20:52 +00:00
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const KICAD_T GENERAL_COLLECTOR::AllBoardItems[] = {
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2007-10-03 19:45:32 +00:00
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// there are some restrictions on the order of items in the general case.
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// all items in m_Drawings for instance should be contiguous.
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2008-01-10 20:53:41 +00:00
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// *** all items in a same list (shown here) must be contiguous ****
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2011-10-01 19:24:27 +00:00
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PCB_MARKER_T, // in m_markers
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2020-08-26 23:52:12 +00:00
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PCB_TEXT_T, // in m_drawings
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PCB_LINE_T, // in m_drawings
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2020-09-12 20:09:40 +00:00
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PCB_DIM_ALIGNED_T, // in m_drawings
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2020-09-17 00:54:58 +00:00
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PCB_DIM_CENTER_T, // in m_drawings
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PCB_DIM_ORTHOGONAL_T, // in m_drawings
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2020-09-12 20:09:40 +00:00
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PCB_DIM_LEADER_T, // in m_drawings
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2020-08-26 23:52:12 +00:00
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PCB_TARGET_T, // in m_drawings
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PCB_VIA_T, // in m_tracks
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PCB_TRACE_T, // in m_tracks
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PCB_ARC_T, // in m_tracks
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2011-10-01 19:24:27 +00:00
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PCB_PAD_T, // in modules
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PCB_MODULE_TEXT_T, // in modules
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2020-08-26 23:52:12 +00:00
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PCB_MODULE_T, // in m_modules
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PCB_GROUP_T, // in m_groups
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PCB_ZONE_AREA_T, // in m_zones
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2007-08-23 04:28:46 +00:00
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EOT
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2008-01-08 17:44:20 +00:00
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};
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2007-08-23 04:28:46 +00:00
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2017-09-28 17:00:24 +00:00
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const KICAD_T GENERAL_COLLECTOR::BoardLevelItems[] = {
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PCB_MARKER_T,
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PCB_TEXT_T,
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PCB_LINE_T,
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2020-09-12 20:09:40 +00:00
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PCB_DIM_ALIGNED_T,
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2020-09-22 02:32:40 +00:00
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PCB_DIM_ORTHOGONAL_T,
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PCB_DIM_CENTER_T,
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2020-09-12 20:09:40 +00:00
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PCB_DIM_LEADER_T,
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2017-09-28 17:00:24 +00:00
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PCB_TARGET_T,
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PCB_VIA_T,
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2019-05-17 00:13:21 +00:00
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PCB_ARC_T,
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2017-09-28 17:00:24 +00:00
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PCB_TRACE_T,
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PCB_MODULE_T,
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2020-08-11 19:37:07 +00:00
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PCB_GROUP_T,
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2017-09-28 17:00:24 +00:00
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PCB_ZONE_AREA_T,
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EOT
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};
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2007-09-06 04:34:03 +00:00
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2007-09-25 15:10:01 +00:00
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const KICAD_T GENERAL_COLLECTOR::AllButZones[] = {
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2011-10-01 19:24:27 +00:00
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PCB_MARKER_T,
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PCB_TEXT_T,
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PCB_LINE_T,
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2020-09-12 20:09:40 +00:00
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PCB_DIM_ALIGNED_T,
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2020-09-22 02:32:40 +00:00
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PCB_DIM_ORTHOGONAL_T,
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PCB_DIM_CENTER_T,
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2020-09-12 20:09:40 +00:00
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PCB_DIM_LEADER_T,
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2011-09-07 19:41:04 +00:00
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PCB_TARGET_T,
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2011-10-01 19:24:27 +00:00
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PCB_VIA_T,
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PCB_TRACE_T,
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2019-05-17 00:13:21 +00:00
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PCB_ARC_T,
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2011-10-01 19:24:27 +00:00
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PCB_PAD_T,
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PCB_MODULE_TEXT_T,
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PCB_MODULE_T,
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2020-08-11 19:37:07 +00:00
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PCB_GROUP_T,
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2011-10-01 19:24:27 +00:00
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PCB_ZONE_AREA_T, // if it is visible on screen, it should be selectable
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2007-09-25 15:10:01 +00:00
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EOT
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};
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2008-01-08 17:44:20 +00:00
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2007-09-25 15:10:01 +00:00
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2014-07-09 11:50:27 +00:00
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const KICAD_T GENERAL_COLLECTOR::Modules[] = {
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2011-10-01 19:24:27 +00:00
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PCB_MODULE_T,
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2007-09-12 02:14:07 +00:00
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EOT
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};
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2008-01-08 17:44:20 +00:00
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const KICAD_T GENERAL_COLLECTOR::PadsOrModules[] = {
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2011-10-01 19:24:27 +00:00
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PCB_PAD_T,
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PCB_MODULE_T,
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2008-01-08 17:44:20 +00:00
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EOT
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2007-09-12 02:14:07 +00:00
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};
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2007-12-13 06:24:09 +00:00
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2018-10-06 02:58:25 +00:00
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const KICAD_T GENERAL_COLLECTOR::PadsOrTracks[] = {
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2011-10-01 19:24:27 +00:00
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PCB_PAD_T,
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PCB_VIA_T,
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PCB_TRACE_T,
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2019-05-17 00:13:21 +00:00
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PCB_ARC_T,
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2008-01-08 17:44:20 +00:00
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EOT
|
2007-12-13 06:24:09 +00:00
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};
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2019-10-26 15:49:29 +00:00
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const KICAD_T GENERAL_COLLECTOR::ModulesAndTheirItems[] = {
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PCB_MODULE_T,
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PCB_MODULE_TEXT_T,
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PCB_MODULE_EDGE_T,
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PCB_PAD_T,
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PCB_MODULE_ZONE_AREA_T,
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2020-10-03 11:16:29 +00:00
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PCB_GROUP_T,
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2019-10-26 15:49:29 +00:00
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EOT
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};
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2007-10-27 18:05:50 +00:00
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2007-09-12 02:14:07 +00:00
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2019-10-26 15:49:29 +00:00
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const KICAD_T GENERAL_COLLECTOR::ModuleItems[] = {
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PCB_MODULE_TEXT_T,
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PCB_MODULE_EDGE_T,
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PCB_PAD_T,
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PCB_MODULE_ZONE_AREA_T,
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2020-10-03 11:16:29 +00:00
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PCB_GROUP_T,
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2019-10-26 15:49:29 +00:00
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EOT
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};
|
2014-07-09 11:50:27 +00:00
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2007-09-12 02:14:07 +00:00
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const KICAD_T GENERAL_COLLECTOR::Tracks[] = {
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2011-10-01 19:24:27 +00:00
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PCB_TRACE_T,
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2019-05-17 00:13:21 +00:00
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PCB_ARC_T,
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2011-10-01 19:24:27 +00:00
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PCB_VIA_T,
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2007-09-12 02:14:07 +00:00
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EOT
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};
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2014-07-09 11:50:27 +00:00
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2018-05-02 15:34:13 +00:00
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const KICAD_T GENERAL_COLLECTOR::LockableItems[] = {
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PCB_MODULE_T,
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2020-08-11 19:37:07 +00:00
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PCB_GROUP_T, // Can a group be locked?
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2018-05-02 15:34:13 +00:00
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PCB_TRACE_T,
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2019-05-17 00:13:21 +00:00
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PCB_ARC_T,
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2018-05-02 15:34:13 +00:00
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PCB_VIA_T,
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EOT
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};
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2011-05-12 11:06:32 +00:00
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const KICAD_T GENERAL_COLLECTOR::Zones[] = {
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2011-10-01 19:24:27 +00:00
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PCB_ZONE_AREA_T,
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2019-10-26 15:49:29 +00:00
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PCB_MODULE_ZONE_AREA_T,
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2011-05-12 11:06:32 +00:00
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EOT
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};
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2020-09-11 23:52:45 +00:00
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const KICAD_T GENERAL_COLLECTOR::Dimensions[] = {
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2020-09-12 20:09:40 +00:00
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PCB_DIM_ALIGNED_T,
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PCB_DIM_LEADER_T,
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2020-09-22 02:32:40 +00:00
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PCB_DIM_ORTHOGONAL_T,
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PCB_DIM_CENTER_T,
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2020-09-11 23:52:45 +00:00
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EOT
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};
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2007-09-12 02:14:07 +00:00
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2016-07-12 19:05:54 +00:00
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SEARCH_RESULT GENERAL_COLLECTOR::Inspect( EDA_ITEM* testItem, void* testData )
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2007-08-23 04:28:46 +00:00
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{
|
2020-02-03 02:23:27 +00:00
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BOARD_ITEM* item = (BOARD_ITEM*) testItem;
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MODULE* module = nullptr;
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2020-08-12 11:23:30 +00:00
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PCB_GROUP* group = nullptr;
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2020-02-03 02:23:27 +00:00
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D_PAD* pad = nullptr;
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2018-11-02 23:50:33 +00:00
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bool pad_through = false;
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2020-02-03 02:23:27 +00:00
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VIA* via = nullptr;
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MARKER_PCB* marker = nullptr;
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ZONE_CONTAINER* zone = nullptr;
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DRAWSEGMENT* drawSegment = nullptr;
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2007-08-24 03:40:04 +00:00
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2007-09-12 02:14:07 +00:00
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#if 0 // debugging
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2008-01-08 17:44:20 +00:00
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static int breakhere = 0;
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2007-09-01 12:00:30 +00:00
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switch( item->Type() )
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2007-08-24 03:40:04 +00:00
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{
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2011-10-01 19:24:27 +00:00
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case PCB_PAD_T:
|
2007-09-05 15:11:48 +00:00
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{
|
2013-08-05 20:47:34 +00:00
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MODULE* m = (MODULE*) item->GetParent();
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if( m->GetReference() == wxT( "Y2" ) )
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{
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breakhere++;
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}
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2007-09-05 15:11:48 +00:00
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}
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2007-09-05 04:48:47 +00:00
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break;
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2008-01-08 17:44:20 +00:00
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2011-10-01 19:24:27 +00:00
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case PCB_VIA_T:
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2007-09-05 04:48:47 +00:00
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breakhere++;
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break;
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2008-01-08 17:44:20 +00:00
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2011-10-01 19:24:27 +00:00
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case PCB_TRACE_T:
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2019-05-17 00:13:21 +00:00
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case PCB_ARC_T:
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2007-09-05 04:48:47 +00:00
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breakhere++;
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break;
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2008-01-08 17:44:20 +00:00
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2011-10-01 19:24:27 +00:00
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case PCB_TEXT_T:
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2007-09-05 04:48:47 +00:00
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breakhere++;
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break;
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2008-01-08 17:44:20 +00:00
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2011-10-01 19:24:27 +00:00
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case PCB_LINE_T:
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2007-09-05 04:48:47 +00:00
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breakhere++;
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break;
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2008-01-08 17:44:20 +00:00
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2020-09-12 20:09:40 +00:00
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case PCB_DIM_ALIGNED_T:
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2007-09-05 04:48:47 +00:00
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breakhere++;
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break;
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2008-01-08 17:44:20 +00:00
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2011-10-01 19:24:27 +00:00
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case PCB_MODULE_TEXT_T:
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2008-01-08 17:44:20 +00:00
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{
|
2013-08-05 20:47:34 +00:00
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TEXTE_MODULE* tm = (TEXTE_MODULE*) item;
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if( tm->GetText() == wxT( "10uH" ) )
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{
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breakhere++;
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}
|
2008-01-08 17:44:20 +00:00
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}
|
2007-09-05 04:48:47 +00:00
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break;
|
2008-01-08 17:44:20 +00:00
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2011-10-01 19:24:27 +00:00
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case PCB_MODULE_T:
|
2007-09-05 04:48:47 +00:00
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{
|
2013-08-05 20:47:34 +00:00
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MODULE* m = (MODULE*) item;
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if( m->GetReference() == wxT( "C98" ) )
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{
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breakhere++;
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}
|
2007-09-05 04:48:47 +00:00
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}
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break;
|
2008-01-08 17:44:20 +00:00
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|
2012-02-09 20:33:38 +00:00
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case PCB_MARKER_T:
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breakhere++;
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break;
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|
2007-08-24 03:40:04 +00:00
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default:
|
2007-09-05 04:48:47 +00:00
|
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|
breakhere++;
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|
break;
|
2007-08-24 03:40:04 +00:00
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}
|
2008-01-08 17:44:20 +00:00
|
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2007-08-24 03:40:04 +00:00
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#endif
|
2007-08-30 22:20:52 +00:00
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2007-09-05 04:48:47 +00:00
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|
|
switch( item->Type() )
|
|
|
|
{
|
2011-10-01 19:24:27 +00:00
|
|
|
case PCB_PAD_T:
|
2010-02-05 10:56:23 +00:00
|
|
|
// there are pad specific visibility controls.
|
|
|
|
// Criterias to select a pad is:
|
2011-09-07 19:41:04 +00:00
|
|
|
// for smd pads: the module parent must be seen, and pads on the corresponding
|
|
|
|
// board side must be seen
|
2007-09-22 04:33:44 +00:00
|
|
|
// if pad is a thru hole, then it can be visible when its parent module is not.
|
2010-04-23 09:54:40 +00:00
|
|
|
// for through pads: pads on Front or Back board sides must be seen
|
2010-02-05 10:56:23 +00:00
|
|
|
pad = (D_PAD*) item;
|
2011-09-07 19:41:04 +00:00
|
|
|
|
2015-08-23 19:40:33 +00:00
|
|
|
if( (pad->GetAttribute() != PAD_ATTRIB_SMD) &&
|
|
|
|
(pad->GetAttribute() != PAD_ATTRIB_CONN) ) // a hole is present, so multiple layers
|
2007-09-22 04:33:44 +00:00
|
|
|
{
|
2008-01-08 17:44:20 +00:00
|
|
|
// proceed to the common tests below, but without the parent module test,
|
2010-02-05 10:56:23 +00:00
|
|
|
// by leaving module==NULL, but having pad != null
|
|
|
|
pad_through = true;
|
2007-09-22 04:33:44 +00:00
|
|
|
}
|
2010-02-05 10:56:23 +00:00
|
|
|
else // smd, so use pads test after module test
|
2011-09-07 19:41:04 +00:00
|
|
|
{
|
2014-09-11 16:35:19 +00:00
|
|
|
module = static_cast<MODULE*>( item->GetParent() );
|
2011-09-07 19:41:04 +00:00
|
|
|
}
|
|
|
|
|
2007-09-05 04:48:47 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2012-10-04 17:47:28 +00:00
|
|
|
case PCB_VIA_T: // vias are on many layers, so layer test is specific
|
2014-09-11 16:35:19 +00:00
|
|
|
via = static_cast<VIA*>( item );
|
2007-09-05 04:48:47 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2011-10-01 19:24:27 +00:00
|
|
|
case PCB_TRACE_T:
|
2019-05-17 00:13:21 +00:00
|
|
|
case PCB_ARC_T:
|
2018-02-22 06:53:16 +00:00
|
|
|
if( m_Guide->IgnoreTracks() )
|
|
|
|
goto exit;
|
2007-09-05 04:48:47 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2019-10-28 09:15:03 +00:00
|
|
|
case PCB_MODULE_ZONE_AREA_T:
|
|
|
|
module = static_cast<MODULE*>( item->GetParent() );
|
2020-04-24 23:44:09 +00:00
|
|
|
|
|
|
|
// Fallthrough to get the zone as well
|
|
|
|
KI_FALLTHROUGH;
|
|
|
|
|
2011-10-01 19:24:27 +00:00
|
|
|
case PCB_ZONE_AREA_T:
|
2018-11-02 23:50:33 +00:00
|
|
|
zone = static_cast<ZONE_CONTAINER*>( item );
|
2007-12-29 19:15:58 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2011-10-01 19:24:27 +00:00
|
|
|
case PCB_TEXT_T:
|
2007-09-05 04:48:47 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2011-10-01 19:24:27 +00:00
|
|
|
case PCB_LINE_T:
|
2020-02-03 02:23:27 +00:00
|
|
|
drawSegment = static_cast<DRAWSEGMENT*>( item );
|
2007-09-05 04:48:47 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2020-09-12 20:09:40 +00:00
|
|
|
case PCB_DIM_ALIGNED_T:
|
2020-09-17 00:54:58 +00:00
|
|
|
case PCB_DIM_CENTER_T:
|
|
|
|
case PCB_DIM_ORTHOGONAL_T:
|
2020-09-12 20:09:40 +00:00
|
|
|
case PCB_DIM_LEADER_T:
|
2007-09-05 04:48:47 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2011-09-07 19:41:04 +00:00
|
|
|
case PCB_TARGET_T:
|
2008-01-08 17:44:20 +00:00
|
|
|
break;
|
|
|
|
|
2011-10-01 19:24:27 +00:00
|
|
|
case PCB_MODULE_TEXT_T:
|
2007-09-05 04:48:47 +00:00
|
|
|
{
|
2014-09-11 16:35:19 +00:00
|
|
|
TEXTE_MODULE *text = static_cast<TEXTE_MODULE*>( item );
|
|
|
|
if( m_Guide->IgnoreMTextsMarkedNoShow() && !text->IsVisible() )
|
2007-09-05 04:48:47 +00:00
|
|
|
goto exit;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2014-09-11 16:35:19 +00:00
|
|
|
if( m_Guide->IgnoreMTextsOnBack() && IsBackLayer( text->GetLayer() ) )
|
2007-09-25 15:10:01 +00:00
|
|
|
goto exit;
|
2011-12-14 22:35:03 +00:00
|
|
|
|
2014-09-11 16:35:19 +00:00
|
|
|
if( m_Guide->IgnoreMTextsOnFront() && IsFrontLayer( text->GetLayer() ) )
|
2011-12-14 22:35:03 +00:00
|
|
|
goto exit;
|
|
|
|
|
2014-09-11 16:35:19 +00:00
|
|
|
/* The three text types have different criteria: reference
|
|
|
|
* and value have their own ignore flags; user text instead
|
|
|
|
* follows their layer visibility. Checking this here is
|
|
|
|
* simpler than later (when layer visibility is checked for
|
|
|
|
* other entities) */
|
|
|
|
|
|
|
|
switch( text->GetType() )
|
|
|
|
{
|
|
|
|
case TEXTE_MODULE::TEXT_is_REFERENCE:
|
|
|
|
if( m_Guide->IgnoreModulesRefs() )
|
|
|
|
goto exit;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TEXTE_MODULE::TEXT_is_VALUE:
|
|
|
|
if( m_Guide->IgnoreModulesVals() )
|
|
|
|
goto exit;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TEXTE_MODULE::TEXT_is_DIVERS:
|
|
|
|
if( !m_Guide->IsLayerVisible( text->GetLayer() )
|
|
|
|
&& m_Guide->IgnoreNonVisibleLayers() )
|
|
|
|
goto exit;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Extract the module since it could be hidden
|
|
|
|
module = static_cast<MODULE*>( item->GetParent() );
|
2007-09-05 04:48:47 +00:00
|
|
|
}
|
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2020-02-03 02:23:27 +00:00
|
|
|
case PCB_MODULE_EDGE_T:
|
|
|
|
drawSegment = static_cast<EDGE_MODULE*>( item );
|
|
|
|
break;
|
|
|
|
|
2011-10-01 19:24:27 +00:00
|
|
|
case PCB_MODULE_T:
|
2014-09-11 16:35:19 +00:00
|
|
|
module = static_cast<MODULE*>( item );
|
2007-09-05 04:48:47 +00:00
|
|
|
break;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2020-08-11 19:37:07 +00:00
|
|
|
case PCB_GROUP_T:
|
2020-08-12 11:23:30 +00:00
|
|
|
group = static_cast<PCB_GROUP*>( item );
|
2020-08-11 19:37:07 +00:00
|
|
|
break;
|
|
|
|
|
2012-02-09 20:33:38 +00:00
|
|
|
case PCB_MARKER_T:
|
2014-09-11 16:35:19 +00:00
|
|
|
marker = static_cast<MARKER_PCB*>( item );
|
2012-02-09 20:33:38 +00:00
|
|
|
break;
|
|
|
|
|
2007-09-05 04:48:47 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2007-09-05 04:48:47 +00:00
|
|
|
// common tests:
|
2007-09-05 14:52:28 +00:00
|
|
|
|
2011-10-01 19:24:27 +00:00
|
|
|
if( module ) // true from case PCB_PAD_T, PCB_MODULE_TEXT_T, or PCB_MODULE_T
|
2007-09-05 14:52:28 +00:00
|
|
|
{
|
2014-09-11 16:35:19 +00:00
|
|
|
if( m_Guide->IgnoreModulesOnBack() && (module->GetLayer() == B_Cu) )
|
2007-09-05 14:52:28 +00:00
|
|
|
goto exit;
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2014-09-11 16:35:19 +00:00
|
|
|
if( m_Guide->IgnoreModulesOnFront() && (module->GetLayer() == F_Cu) )
|
2007-09-05 14:52:28 +00:00
|
|
|
goto exit;
|
|
|
|
}
|
2007-09-15 04:25:54 +00:00
|
|
|
|
2010-04-23 09:54:40 +00:00
|
|
|
// Pads are not sensitive to the layer visibility controls.
|
2010-02-05 10:56:23 +00:00
|
|
|
// They all have their own separate visibility controls
|
|
|
|
// skip them if not visible
|
2013-08-05 20:47:34 +00:00
|
|
|
if( pad )
|
2010-02-05 10:56:23 +00:00
|
|
|
{
|
|
|
|
if( m_Guide->IgnorePads() )
|
|
|
|
goto exit;
|
2011-09-07 19:41:04 +00:00
|
|
|
|
2010-02-05 10:56:23 +00:00
|
|
|
if( ! pad_through )
|
|
|
|
{
|
2014-06-24 16:17:18 +00:00
|
|
|
if( m_Guide->IgnorePadsOnFront() && pad->IsOnLayer(F_Cu ) )
|
2010-02-05 10:56:23 +00:00
|
|
|
goto exit;
|
2011-09-07 19:41:04 +00:00
|
|
|
|
2014-06-24 16:17:18 +00:00
|
|
|
if( m_Guide->IgnorePadsOnBack() && pad->IsOnLayer(B_Cu ) )
|
2010-02-05 10:56:23 +00:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2012-02-09 20:33:38 +00:00
|
|
|
if( marker )
|
|
|
|
{
|
|
|
|
// Markers are not sensitive to the layer
|
2020-10-02 20:25:14 +00:00
|
|
|
if( marker->HitTest( m_refPos ) )
|
2012-02-09 20:33:38 +00:00
|
|
|
Append( item );
|
|
|
|
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
2020-08-11 19:37:07 +00:00
|
|
|
if( group )
|
|
|
|
{
|
|
|
|
// Groups are not sensitive to the layer ... ?
|
2020-10-02 20:25:14 +00:00
|
|
|
if( group->HitTest( m_refPos ) )
|
2020-08-11 19:37:07 +00:00
|
|
|
Append( item );
|
|
|
|
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
|
2018-01-18 02:12:51 +00:00
|
|
|
if( via )
|
|
|
|
{
|
|
|
|
auto type = via->GetViaType();
|
|
|
|
|
2019-12-28 00:55:11 +00:00
|
|
|
if( ( m_Guide->IgnoreThroughVias() && type == VIATYPE::THROUGH )
|
|
|
|
|| ( m_Guide->IgnoreBlindBuriedVias() && type == VIATYPE::BLIND_BURIED )
|
|
|
|
|| ( m_Guide->IgnoreMicroVias() && type == VIATYPE::MICROVIA ) )
|
2018-01-18 02:12:51 +00:00
|
|
|
{
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-02 23:50:33 +00:00
|
|
|
if( item->IsOnLayer( m_Guide->GetPreferredLayer() ) || m_Guide->IgnorePreferredLayer() )
|
2007-08-23 04:28:46 +00:00
|
|
|
{
|
2017-03-13 03:19:33 +00:00
|
|
|
PCB_LAYER_ID layer = item->GetLayer();
|
2007-09-15 04:25:54 +00:00
|
|
|
|
2018-11-17 00:34:12 +00:00
|
|
|
// Modules and their subcomponents: reference, value and pads are not sensitive
|
|
|
|
// to the layer visibility controls. They all have their own separate visibility
|
|
|
|
// controls for vias, GetLayer() has no meaning, but IsOnLayer() works fine. User
|
|
|
|
// text in module *is* sensitive to layer visibility but that was already handled.
|
2014-09-11 16:35:19 +00:00
|
|
|
|
|
|
|
if( via || module || pad || m_Guide->IsLayerVisible( layer )
|
|
|
|
|| !m_Guide->IgnoreNonVisibleLayers() )
|
2007-08-23 04:28:46 +00:00
|
|
|
{
|
2008-01-08 17:44:20 +00:00
|
|
|
if( !m_Guide->IsLayerLocked( layer ) || !m_Guide->IgnoreLockedLayers() )
|
2007-08-24 03:40:04 +00:00
|
|
|
{
|
2007-08-30 22:20:52 +00:00
|
|
|
if( !item->IsLocked() || !m_Guide->IgnoreLockedItems() )
|
|
|
|
{
|
2020-02-03 02:23:27 +00:00
|
|
|
int accuracy = KiROUND( 5 * m_Guide->OnePixelInIU() );
|
|
|
|
|
2018-11-17 00:34:12 +00:00
|
|
|
if( zone )
|
2007-08-30 22:20:52 +00:00
|
|
|
{
|
2018-11-17 00:34:12 +00:00
|
|
|
bool testFill = !m_Guide->IgnoreZoneFills();
|
|
|
|
|
2020-10-02 20:25:14 +00:00
|
|
|
if( zone->HitTestForCorner( m_refPos, accuracy * 2 )
|
|
|
|
|| zone->HitTestForEdge( m_refPos, accuracy )
|
|
|
|
|| ( testFill && zone->HitTestFilledArea( layer, m_refPos ) ) )
|
2018-11-17 00:34:12 +00:00
|
|
|
{
|
2018-02-19 00:00:29 +00:00
|
|
|
Append( item );
|
2018-11-17 00:34:12 +00:00
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
2020-02-03 02:23:27 +00:00
|
|
|
else if( item->Type() == PCB_MODULE_T )
|
|
|
|
{
|
2020-10-02 20:25:14 +00:00
|
|
|
if( module->HitTest( m_refPos, accuracy )
|
|
|
|
&& module->HitTestAccurate( m_refPos, accuracy ) )
|
2020-02-03 02:23:27 +00:00
|
|
|
{
|
|
|
|
Append( item );
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if( drawSegment )
|
|
|
|
{
|
2020-10-02 20:25:14 +00:00
|
|
|
if( drawSegment->HitTest( m_refPos, accuracy ) )
|
2020-02-03 02:23:27 +00:00
|
|
|
{
|
|
|
|
Append( item );
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
2018-11-02 23:50:33 +00:00
|
|
|
{
|
2020-10-02 20:25:14 +00:00
|
|
|
if( item->HitTest( m_refPos, 0 ) )
|
2019-06-26 20:50:57 +00:00
|
|
|
{
|
2018-11-18 09:02:32 +00:00
|
|
|
Append( item );
|
2019-06-26 20:50:57 +00:00
|
|
|
goto exit;
|
|
|
|
}
|
2018-11-02 23:50:33 +00:00
|
|
|
}
|
2007-08-30 22:20:52 +00:00
|
|
|
}
|
2007-08-24 03:40:04 +00:00
|
|
|
}
|
2007-08-23 04:28:46 +00:00
|
|
|
}
|
2007-08-30 22:20:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if( m_Guide->IncludeSecondary() )
|
|
|
|
{
|
|
|
|
// for now, "secondary" means "tolerate any layer". It has
|
2008-01-08 17:44:20 +00:00
|
|
|
// no effect on other criteria, since there is a separate "ignore" control for
|
2007-08-30 22:20:52 +00:00
|
|
|
// those in the COLLECTORS_GUIDE
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2017-03-13 03:19:33 +00:00
|
|
|
PCB_LAYER_ID layer = item->GetLayer();
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2018-11-17 00:34:12 +00:00
|
|
|
// Modules and their subcomponents: reference, value and pads are not sensitive
|
|
|
|
// to the layer visibility controls. They all have their own separate visibility
|
|
|
|
// controls for vias, GetLayer() has no meaning, but IsOnLayer() works fine. User
|
|
|
|
// text in module *is* sensitive to layer visibility but that was already handled.
|
2014-09-11 16:35:19 +00:00
|
|
|
|
2019-10-28 09:15:03 +00:00
|
|
|
if( via || module || pad || zone || m_Guide->IsLayerVisible( layer )
|
2014-09-11 16:35:19 +00:00
|
|
|
|| !m_Guide->IgnoreNonVisibleLayers() )
|
2007-08-23 04:28:46 +00:00
|
|
|
{
|
2008-01-08 17:44:20 +00:00
|
|
|
if( !m_Guide->IsLayerLocked( layer ) || !m_Guide->IgnoreLockedLayers() )
|
2007-08-30 22:20:52 +00:00
|
|
|
{
|
|
|
|
if( !item->IsLocked() || !m_Guide->IgnoreLockedItems() )
|
|
|
|
{
|
2020-02-03 02:23:27 +00:00
|
|
|
int accuracy = KiROUND( 5 * m_Guide->OnePixelInIU() );
|
|
|
|
|
2018-11-17 00:34:12 +00:00
|
|
|
if( zone )
|
2007-08-30 22:20:52 +00:00
|
|
|
{
|
2018-11-17 00:34:12 +00:00
|
|
|
bool testFill = !m_Guide->IgnoreZoneFills();
|
|
|
|
|
2020-10-02 20:25:14 +00:00
|
|
|
if( zone->HitTestForCorner( m_refPos, accuracy * 2 )
|
|
|
|
|| zone->HitTestForEdge( m_refPos, accuracy )
|
|
|
|
|| ( testFill && zone->HitTestFilledArea( layer, m_refPos ) ) )
|
2018-11-17 00:34:12 +00:00
|
|
|
{
|
|
|
|
Append2nd( item );
|
|
|
|
goto exit;
|
|
|
|
}
|
2007-08-30 22:20:52 +00:00
|
|
|
}
|
2020-02-03 02:23:27 +00:00
|
|
|
else if( item->Type() == PCB_MODULE_T )
|
2018-11-17 00:34:12 +00:00
|
|
|
{
|
2020-10-02 20:25:14 +00:00
|
|
|
if( module->HitTest( m_refPos, accuracy )
|
|
|
|
&& module->HitTestAccurate( m_refPos, accuracy ) )
|
2020-02-03 02:23:27 +00:00
|
|
|
{
|
|
|
|
Append( item );
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if( drawSegment )
|
|
|
|
{
|
2020-10-02 20:25:14 +00:00
|
|
|
if( drawSegment->HitTest( m_refPos, accuracy ) )
|
2020-02-03 02:23:27 +00:00
|
|
|
{
|
|
|
|
Append( item );
|
|
|
|
goto exit;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2020-10-02 20:25:14 +00:00
|
|
|
if( item->HitTest( m_refPos, 0 ) )
|
2020-02-03 02:23:27 +00:00
|
|
|
{
|
|
|
|
Append( item );
|
|
|
|
goto exit;
|
|
|
|
}
|
2018-11-04 19:16:56 +00:00
|
|
|
}
|
2007-08-30 22:20:52 +00:00
|
|
|
}
|
|
|
|
}
|
2007-08-23 04:28:46 +00:00
|
|
|
}
|
|
|
|
}
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2007-08-30 22:20:52 +00:00
|
|
|
exit:
|
2019-12-28 00:55:11 +00:00
|
|
|
return SEARCH_RESULT::CONTINUE; // always when collecting
|
2007-08-23 04:28:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2007-09-11 04:16:31 +00:00
|
|
|
void GENERAL_COLLECTOR::Collect( BOARD_ITEM* aItem, const KICAD_T aScanList[],
|
2008-01-08 17:44:20 +00:00
|
|
|
const wxPoint& aRefPos, const COLLECTORS_GUIDE& aGuide )
|
2007-08-30 03:53:26 +00:00
|
|
|
{
|
|
|
|
Empty(); // empty the collection, primary criteria list
|
|
|
|
Empty2nd(); // empty the collection, secondary criteria list
|
|
|
|
|
2007-08-30 22:20:52 +00:00
|
|
|
// remember guide, pass it to Inspect()
|
2007-09-11 04:16:31 +00:00
|
|
|
SetGuide( &aGuide );
|
|
|
|
|
|
|
|
SetScanTypes( aScanList );
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2007-08-30 22:20:52 +00:00
|
|
|
// remember where the snapshot was taken from and pass refPos to
|
|
|
|
// the Inspect() function.
|
2007-09-06 04:34:03 +00:00
|
|
|
SetRefPos( aRefPos );
|
2007-08-30 03:53:26 +00:00
|
|
|
|
2020-10-02 20:25:14 +00:00
|
|
|
aItem->Visit( m_inspector, NULL, m_scanTypes );
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2015-04-03 09:13:06 +00:00
|
|
|
// record the length of the primary list before concatenating on to it.
|
2020-10-02 20:25:14 +00:00
|
|
|
m_PrimaryLength = m_list.size();
|
2008-01-08 17:44:20 +00:00
|
|
|
|
|
|
|
// append 2nd list onto end of the first list
|
|
|
|
for( unsigned i = 0; i<m_List2nd.size(); ++i )
|
2007-08-30 22:20:52 +00:00
|
|
|
Append( m_List2nd[i] );
|
2008-01-08 17:44:20 +00:00
|
|
|
|
2007-08-30 03:53:26 +00:00
|
|
|
Empty2nd();
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2016-07-12 19:05:54 +00:00
|
|
|
SEARCH_RESULT PCB_TYPE_COLLECTOR::Inspect( EDA_ITEM* testItem, void* testData )
|
2008-01-22 20:35:46 +00:00
|
|
|
{
|
2017-09-28 17:00:24 +00:00
|
|
|
// The Visit() function only visits the testItem if its type was in the
|
2008-01-22 20:35:46 +00:00
|
|
|
// the scanList, so therefore we can collect anything given to us here.
|
|
|
|
Append( testItem );
|
2008-02-19 16:54:57 +00:00
|
|
|
|
2019-12-28 00:55:11 +00:00
|
|
|
return SEARCH_RESULT::CONTINUE; // always when collecting
|
2008-01-22 20:35:46 +00:00
|
|
|
}
|
|
|
|
|
Modular KiCad Blueprint Milestone B), major portions:
*) When kicad.exe closes a project, close any open KIFACEs so that they cannot
get disassociated from their true PROJECT.
*) Allow loading eeschema library editor from kicad.exe
*) Allow loading pcbnew library editor from kicad.exe
*) Rename LIB_COMPONENT to LIB_PART.
*) Add class PART_LIBS, and PART_LIB.
*) Make PART_LIBS non-global, i.e. PROJECT specific.
*) Implement "data on demand" for PART_LIBS
*) Implement "data on demand" for schematic SEARCH_STACK.
*) Use RSTRINGs to retain eeschema editor's notion of last library and part being edited.
*) Get rid of library search on every SCH_COMPONENT::Draw() call, instead use
a weak pointer.
*) Remove all chdir() calls so projects don't need to be CWD.
*) Romove APPEND support from OpenProjectFiles().
*) Make OpenProjectFiles() robust, even for creating new projects.
*) Load EESCHEMA colors in the KIWAY::OnKiwayStart() rather in window open,
and save them in the .eeschema config file, not in the project file.
*) Fix bug with wxDir() while accessing protected dirs in kicad.exe
*) Consolidate template copying into PROJECT class, not in kicad.exe source.
*) Generally untangle eeschema, making its libraries not global but rather
held in the PROJECT.
2014-08-13 20:28:54 +00:00
|
|
|
|
|
|
|
void PCB_TYPE_COLLECTOR::Collect( BOARD_ITEM* aBoard, const KICAD_T aScanList[] )
|
2008-01-22 20:35:46 +00:00
|
|
|
{
|
|
|
|
Empty(); // empty any existing collection
|
2008-02-19 16:54:57 +00:00
|
|
|
|
2016-07-12 19:05:54 +00:00
|
|
|
aBoard->Visit( m_inspector, NULL, aScanList );
|
2008-01-22 20:35:46 +00:00
|
|
|
}
|
2017-09-28 17:00:24 +00:00
|
|
|
|
|
|
|
|
|
|
|
SEARCH_RESULT PCB_LAYER_COLLECTOR::Inspect( EDA_ITEM* testItem, void* testData )
|
|
|
|
{
|
|
|
|
BOARD_ITEM* item = (BOARD_ITEM*) testItem;
|
|
|
|
|
2020-08-09 11:22:09 +00:00
|
|
|
if( item->IsOnLayer( m_layer_id ) )
|
2017-09-28 17:00:24 +00:00
|
|
|
Append( testItem );
|
|
|
|
|
2019-12-28 00:55:11 +00:00
|
|
|
return SEARCH_RESULT::CONTINUE;
|
2017-09-28 17:00:24 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void PCB_LAYER_COLLECTOR::Collect( BOARD_ITEM* aBoard, const KICAD_T aScanList[] )
|
|
|
|
{
|
|
|
|
Empty();
|
|
|
|
|
|
|
|
aBoard->Visit( m_inspector, NULL, aScanList );
|
|
|
|
}
|