2017-11-14 19:28:11 +00:00
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EESchema Schematic File Version 4
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2016-08-11 12:42:22 +00:00
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LIBS:rectifier-cache
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2017-11-14 19:28:11 +00:00
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EELAYER 26 0
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2016-08-11 12:42:06 +00:00
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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Sheet 1 1
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Title ""
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Date ""
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Rev ""
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Comp ""
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Comment1 ""
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndDescr
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$Comp
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2017-11-14 19:28:11 +00:00
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L rectifier_schlib:VSOURCE V1
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2016-08-11 12:42:06 +00:00
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U 1 1 57336052
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P 4400 4050
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F 0 "V1" H 4528 4096 50 0000 L CNN
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F 1 "SINE(0 1.5 1k 0 0 0 0)" H 4528 4005 50 0000 L CNN
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F 2 "" H 4400 4050 50 0000 C CNN
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F 3 "" H 4400 4050 50 0000 C CNN
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2016-08-13 14:46:06 +00:00
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F 4 "Value" H 4400 4050 60 0001 C CNN "Fieldname"
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F 5 "V" H 4400 4050 60 0001 C CNN "Spice_Primitive"
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F 6 "1 2" H 4100 4250 60 0001 C CNN "Spice_Node_Sequence"
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2016-08-11 12:42:06 +00:00
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1 4400 4050
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-1 0 0 1
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$EndComp
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$Comp
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2017-11-14 19:28:11 +00:00
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L rectifier_schlib:GND #PWR01
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2016-08-11 12:42:06 +00:00
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U 1 1 573360D3
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P 4400 4350
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2017-11-14 19:28:11 +00:00
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F 0 "#PWR01" H 4400 4100 50 0001 C CNN
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2016-08-11 12:42:06 +00:00
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F 1 "GND" H 4405 4177 50 0000 C CNN
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F 2 "" H 4400 4350 50 0000 C CNN
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F 3 "" H 4400 4350 50 0000 C CNN
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1 4400 4350
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1 0 0 -1
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$EndComp
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$Comp
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2017-11-14 19:28:11 +00:00
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L rectifier_schlib:R R1
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2016-08-11 12:42:06 +00:00
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U 1 1 573360F5
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P 4650 3700
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F 0 "R1" V 4443 3700 50 0000 C CNN
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F 1 "1k" V 4534 3700 50 0000 C CNN
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F 2 "" V 4580 3700 50 0000 C CNN
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F 3 "" H 4650 3700 50 0000 C CNN
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2016-08-13 14:46:06 +00:00
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F 4 "Value" H 4650 3700 60 0001 C CNN "Fieldname"
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F 5 "1 2" H 4650 3700 60 0001 C CNN "SpiceMapping"
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F 6 "R" V 4650 3700 60 0001 C CNN "Spice_Primitive"
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2016-08-11 12:42:06 +00:00
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1 4650 3700
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0 1 1 0
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$EndComp
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$Comp
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2017-11-14 19:28:11 +00:00
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L rectifier_schlib:D D1
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2016-08-11 12:42:06 +00:00
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U 1 1 573361B8
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P 5100 3700
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F 0 "D1" H 5100 3485 50 0000 C CNN
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F 1 "1N4148" H 5100 3576 50 0000 C CNN
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F 2 "" H 5100 3700 50 0000 C CNN
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F 3 "" H 5100 3700 50 0000 C CNN
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2016-08-13 14:46:06 +00:00
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F 4 "Value" H 5100 3700 60 0001 C CNN "Fieldname"
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F 5 "D" H 5100 3700 60 0001 C CNN "Spice_Primitive"
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F 6 "2 1" H 5100 3700 60 0001 C CNN "Spice_Node_Sequence"
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2016-08-11 12:42:06 +00:00
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1 5100 3700
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-1 0 0 1
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$EndComp
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$Comp
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2017-11-14 19:28:11 +00:00
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L rectifier_schlib:C C1
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2016-08-11 12:42:06 +00:00
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U 1 1 5733628F
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P 5400 4000
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F 0 "C1" H 5515 4046 50 0000 L CNN
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F 1 "100n" H 5515 3955 50 0000 L CNN
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F 2 "" H 5438 3850 50 0000 C CNN
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F 3 "" H 5400 4000 50 0000 C CNN
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2016-08-13 14:46:06 +00:00
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F 4 "Value" H 5400 4000 60 0001 C CNN "Fieldname"
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F 5 "C" H 5400 4000 60 0001 C CNN "Spice_Primitive"
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F 6 "1 2" H 5400 4000 60 0001 C CNN "SpiceMapping"
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2016-08-11 12:42:06 +00:00
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1 5400 4000
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1 0 0 -1
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$EndComp
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$Comp
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2017-11-14 19:28:11 +00:00
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L rectifier_schlib:R R2
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2016-08-11 12:42:06 +00:00
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U 1 1 573362F7
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P 5750 4000
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F 0 "R2" H 5680 3954 50 0000 R CNN
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F 1 "100k" H 5680 4045 50 0000 R CNN
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F 2 "" V 5680 4000 50 0000 C CNN
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F 3 "" H 5750 4000 50 0000 C CNN
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2016-08-13 14:46:06 +00:00
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F 4 "Value" H 5750 4000 60 0001 C CNN "Fieldname"
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F 5 "1 2" H 5750 4000 60 0001 C CNN "SpiceMapping"
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F 6 "R" V 5750 4000 60 0001 C CNN "Spice_Primitive"
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2016-08-11 12:42:06 +00:00
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1 5750 4000
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-1 0 0 1
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$EndComp
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Text Notes 4300 4900 0 60 ~ 0
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.tran 1u 10m\n
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Wire Wire Line
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4400 4350 4400 4250
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Wire Wire Line
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4400 4300 5750 4300
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Connection ~ 4400 4300
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Wire Wire Line
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5250 3700 5750 3700
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Wire Wire Line
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5750 3700 5750 3850
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Wire Wire Line
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5400 3850 5400 3700
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Connection ~ 5400 3700
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Wire Wire Line
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5400 4300 5400 4150
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Wire Wire Line
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5750 4300 5750 4150
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Connection ~ 5400 4300
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Wire Wire Line
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4800 3700 4950 3700
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Wire Wire Line
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4400 3850 4400 3700
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Wire Wire Line
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4400 3700 4500 3700
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2017-11-14 19:28:11 +00:00
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Text Label 4400 3700 2 60 ~ 0
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signal_in
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Text Label 5750 3700 0 60 ~ 0
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rect_out
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2016-08-11 12:42:06 +00:00
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Text Notes 4300 5000 0 60 ~ 0
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*.ac dec 10 1 1Meg\n
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$EndSCHEMATC
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