kicad/pcbnew/drc/drc_test_provider_hole_clea...

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/*
* This program source code file is part of KiCad, a free EDA CAD application.
*
* Copyright (C) 2004-2020 KiCad Developers.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, you may find one here:
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
* or you may search the http://www.gnu.org website for the version 2 license,
* or you may write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#include <common.h>
#include <pad.h>
#include <track.h>
#include <geometry/shape_segment.h>
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#include <geometry/shape_circle.h>
#include <drc/drc_item.h>
#include <drc/drc_rule.h>
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#include <drc/drc_test_provider_clearance_base.h>
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#include "drc_rtree.h"
/*
Holes clearance test. Checks pad and via holes for their mechanical clearances.
Generated errors:
- DRCE_DRILLED_HOLES_TOO_CLOSE
TODO: vias-in-smd-pads check
*/
class DRC_TEST_PROVIDER_HOLE_CLEARANCE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
{
public:
DRC_TEST_PROVIDER_HOLE_CLEARANCE () :
DRC_TEST_PROVIDER_CLEARANCE_BASE(),
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m_board( nullptr )
{
}
virtual ~DRC_TEST_PROVIDER_HOLE_CLEARANCE()
{
}
virtual bool Run() override;
virtual const wxString GetName() const override
{
return "hole_clearance";
};
virtual const wxString GetDescription() const override
{
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return "Tests hole to hole spacing";
}
virtual std::set<DRC_CONSTRAINT_TYPE_T> GetConstraintTypes() const override;
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int GetNumPhases() const override;
private:
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bool testHoleAgainstHole( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, BOARD_ITEM* aOther );
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BOARD* m_board;
DRC_RTREE m_holeTree;
};
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static std::shared_ptr<SHAPE_CIRCLE> getDrilledHoleShape( BOARD_ITEM* aItem )
{
if( aItem->Type() == PCB_VIA_T )
{
VIA* via = static_cast<VIA*>( aItem );
return std::make_shared<SHAPE_CIRCLE>( via->GetCenter(), via->GetDrillValue() / 2 );
}
else if( aItem->Type() == PCB_PAD_T )
{
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PAD* pad = static_cast<PAD*>( aItem );
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return std::make_shared<SHAPE_CIRCLE>( pad->GetPosition(), pad->GetDrillSize().x / 2 );
}
return std::make_shared<SHAPE_CIRCLE>( VECTOR2I( 0, 0 ), 0 );
}
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bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run()
{
m_board = m_drcEngine->GetBoard();
DRC_CONSTRAINT worstClearanceConstraint;
if( m_drcEngine->QueryWorstConstraint( HOLE_TO_HOLE_CONSTRAINT, worstClearanceConstraint ) )
{
m_largestClearance = worstClearanceConstraint.GetValue().Min();
reportAux( "Worst hole to hole : %d nm", m_largestClearance );
}
else
{
reportAux( "No hole to hole constraints found..." );
return false;
}
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// This is the number of tests between 2 calls to the progress bar
const size_t delta = 50;
size_t count = 0;
size_t ii = 0;
m_holeTree.clear();
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auto countItems =
[&]( BOARD_ITEM* item ) -> bool
{
if( item->Type() == PCB_PAD_T )
++count;
else if( item->Type() == PCB_VIA_T )
++count;
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return true;
};
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auto addToHoleTree =
[&]( BOARD_ITEM* item ) -> bool
{
if( !reportProgress( ii++, count, delta ) )
return false;
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if( item->Type() == PCB_PAD_T )
{
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PAD* pad = static_cast<PAD*>( item );
// We only care about drilled (ie: round) holes
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if( pad->GetDrillSize().x && pad->GetDrillSize().x == pad->GetDrillSize().y )
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m_holeTree.Insert( item, m_largestClearance, F_Cu );
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}
else if( item->Type() == PCB_VIA_T )
{
VIA* via = static_cast<VIA*>( item );
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// We only care about mechanically drilled (ie: non-laser) holes
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if( via->GetViaType() == VIATYPE::THROUGH )
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m_holeTree.Insert( item, m_largestClearance, F_Cu );
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}
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return true;
};
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if( !reportPhase( _( "Checking hole to hole clearances..." ) ) )
return false;
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forEachGeometryItem( { PCB_PAD_T, PCB_VIA_T }, LSET::AllLayersMask(), countItems );
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count *= 2; // One for adding to tree; one for checking
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forEachGeometryItem( { PCB_PAD_T, PCB_VIA_T }, LSET::AllLayersMask(), addToHoleTree );
std::map< std::pair<BOARD_ITEM*, BOARD_ITEM*>, int> checkedPairs;
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for( TRACK* track : m_board->Tracks() )
{
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if( track->Type() != PCB_VIA_T )
continue;
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VIA* via = static_cast<VIA*>( track );
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if( !reportProgress( ii++, count, delta ) )
break;
// We only care about mechanically drilled (ie: non-laser) holes
if( via->GetViaType() == VIATYPE::THROUGH )
{
std::shared_ptr<SHAPE_CIRCLE> holeShape = getDrilledHoleShape( via );
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m_holeTree.QueryColliding( via, F_Cu, F_Cu,
// Filter:
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[&]( BOARD_ITEM* other ) -> bool
{
BOARD_ITEM* a = via;
BOARD_ITEM* b = other;
// store canonical order so we don't collide in both directions
// (a:b and b:a)
if( static_cast<void*>( a ) > static_cast<void*>( b ) )
std::swap( a, b );
if( checkedPairs.count( { a, b } ) )
{
return false;
}
else
{
checkedPairs[ { a, b } ] = 1;
return true;
}
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},
// Visitor:
[&]( BOARD_ITEM* other ) -> bool
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{
return testHoleAgainstHole( via, holeShape.get(), other );
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},
m_largestClearance );
}
}
checkedPairs.clear();
for( FOOTPRINT* footprint : m_board->Footprints() )
{
for( PAD* pad : footprint->Pads() )
{
if( !reportProgress( ii++, count, delta ) )
break;
// We only care about drilled (ie: round) holes
if( pad->GetDrillSize().x && pad->GetDrillSize().x == pad->GetDrillSize().y )
{
std::shared_ptr<SHAPE_CIRCLE> holeShape = getDrilledHoleShape( pad );
m_holeTree.QueryColliding( pad, F_Cu, F_Cu,
// Filter:
[&]( BOARD_ITEM* other ) -> bool
{
BOARD_ITEM* a = pad;
BOARD_ITEM* b = other;
// store canonical order so we don't collide in both directions
// (a:b and b:a)
if( static_cast<void*>( a ) > static_cast<void*>( b ) )
std::swap( a, b );
if( checkedPairs.count( { a, b } ) )
{
return false;
}
else
{
checkedPairs[ { a, b } ] = 1;
return true;
}
},
// Visitor:
[&]( BOARD_ITEM* other ) -> bool
{
return testHoleAgainstHole( pad, holeShape.get(), other );
},
m_largestClearance );
}
}
}
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reportRuleStatistics();
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return true;
}
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bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::testHoleAgainstHole( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole,
BOARD_ITEM* aOther )
{
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if( m_drcEngine->IsErrorLimitExceeded( DRCE_DRILLED_HOLES_TOO_CLOSE ) )
return false;
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std::shared_ptr<SHAPE_CIRCLE> otherHole = getDrilledHoleShape( aItem );
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// Holes with identical locations are allowable
if( aHole->GetCenter() == otherHole->GetCenter() )
return true;
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int actual = ( aHole->GetCenter() - otherHole->GetCenter() ).EuclideanNorm();
actual = std::max( 0, actual - aHole->GetRadius() - otherHole->GetRadius() );
auto constraint = m_drcEngine->EvalRulesForItems( HOLE_CLEARANCE_CONSTRAINT, aItem, aOther );
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int minClearance = constraint.GetValue().Min();
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accountCheck( constraint.GetParentRule() );
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if( actual < minClearance )
{
std::shared_ptr<DRC_ITEM> drce = DRC_ITEM::Create( DRCE_DRILLED_HOLES_TOO_CLOSE );
m_msg.Printf( _( "(%s min %s; actual %s)" ),
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constraint.GetName(),
MessageTextFromValue( userUnits(), minClearance ),
MessageTextFromValue( userUnits(), actual ) );
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drce->SetErrorMessage( drce->GetErrorText() + wxS( " " ) + m_msg );
drce->SetItems( aItem, aOther );
drce->SetViolatingRule( constraint.GetParentRule() );
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reportViolation( drce, (wxPoint) aHole->GetCenter() );
}
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return true;
}
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int DRC_TEST_PROVIDER_HOLE_CLEARANCE::GetNumPhases() const
{
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return 1;
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}
std::set<DRC_CONSTRAINT_TYPE_T> DRC_TEST_PROVIDER_HOLE_CLEARANCE::GetConstraintTypes() const
{
return { HOLE_TO_HOLE_CONSTRAINT };
}
namespace detail
{
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static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_HOLE_CLEARANCE> dummy;
}