Translated using Weblate (Chinese (Simplified))
Currently translated at 97.8% (6347 of 6485 strings) Translation: KiCad EDA/master source Translate-URL: https://hosted.weblate.org/projects/kicad/master-source/zh_Hans/
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Hosted Weblate
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commit
0c562f6c2c
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@ -2,23 +2,23 @@
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# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER
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# This file is distributed under the same license as the PACKAGE package.
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# taotieren <admin@taotieren.com>,2019-2020.
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#
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msgid ""
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msgstr ""
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"Project-Id-Version: KiCad_zh_CN_Master_v0.0.32\n"
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"Report-Msgid-Bugs-To: \n"
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"POT-Creation-Date: 2020-10-20 14:37-0700\n"
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"PO-Revision-Date: 2020-10-11 15:31+0800\n"
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"PO-Revision-Date: 2020-10-21 18:39+0000\n"
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"Last-Translator: taotieren <admin@taotieren.com>\n"
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"Language-Team: kicad-cn\n"
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"Language-Team: Chinese (Simplified) <https://hosted.weblate.org/projects/"
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"kicad/master-source/zh_Hans/>\n"
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"Language: zh_CN\n"
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"MIME-Version: 1.0\n"
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"Content-Type: text/plain; charset=UTF-8\n"
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"Content-Transfer-Encoding: 8bit\n"
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"Plural-Forms: nplurals=1; plural=0;\n"
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"X-Generator: Weblate 4.3.1\n"
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"X-Poedit-KeywordsList: _HKI;_\n"
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"X-Poedit-Basepath: ../../kicad-source-mirror\n"
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"X-Generator: Poedit 2.4.1\n"
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"Plural-Forms: nplurals=1; plural=0;\n"
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"X-Poedit-SourceCharset: UTF-8\n"
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"X-Poedit-SearchPath-0: .\n"
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"X-Poedit-SearchPathExcluded-0: resources\n"
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@ -1172,7 +1172,7 @@ msgstr "mm"
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#: pcbnew/dialogs/dialog_pad_properties_base.cpp:752
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#: pcbnew/dialogs/dialog_plot_base.cpp:378
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msgid "Inch"
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msgstr "Inch"
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msgstr "Inch (英寸)"
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#: bitmap2component/bitmap2cmp_gui.cpp:154
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msgid "DPI"
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@ -1416,7 +1416,7 @@ msgstr "cu. mm"
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#: pagelayout_editor/pl_editor_frame.cpp:728
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#: pcbnew/import_gfx/dialog_import_gfx_base.cpp:143
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msgid "mils"
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msgstr "mils"
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msgstr "mils (密尔)"
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#: common/base_units.cpp:518
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msgid "sq. mils"
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@ -1841,10 +1841,10 @@ msgid ""
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"this behavior, either rename any conflicting entries or remove\n"
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"the external environment variable(s) from your system."
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msgstr ""
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"KiCad 下次启动时，将应用预定义路径\n"
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"路径配置对话框中定义的所有设置均无效。\n"
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"如果你不想这样, 请重命名任何冲突\n"
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"的条目或删除系统中的外部环境变量。"
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"下次启动 KiCad 时，将支持已定义的任何路径，\n"
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"并忽略在路径配置对话框中定义的任何设置。\n"
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"如果您不打算执行此行为，\n"
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"请重命名任何冲突的条目或从系统中删除外部环境变量。"
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#: common/dialogs/dialog_configure_paths.cpp:357
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#, c-format
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@ -1939,9 +1939,9 @@ msgid ""
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"use the default selection."
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msgstr ""
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"KiCad 首次使用新的 %s 库表来访问库。\n"
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"为了让 KiCad 访问 %s 库，\n"
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"你必须配置全局 %s 库表。 请从下面的选项中进行选择。\n"
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"如果你不确定要选择哪个选项，请使用默认选择。"
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"为了让 KiCad 访问 %s 库，您必须配置全局 %s 库表。\n"
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"请从以下选项中选择一个。\n"
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"如果您不确定要选择哪个选项，请使用默认选择。"
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#: common/dialogs/dialog_global_lib_table_config.cpp:49
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#, c-format
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@ -2697,7 +2697,7 @@ msgstr "新主题..."
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#: common/dialogs/panel_color_settings.cpp:213
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msgid "(read-only)"
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msgstr ""
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msgstr "(只读)"
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#: common/dialogs/panel_color_settings.cpp:282
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msgid "Copy color"
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@ -4051,12 +4051,13 @@ msgid ""
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"Full error text:\n"
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"%s"
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msgstr ""
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"KiCad 无法打开此文件，，因为它是用其他文件创建的最新版本（而不是您正在运行的"
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"版本）。要打开它，您需要将 KiCad 升级到更新版本。\n"
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"KiCad 无法打开此文件，因为它是用比您\n"
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"正在运行的版本更新的版本创建的。\n"
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"要打开它，您需要将 KiCad 升级到更新版本。\n"
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"\n"
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"需要的 KiCad 版本日期（或更新）：%s\n"
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"所需的 KiCad 版本日期(或更新版本)：%s。\n"
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"\n"
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"完整的错误文本：\n"
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"完整错误文本：\n"
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"%s"
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#: common/filehistory.cpp:155
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@ -8265,61 +8266,49 @@ msgid "Show Annotation dialog."
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msgstr "标注完成。"
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#: eeschema/dialogs/dialog_erc.cpp:300
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#, fuzzy
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msgid "-------- ERC cancelled by user.<br><br>"
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msgstr ""
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"-------- 用户取消的 DRC。\n"
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"\n"
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msgstr "-------- 用户取消的 ERC。<br><br>"
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#: eeschema/dialogs/dialog_erc.cpp:302 eeschema/dialogs/dialog_erc.cpp:432
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#: pcbnew/dialogs/dialog_drc.cpp:256
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msgid "Done.<br><br>"
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msgstr ""
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msgstr "完成。<br><br>"
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#: eeschema/dialogs/dialog_erc.cpp:363
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#, fuzzy
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msgid "Checking sheet names..."
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msgstr "检查图框名称...\n"
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msgstr "检查图框名称..."
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#: eeschema/dialogs/dialog_erc.cpp:369
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#, fuzzy
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msgid "Checking bus conflicts..."
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msgstr "检查总线冲突...\n"
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msgstr "正在检查总线冲突..."
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#: eeschema/dialogs/dialog_erc.cpp:374
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#, fuzzy
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msgid "Checking conflicts..."
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msgstr "正在检查冲突...\n"
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msgstr "正在检查冲突..."
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#: eeschema/dialogs/dialog_erc.cpp:381
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#, fuzzy
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msgid "Checking footprints..."
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msgstr "检查封装...\n"
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msgstr "检查封装..."
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#: eeschema/dialogs/dialog_erc.cpp:385
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#, fuzzy
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msgid "Checking pins..."
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msgstr "检查引脚...\n"
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msgstr "正在检查引脚..."
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#: eeschema/dialogs/dialog_erc.cpp:398
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#, fuzzy
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msgid "Checking labels..."
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msgstr "检查标签...\n"
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msgstr "正在检查标签..."
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#: eeschema/dialogs/dialog_erc.cpp:404
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#, fuzzy
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msgid "Checking for unresolved variables..."
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msgstr "正在检查未解析的变量...\n"
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msgstr "正在检查未解析的变量..."
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#: eeschema/dialogs/dialog_erc.cpp:410
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#, fuzzy
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msgid "Checking no connect pins for connections..."
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msgstr "正在检查没有连接的连接引脚...\n"
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msgstr "正在检查没有连接的连接引脚..."
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#: eeschema/dialogs/dialog_erc.cpp:416
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#, fuzzy
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msgid "Checking for library symbol issues..."
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msgstr "正在检查库符号问题...\n"
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msgstr "正在检查库符号问题..."
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#: eeschema/dialogs/dialog_erc.cpp:494 pcbnew/dialogs/dialog_drc.cpp:386
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msgid "errors"
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@ -9236,7 +9225,7 @@ msgstr "选择输出目录"
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msgid ""
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"Do you want to use a path relative to\n"
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"\"%s\""
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msgstr "你想使用 \"%s\" 的相对路径吗?"
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msgstr "是否要使用 \"%s\" 的相对路径"
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#: eeschema/dialogs/dialog_plot_schematic.cpp:171
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#: pcbnew/dialogs/dialog_export_svg.cpp:198
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@ -10643,8 +10632,7 @@ msgid ""
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" %s"
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msgstr ""
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"无法写入工程符号库表。 错误：\n"
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" \n"
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"%s"
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" %s"
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#: eeschema/dialogs/dialog_symbol_remap.cpp:238
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msgid "Created project symbol library table.\n"
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@ -11530,7 +11518,9 @@ msgid ""
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"The entire schematic could not be loaded. Errors occurred attempting to "
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"load \n"
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"hierarchical sheet schematics."
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msgstr "整个原理图不能被加载。 尝试加载层次原理图时发生错误。"
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msgstr ""
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"整个原理图不能被加载。 尝试加载\n"
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"层次原理图时发生错误。"
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#: eeschema/files-io.cpp:386
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#, c-format
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@ -12044,10 +12034,7 @@ msgstr "没有找到符号。"
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#: eeschema/libedit/lib_manager.cpp:378
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#, c-format
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msgid "Error loading symbol \"%s\" from library \"%s\". (%s)"
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msgstr ""
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"加载符号 %s 发生错误，来自于库 %s。\n"
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"\n"
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"%s"
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msgstr "加载符号 %s 发生错误，来自于库 \"%s\" 。 (%s)"
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#: eeschema/libedit/lib_manager.cpp:564
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#, c-format
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@ -12608,9 +12595,9 @@ msgid "Unknown SCH_FILE_T value: %d"
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msgstr "未知 SCH_FILE_T 值：%d"
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#: eeschema/sch_iref.cpp:138
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#, fuzzy, c-format
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#, c-format
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msgid "Go to Page %s (%s)"
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msgstr "转到第 %d 页 (%s)"
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msgstr "转到第 %s 页 (%s)"
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#: eeschema/sch_iref.cpp:145
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#: pcbnew/dialogs/dialog_board_reannotate_base.cpp:177
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@ -13385,7 +13372,6 @@ msgid "Syntax Help"
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msgstr "语法帮助"
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#: eeschema/sch_text_help_md.h:2
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#, fuzzy
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msgid ""
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"<table>\n"
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" <tr>\n"
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@ -13520,53 +13506,138 @@ msgid ""
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" </tr>\n"
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"</table>\n"
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msgstr ""
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"<table> <tr> <th>标记</th> <th></th> <th>结果</th> </"
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"tr> <tr> <td> <br><samp>^{superscript}</samp></td> <td></"
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"td> <td> <br><samp><sup>上标</sup> </samp></td> </tr> "
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"<tr> <td> <br><samp>电路板驱动^{Rev A}</samp></td> <td></"
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"td> <td> <br><samp>电路板驱动<sup>Rev A</sup></samp></td> </"
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"tr> <tr><td><br></td></tr> <tr> <td> <br><samp>_{subscript}</"
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"samp></td> <td></td> <td> <br><samp><sub>下标</sub> </"
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"samp></td> </tr> <tr> <td> <br><samp>D_{0} - D_{15}</samp></"
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"td> <td></td> <td> <br><samp>D<sub>0</sub> - D<sub>31</sub></"
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"samp></td> </tr> <tr><td></td></tr> <tr> <td> "
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"<br><samp>~overbar</samp><br> <br><samp>~CLK</"
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"samp><br> <br><samp>~~</samp> </td> <td></td> "
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"<td> <samp><u> </u></"
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"samp><br> <samp>波浪号</samp><br> <samp><u> "
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"</u></samp><br> <samp>CLK</samp><br> <samp> </"
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"samp><br> <samp>~</samp> </td> </tr> <tr><td><br></td></"
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"tr> <tr> <td> <br><samp>${variable}</samp></td> <td></"
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"td> <td> <br><samp><i>变量_值</i></samp></td> </tr> <tr> "
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"<td> <br><samp>${REVISION}</samp></td> <td></td> <td> "
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"<br><samp>2020.1</samp></td> </tr> <tr><td><br></td></tr> <tr> "
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"<td> <br><samp>${refdes:field}</samp></td> <td></td> "
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"<td> <br><samp><i>字段_值</i> 符号的数量 <i>元件名称</i></samp></td> "
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"</tr> <tr> <td> <br><samp>${R3:VALUE}</samp></td> <td></"
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"td> <td> <br><samp>150K</samp></td> </tr> <tr><td><br></td></"
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"tr> <tr><td><br></td></tr> <tr> <th>总线定义</th> <th> "
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" </"
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"th> <th>结果网络</th> </tr> <tr> <td> <br><samp>前缀[m.."
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"n]</samp></td> <td></td> <td> <br><samp>前缀 m 到前缀 n</"
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"samp></td> </tr> <tr> <td> <br><samp>D[0..7]</samp></td> "
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"<td></td> <td> <br><samp>D0, D1, D2, D3, D4, D5, D6, D7</samp></"
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"td> </tr> <tr><td><br></td></tr> <tr><samp> <td> "
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"<br><samp>{net1 net2 ...}</samp></td> <td></td> <td> "
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"<br><samp>net1, net2, ...</samp></td> </tr> <tr> <td> "
|
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"<br><samp>{SCL SDA}</samp></td> <td></td> <td> <br><samp>SCL, "
|
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"SDA</samp></td> </tr></samp> <tr><td><br></td></tr> <tr> "
|
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"<td> <br><samp>前缀{net1 net2 ...}</samp></td> <td></td> "
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"<td> <br><samp>前缀.net1, 前缀.net2, ...</samp></td> </tr> "
|
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"<tr> <td> <br><samp>USB1{DP DM}</samp></td> <td></td> "
|
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"<td> <br><samp>USB1.DP, USB1.DM</samp></td> </tr> <tr><td><br></"
|
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"td></tr> <tr> <td> <br><samp>MEM{D[1..2] LATCH}</samp></td> "
|
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"<td></td> <td> <br> <samp>MEM.D1, MEM.D2, MEM.LATCH</"
|
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"samp> </td> </tr> <tr> <td> <br><samp>MEM{D_{[1..2]} "
|
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"~LATCH}</samp></td> <td></td> <td> <samp> "
|
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" "
|
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" <u> </"
|
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"u></samp><br> <samp>MEM.D<sub>1</sub>, MEM.D<sub>2</sub>, MEM.LATCH</"
|
||||
"samp> </td> </tr></table>"
|
||||
"<table>\n"
|
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" <tr>\n"
|
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" <th>标记</th>\n"
|
||||
" <th></th>\n"
|
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" <th>结果</th>\n"
|
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" </tr>\n"
|
||||
" <tr>\n"
|
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" <td> <br><samp>^{superscript}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp><sup>上标</sup> </samp></td>\n"
|
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" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>电路板驱动^{Rev A}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>电路板驱动<sup>Rev A</sup></samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>_{subscript}</samp></td>\n"
|
||||
" <td></td>\n"
|
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" <td> <br><samp><sub>下标</sub> </samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>D_{0} - D_{15}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>D<sub>0</sub> - D<sub>31</sub></samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>~overbar</samp><br> <br><samp>~CLK</"
|
||||
"samp><br> <br><samp>~~</samp> </td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <samp><u> </u></"
|
||||
"samp><br> <samp>波浪号</samp><br> <samp><u> </u></samp><br> "
|
||||
"<samp>CLK</samp><br> <samp> </samp><br> <samp>~</samp> </td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>${variable}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp><i>变量_值</i></samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>${REVISION}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>2020.1</samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>${refdes:field}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp><i>字段_值</i> 符号的数量 <i>元件名称</i></samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>${R3:VALUE}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>150K</samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <th>总线定义</th>\n"
|
||||
" <th>  "
|
||||
"; </th>\n"
|
||||
" <th>合成网络</th>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>前缀[m..n]</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>前缀 m 到前缀 n</samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>D[0..7]</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>D0, D1, D2, D3, D4, D5, D6, D7</samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr><samp>\n"
|
||||
" <td> <br><samp>{net1 net2 ...}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>net1, net2, ...</samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>{SCL SDA}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>SCL, SDA</samp></td>\n"
|
||||
" </tr></samp>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>前缀{net1 net2 ...}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>前缀.net1, 前缀.net2, ...</samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>USB1{DP DM}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br><samp>USB1.DP, USB1.DM</samp></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td><br></td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>MEM{D[1..2] LATCH}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> <br> <samp>MEM.D1, MEM.D2, MEM.LATCH</samp> </td>\n"
|
||||
" </tr>\n"
|
||||
" <tr>\n"
|
||||
" <td> <br><samp>MEM{D_{[1..2]} ~LATCH}</samp></td>\n"
|
||||
" <td></td>\n"
|
||||
" <td> "
|
||||
"<samp> "
|
||||
" <u> </u></"
|
||||
"samp><br> <samp>MEM.D<sub>1</sub>, MEM.D<sub>2</sub>, MEM.LATCH</samp> </td>"
|
||||
"\n"
|
||||
" </tr>\n"
|
||||
"</table>\n"
|
||||
|
||||
#: eeschema/sch_validators.cpp:106
|
||||
#, c-format
|
||||
|
|
@ -15080,14 +15151,14 @@ msgstr ""
|
|||
"<b>(%.3f, %.3f)</b> 发生冲突"
|
||||
|
||||
#: eeschema/tools/ee_inspection_tool.cpp:169
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid ""
|
||||
"<b>Duplicate pin %s</b> \"%s\" at location <b>(%.3f, %.3f)</b> conflicts "
|
||||
"with pin %s \"%s\" at location <b>(%.3f, %.3f)</b> in units %c and %c of "
|
||||
"converted"
|
||||
msgstr ""
|
||||
"<b>发现重复引脚， %s</b> \"%s\" 位于 <b>(%.3f, %.3f)</b> 与 %s \"%s\" 位于"
|
||||
"<b>(%.3f, %.3f)</b> 发生冲突"
|
||||
"<b>发现重复引脚 %s</b> \"%s\" 位于 <b>(%.3f, %.3f)</b> 与 %s \"%s\" 位于<b>(%.3f, %."
|
||||
"3f)</b> 发生冲突，单元为转换后的 %c 和 %c"
|
||||
|
||||
#: eeschema/tools/ee_inspection_tool.cpp:186
|
||||
#, c-format
|
||||
|
|
@ -15099,13 +15170,13 @@ msgstr ""
|
|||
"<b>(%.3f, %.3f)</b> 发生冲突"
|
||||
|
||||
#: eeschema/tools/ee_inspection_tool.cpp:197
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid ""
|
||||
"<b>Duplicate pin %s</b> \"%s\" at location <b>(%.3f, %.3f)</b> conflicts "
|
||||
"with pin %s \"%s\" at location <b>(%.3f, %.3f)</b> in units %c and %c"
|
||||
msgstr ""
|
||||
"<b>发现重复引脚， %s</b> \"%s\" 位于 <b>(%.3f, %.3f)</b> 与 %s \"%s\" 位于"
|
||||
"<b>(%.3f, %.3f)</b> 发生冲突"
|
||||
"<b>发现重复引脚， %s</b> \"%s\" 位于 <b>(%.3f, %.3f)</b> 与 %s \"%s\" 位于<b>(%.3f, %."
|
||||
"3f)</b> 发生冲突，单元为 %c 和 %c"
|
||||
|
||||
#: eeschema/tools/ee_inspection_tool.cpp:228
|
||||
#, c-format
|
||||
|
|
@ -15183,9 +15254,7 @@ msgstr "任意位置放置引脚"
|
|||
|
||||
#: eeschema/tools/reannotate.cpp:74
|
||||
msgid "Errors reported by Eeschema:\n"
|
||||
msgstr ""
|
||||
"Eesschema 报告的错误：\n"
|
||||
" \n"
|
||||
msgstr "Eesschema 报告的错误：\n"
|
||||
|
||||
#: eeschema/tools/reannotate.cpp:76
|
||||
msgid ""
|
||||
|
|
@ -15678,7 +15747,7 @@ msgstr "信息: 跳过文件 \"%s\"（Gerber 作业文件）\n"
|
|||
#: gerbview/files.cpp:548
|
||||
#, c-format
|
||||
msgid "<b>Unable to create temporary file \"%s\"</b>\n"
|
||||
msgstr "<b>无法创建临时文件 \"%s\"<b>\n"
|
||||
msgstr "<b>无法创建临时文件 \"%s\"</b>\n"
|
||||
|
||||
#: gerbview/files.cpp:578
|
||||
#, c-format
|
||||
|
|
@ -17412,7 +17481,7 @@ msgstr "R1："
|
|||
#: pcb_calculator/dialogs/pcb_calculator_frame_base.cpp:487
|
||||
#: pcb_calculator/widgets/unit_selector.cpp:155
|
||||
msgid "kOhm"
|
||||
msgstr ""
|
||||
msgstr "kΩ"
|
||||
|
||||
#: pcb_calculator/dialogs/pcb_calculator_frame_base.cpp:104
|
||||
msgid "R2:"
|
||||
|
|
@ -18206,7 +18275,7 @@ msgid "PCB Calculator"
|
|||
msgstr "PCB 计算器"
|
||||
|
||||
#: pcb_calculator/eserie_help.h:2
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid ""
|
||||
"E-series defined in IEC 60063 are a widely accepted system of preferred\n"
|
||||
"numbers for electronic components. Available values are approximately\n"
|
||||
|
|
@ -20060,13 +20129,14 @@ msgstr ""
|
|||
"**********************************************************\n"
|
||||
|
||||
#: pcbnew/dialogs/dialog_board_reannotate.cpp:535
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
"Excluding: %s from reannotation\n"
|
||||
"\n"
|
||||
msgstr ""
|
||||
" 从批注记\n"
|
||||
"\n"
|
||||
"排除：来自重新批注的 %s\n"
|
||||
"\n"
|
||||
|
||||
#: pcbnew/dialogs/dialog_board_reannotate.cpp:538
|
||||
|
|
@ -21470,7 +21540,7 @@ msgstr "运行 DRC"
|
|||
|
||||
#: pcbnew/dialogs/dialog_drc.cpp:218
|
||||
msgid "DRC incomplete: could not compile design rules. "
|
||||
msgstr ""
|
||||
msgstr "DRC 不完整：无法编译设计规则。 "
|
||||
|
||||
#: pcbnew/dialogs/dialog_drc.cpp:220 pcbnew/tools/pcb_inspection_tool.cpp:208
|
||||
#: pcbnew/tools/pcb_inspection_tool.cpp:416
|
||||
|
|
@ -21482,20 +21552,17 @@ msgid "Show design rules."
|
|||
msgstr "设计规则"
|
||||
|
||||
#: pcbnew/dialogs/dialog_drc.cpp:254
|
||||
#, fuzzy
|
||||
msgid "-------- DRC cancelled by user.<br><br>"
|
||||
msgstr ""
|
||||
"-------- 用户取消的 DRC。\n"
|
||||
"\n"
|
||||
msgstr "-------- 用户取消的 DRC。<br><br>"
|
||||
|
||||
#: pcbnew/dialogs/dialog_drc.cpp:426
|
||||
msgid "Open the Board Setup... dialog"
|
||||
msgstr "打开“电路板设置...”对话框"
|
||||
|
||||
#: pcbnew/dialogs/dialog_drc.cpp:592
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid "Report file '%s' created<br>"
|
||||
msgstr "创建报告文件 \"%s\"\n"
|
||||
msgstr "创建报告文件 \"%s\" <br>"
|
||||
|
||||
#: pcbnew/dialogs/dialog_drc.cpp:597
|
||||
#, fuzzy, c-format
|
||||
|
|
@ -25211,9 +25278,7 @@ msgid ""
|
|||
"Normally footprints on the board should be changed to match footprint "
|
||||
"assignment changes made in the schematic. Uncheck this only if you don't "
|
||||
"want to change existing footprints on the board."
|
||||
msgstr ""
|
||||
"通常应更改线路板上的封装，以匹配原理图中所做的封装分配更改。\n"
|
||||
"仅当您不想更改线路板上的现有封装外形时，才取消选中此选项。"
|
||||
msgstr "通常应更改线路板上的封装，以匹配原理图中所做的封装分配更改。仅当您不想更改线路板上的现有封装外形时，才取消选中此选项。"
|
||||
|
||||
#: pcbnew/dialogs/dialog_update_pcb_base.cpp:47
|
||||
msgid ""
|
||||
|
|
@ -25290,9 +25355,7 @@ msgstr "布线间隙"
|
|||
msgid ""
|
||||
"Show or hide the track and via clearance area. If \"New track\" is selected, "
|
||||
"track clearance area is shown only when creating the track."
|
||||
msgstr ""
|
||||
"显示或隐藏布线和过孔间隙区域\n"
|
||||
"如果选择新的布线，仅当创建布线时显示布线间隙。"
|
||||
msgstr "显示或隐藏布线和过孔间隙区域如果选择新的布线，仅当创建布线时显示布线间隙。"
|
||||
|
||||
#: pcbnew/dialogs/panel_display_options_base.cpp:67
|
||||
msgid "Show pad clearance"
|
||||
|
|
@ -25674,14 +25737,11 @@ msgstr ""
|
|||
"是否继续？"
|
||||
|
||||
#: pcbnew/dialogs/panel_setup_layers.cpp:562
|
||||
#, fuzzy
|
||||
msgid ""
|
||||
"Items have been found on removed layers. This operation will delete all "
|
||||
"items from removed layers and cannot be undone.\n"
|
||||
"Do you wish to continue?"
|
||||
msgstr ""
|
||||
"在移除的图层上找到了项目。 该操作将删除已移除图层中的所有项目，并且不能撤"
|
||||
"消。 你想继续吗？"
|
||||
msgstr "在移除的图层上找到了项目。 该操作将删除已移除图层中的所有项目，并且不能撤消。 你想继续吗？"
|
||||
|
||||
#: pcbnew/dialogs/panel_setup_layers.cpp:738
|
||||
msgid "Layer must have a name."
|
||||
|
|
@ -26658,7 +26718,7 @@ msgstr "适用的约束条件。"
|
|||
|
||||
#: pcbnew/drc/drc_engine.cpp:718
|
||||
msgid "Rule applied; overrides previous constraints."
|
||||
msgstr ""
|
||||
msgstr "已应用规则；覆盖以前的约束。"
|
||||
|
||||
#: pcbnew/drc/drc_engine.cpp:725
|
||||
#, fuzzy
|
||||
|
|
@ -27154,9 +27214,9 @@ msgid "Checking silkscreen for overlapping items..."
|
|||
msgstr "正在检查重叠项目的丝印..."
|
||||
|
||||
#: pcbnew/drc/drc_test_provider_silk_clearance.cpp:191
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid "Testing %d silkscreen features against %d board items."
|
||||
msgstr "正在测试 %d 丝印功能..."
|
||||
msgstr "正在测试 %d 丝印功能针对 %d 个电路板项目"
|
||||
|
||||
#: pcbnew/drc/drc_test_provider_silk_to_mask.cpp:104
|
||||
msgid "Checking silkscreen for potential soldermask clipping..."
|
||||
|
|
@ -27172,14 +27232,14 @@ msgid "Checking track widths..."
|
|||
msgstr "正在检查布线宽度..."
|
||||
|
||||
#: pcbnew/drc/drc_test_provider_track_width.cpp:128
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid "(%s min width %s; actual %s)"
|
||||
msgstr " (%s %s 宽度 %s; 实际 %s)"
|
||||
msgstr "(%s 最小宽度 %s; 实际 %s)"
|
||||
|
||||
#: pcbnew/drc/drc_test_provider_track_width.cpp:135
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid "(%s max width %s; actual %s)"
|
||||
msgstr " (%s %s 宽度 %s; 实际 %s)"
|
||||
msgstr "(%s 最大宽度 %s; 实际 %s)"
|
||||
|
||||
#: pcbnew/drc/drc_test_provider_via_diameter.cpp:75
|
||||
msgid "Checking via diameters..."
|
||||
|
|
@ -27227,9 +27287,7 @@ msgstr "IDF 导出失败：\n"
|
|||
msgid ""
|
||||
"Unable to calculate the board outlines; fall back to using the board "
|
||||
"boundary box."
|
||||
msgstr ""
|
||||
"无法计算板边\n"
|
||||
"退回到使用电路板边界框。"
|
||||
msgstr "无法计算板边，退回到使用电路板边界框。"
|
||||
|
||||
#: pcbnew/exporters/export_vrml.cpp:867
|
||||
msgid "VRML Export Failed: Could not add holes to contours."
|
||||
|
|
@ -27522,8 +27580,7 @@ msgid ""
|
|||
msgstr ""
|
||||
"当前配置不包含以下库\n"
|
||||
"\"%s\"。\n"
|
||||
"使用管理封装库来编辑配置。\n"
|
||||
"来编辑配置。"
|
||||
"使用管理封装库来编辑配置来编辑配置。"
|
||||
|
||||
#: pcbnew/footprint_editor_utils.cpp:475
|
||||
msgid "Library not found in footprint library table."
|
||||
|
|
@ -28641,7 +28698,7 @@ msgstr "无法识别的图层 '%s'。"
|
|||
|
||||
#: pcbnew/pcb_expr_evaluator.cpp:547
|
||||
msgid "must be mm, in, or mil"
|
||||
msgstr ""
|
||||
msgstr "单位必须为 mm、in 或 mil"
|
||||
|
||||
#: pcbnew/pcb_layer_box_selector.cpp:106
|
||||
msgid "(not activated)"
|
||||
|
|
@ -28874,7 +28931,7 @@ msgstr ""
|
|||
msgid ""
|
||||
"The selected file is not valid or might be corrupt: The layer stack refers "
|
||||
"to layer ID '%s' which does not exist in the layer definitions."
|
||||
msgstr ""
|
||||
msgstr "所选文件无效或可能已损坏：层堆栈引用的层 ID '%s' 在层定义中不存在。"
|
||||
|
||||
#: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:211
|
||||
#, c-format
|
||||
|
|
@ -29635,16 +29692,14 @@ msgstr "？"
|
|||
#: pcbnew/router/pns_kicad_iface.cpp:944
|
||||
#, c-format
|
||||
msgid "%s is malformed."
|
||||
msgstr ""
|
||||
msgstr "%s 格式不正确。"
|
||||
|
||||
# 此zone经核查源码确认为禁止布线区
|
||||
#: pcbnew/router/pns_kicad_iface.cpp:947
|
||||
#, fuzzy
|
||||
msgid ""
|
||||
"This zone cannot be handled by the track layout tool.\n"
|
||||
"Please verify it is not a self-intersecting polygon."
|
||||
msgstr ""
|
||||
"%s\n"
|
||||
"布线工具无法处理此禁止布线区。\n"
|
||||
"请确保它不是自相交的多边形。"
|
||||
|
||||
|
|
@ -29834,24 +29889,24 @@ msgid "Specify custom differential pair dimensions"
|
|||
msgstr "指定自定义差分对标注"
|
||||
|
||||
#: pcbnew/router/router_tool.cpp:342
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid "Width %s"
|
||||
msgstr "宽度 "
|
||||
msgstr "宽度 %s"
|
||||
|
||||
#: pcbnew/router/router_tool.cpp:347
|
||||
#, fuzzy, c-format
|
||||
#, c-format
|
||||
msgid "Width %s, via gap %s "
|
||||
msgstr "，过孔间隙 "
|
||||
msgstr "宽度 %s，过孔间隙 %s "
|
||||
|
||||
#: pcbnew/router/router_tool.cpp:356
|
||||
#, c-format
|
||||
msgid "Width %s, gap %s"
|
||||
msgstr ""
|
||||
msgstr "宽度 %s，间隙 %s"
|
||||
|
||||
#: pcbnew/router/router_tool.cpp:362
|
||||
#, c-format
|
||||
msgid "Width %s, gap %s, via gap %s "
|
||||
msgstr ""
|
||||
msgstr "宽度 %s，间隙 %s，过孔间隙 %s "
|
||||
|
||||
#: pcbnew/router/router_tool.cpp:746 pcbnew/router/router_tool.cpp:767
|
||||
#, fuzzy
|
||||
|
|
@ -31668,7 +31723,7 @@ msgstr "间隙： %s。"
|
|||
#: pcbnew/tools/pcb_inspection_tool.cpp:486
|
||||
#: pcbnew/tools/pcb_inspection_tool.cpp:524
|
||||
msgid "Report incomplete: could not compile design rules. "
|
||||
msgstr ""
|
||||
msgstr "报告不完整：无法编译设计规则。 "
|
||||
|
||||
#: pcbnew/tools/pcb_inspection_tool.cpp:230
|
||||
#, fuzzy, c-format
|
||||
|
|
@ -31882,7 +31937,7 @@ msgstr "DRC 规则"
|
|||
|
||||
#: pcbnew/tools/zone_filler_tool.cpp:122
|
||||
msgid "Zone fills may be inaccurate. DRC rules contain errors."
|
||||
msgstr ""
|
||||
msgstr "区域填充可能不准确。DRC 规则包含错误。"
|
||||
|
||||
#: pcbnew/tools/zone_filler_tool.cpp:129
|
||||
msgid "Fill All Zones"
|
||||
|
|
@ -32354,7 +32409,7 @@ msgstr "首选项"
|
|||
msgid ""
|
||||
"The current color theme is read-only. Create a new theme in Preferences to "
|
||||
"enable color editing."
|
||||
msgstr ""
|
||||
msgstr "当前颜色主题为只读。在首选项中创建新主题以启用颜色编辑。"
|
||||
|
||||
#: pcbnew/widgets/panel_selection_filter.cpp:130
|
||||
#, c-format
|
||||
|
|
|
|||
Loading…
Reference in New Issue