Fix minor compil and Coverity warnings.
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3e16359b4f
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16e708a0e7
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@ -2539,6 +2539,7 @@ mpFXYVector::mpFXYVector( const wxString& name, int flags ) :
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mpFXY( name, flags )
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{
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m_index = 0;
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m_sweepWindow = 0;
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m_minX = -1;
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m_maxX = 1;
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m_minY = -1;
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@ -1038,7 +1038,7 @@ SCH_SHEET* SCH_IO_EAGLE::loadModuleInstance( const std::unique_ptr<EMODULEINST>&
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portExtWire->SetEndPoint( portExtWireEndpoint );
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currentScreen->Append( portExtWire );
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LABEL_FLAG_SHAPE pinType;
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LABEL_FLAG_SHAPE pinType = LABEL_FLAG_SHAPE::L_UNSPECIFIED;
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if( port->direction )
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{
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@ -87,6 +87,9 @@ BOARD::BOARD() :
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// A too large value do not allow safely connecting 2 shapes like very short segments.
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m_outlinesChainingEpsilon = pcbIUScale.mmToIU( DEFAULT_CHAINING_EPSILON_MM );
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m_DRCMaxClearance = 0;
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m_DRCMaxPhysicalClearance = 0;
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// we have not loaded a board yet, assume latest until then.
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m_fileFormatVersionAtLoad = LEGACY_BOARD_FILE_VERSION;
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@ -1536,11 +1536,13 @@ bool STEP_PCB_MODEL::MakeShapes( std::vector<TopoDS_Shape>& aShapes, const SHAPE
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}*/
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}
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#if 0 // No longer in use
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auto toPoint = [&]( const VECTOR2D& aKiCoords ) -> gp_Pnt
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{
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return gp_Pnt( pcbIUScale.IUTomm( aKiCoords.x - aOrigin.x ),
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-pcbIUScale.IUTomm( aKiCoords.y - aOrigin.y ), aZposition );
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};
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#endif
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gp_Pln basePlane( gp_Pnt( 0.0, 0.0, aZposition ),
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std::signbit( aThickness ) ? -gp::DZ() : gp::DZ() );
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@ -769,7 +769,7 @@ void PCB_PAINTER::renderNetNameForSegment( const SHAPE_SEGMENT& aSeg, const COLO
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// Check if the track is long enough to have a netname displayed
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int seg_minlength = aSeg.GetWidth() * num_char;
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SEG::ecoord seg_minlength_sq = seg_minlength * seg_minlength;
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SEG::ecoord seg_minlength_sq = (SEG::ecoord)seg_minlength * seg_minlength;
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if( aSeg.GetSeg().SquaredLength() < seg_minlength_sq )
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return;
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