Replace legacy copper edge heuristics.

Fixes https://gitlab.com/kicad/code/kicad/issues/6435
This commit is contained in:
Jeff Young 2020-11-19 13:25:30 +00:00
parent 9512b1c5c3
commit 18ad58cf4c
5 changed files with 58 additions and 1 deletions

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@ -65,6 +65,7 @@ BOARD::BOARD() :
m_designSettings( new BOARD_DESIGN_SETTINGS( nullptr, "board.design_settings" ) ), m_designSettings( new BOARD_DESIGN_SETTINGS( nullptr, "board.design_settings" ) ),
m_NetInfo( this ), m_NetInfo( this ),
m_LegacyDesignSettingsLoaded( false ), m_LegacyDesignSettingsLoaded( false ),
m_LegacyCopperEdgeClearanceLoaded( false ),
m_LegacyNetclassesLoaded( false ) m_LegacyNetclassesLoaded( false )
{ {
// we have not loaded a board yet, assume latest until then. // we have not loaded a board yet, assume latest until then.

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@ -314,6 +314,7 @@ public:
/// True if the legacy board design settings were loaded from a file /// True if the legacy board design settings were loaded from a file
bool m_LegacyDesignSettingsLoaded; bool m_LegacyDesignSettingsLoaded;
bool m_LegacyCopperEdgeClearanceLoaded;
/// True if netclasses were loaded from the file /// True if netclasses were loaded from the file
bool m_LegacyNetclassesLoaded; bool m_LegacyNetclassesLoaded;

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@ -476,6 +476,48 @@ IO_MGR::PCB_FILE_T plugin_type( const wxString& aFileName, int aCtl )
} }
int PCB_EDIT_FRAME::inferLegacyEdgeClearance( BOARD* aBoard )
{
PCB_LAYER_COLLECTOR collector;
collector.SetLayerId( Edge_Cuts );
collector.Collect( aBoard, GENERAL_COLLECTOR::AllBoardItems );
int edgeWidth = -1;
bool mixed = false;
for( int i = 0; i < collector.GetCount(); i++ )
{
if( collector[i]->Type() == PCB_SHAPE_T )
{
int itemWidth = static_cast<PCB_SHAPE*>( collector[i] )->GetWidth();
if( edgeWidth != -1 && edgeWidth != itemWidth )
{
mixed = true;
edgeWidth = std::max( edgeWidth, itemWidth );
}
else
{
edgeWidth = itemWidth;
}
}
}
if( mixed )
{
// If they had different widths then we can't ensure that fills will be the same.
wxMessageBox( _( "If the zones on this board are refilled the Copper Edge Clearance "
"setting will be used (see Board Setup > Design Rules).\n"
"This may result in different fills from previous Kicad versions which "
"used the line thicknesses of the board boundary on the Edge Cuts layer." ),
_( "Edge Clearance Warning" ), wxOK|wxICON_WARNING, this );
}
return std::max( 0, edgeWidth / 2 );
}
bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, int aCtl ) bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, int aCtl )
{ {
// This is for python: // This is for python:
@ -623,7 +665,8 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
{ {
if( ioe.Problem() != wxT( "CANCEL" ) ) if( ioe.Problem() != wxT( "CANCEL" ) )
{ {
wxString msg = wxString::Format( _( "Error loading board file:\n%s" ), fullFileName ); wxString msg = wxString::Format( _( "Error loading board file:\n%s" ),
fullFileName );
DisplayErrorMessage( this, msg, ioe.What() ); DisplayErrorMessage( this, msg, ioe.What() );
} }
@ -639,6 +682,15 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
{ {
Prj().GetProjectFile().NetSettings().ResolveNetClassAssignments( true ); Prj().GetProjectFile().NetSettings().ResolveNetClassAssignments( true );
// Before we had a copper edge clearance setting, the edge line widths could be used
// as a kludge to control them. So if there's no setting then infer it from the
// edge widths.
if( !loadedBoard->m_LegacyCopperEdgeClearanceLoaded )
{
int edgeClearance = inferLegacyEdgeClearance( loadedBoard );
loadedBoard->GetDesignSettings().SetCopperEdgeClearance( edgeClearance );
}
// On save; design settings will be removed from the board // On save; design settings will be removed from the board
loadedBoard->SetModified(); loadedBoard->SetModified();
} }

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@ -225,6 +225,8 @@ protected:
void onSize( wxSizeEvent& aEvent ); void onSize( wxSizeEvent& aEvent );
int inferLegacyEdgeClearance( BOARD* aBoard );
public: public:
PCB_LAYER_BOX_SELECTOR* m_SelLayerBox; // a combo box to display and select active layer PCB_LAYER_BOX_SELECTOR* m_SelLayerBox; // a combo box to display and select active layer
wxChoice* m_SelTrackWidthBox; // a choice box to display and select current track width wxChoice* m_SelTrackWidthBox; // a choice box to display and select current track width

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@ -1864,6 +1864,7 @@ void PCB_PARSER::parseDefaults( BOARD_DESIGN_SETTINGS& designSettings )
{ {
case T_edge_clearance: case T_edge_clearance:
designSettings.m_CopperEdgeClearance = parseBoardUnits( T_edge_clearance ); designSettings.m_CopperEdgeClearance = parseBoardUnits( T_edge_clearance );
m_board->m_LegacyCopperEdgeClearanceLoaded = true;
NeedRIGHT(); NeedRIGHT();
break; break;