Replace legacy copper edge heuristics.
Fixes https://gitlab.com/kicad/code/kicad/issues/6435
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9512b1c5c3
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@ -65,6 +65,7 @@ BOARD::BOARD() :
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m_designSettings( new BOARD_DESIGN_SETTINGS( nullptr, "board.design_settings" ) ),
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m_NetInfo( this ),
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m_LegacyDesignSettingsLoaded( false ),
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m_LegacyCopperEdgeClearanceLoaded( false ),
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m_LegacyNetclassesLoaded( false )
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{
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// we have not loaded a board yet, assume latest until then.
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@ -314,6 +314,7 @@ public:
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/// True if the legacy board design settings were loaded from a file
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bool m_LegacyDesignSettingsLoaded;
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bool m_LegacyCopperEdgeClearanceLoaded;
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/// True if netclasses were loaded from the file
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bool m_LegacyNetclassesLoaded;
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@ -476,6 +476,48 @@ IO_MGR::PCB_FILE_T plugin_type( const wxString& aFileName, int aCtl )
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}
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int PCB_EDIT_FRAME::inferLegacyEdgeClearance( BOARD* aBoard )
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{
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PCB_LAYER_COLLECTOR collector;
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collector.SetLayerId( Edge_Cuts );
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collector.Collect( aBoard, GENERAL_COLLECTOR::AllBoardItems );
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int edgeWidth = -1;
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bool mixed = false;
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for( int i = 0; i < collector.GetCount(); i++ )
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{
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if( collector[i]->Type() == PCB_SHAPE_T )
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{
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int itemWidth = static_cast<PCB_SHAPE*>( collector[i] )->GetWidth();
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if( edgeWidth != -1 && edgeWidth != itemWidth )
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{
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mixed = true;
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edgeWidth = std::max( edgeWidth, itemWidth );
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}
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else
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{
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edgeWidth = itemWidth;
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}
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}
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}
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if( mixed )
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{
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// If they had different widths then we can't ensure that fills will be the same.
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wxMessageBox( _( "If the zones on this board are refilled the Copper Edge Clearance "
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"setting will be used (see Board Setup > Design Rules).\n"
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"This may result in different fills from previous Kicad versions which "
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"used the line thicknesses of the board boundary on the Edge Cuts layer." ),
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_( "Edge Clearance Warning" ), wxOK|wxICON_WARNING, this );
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}
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return std::max( 0, edgeWidth / 2 );
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}
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bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, int aCtl )
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{
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// This is for python:
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@ -623,7 +665,8 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
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{
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if( ioe.Problem() != wxT( "CANCEL" ) )
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{
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wxString msg = wxString::Format( _( "Error loading board file:\n%s" ), fullFileName );
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wxString msg = wxString::Format( _( "Error loading board file:\n%s" ),
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fullFileName );
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DisplayErrorMessage( this, msg, ioe.What() );
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}
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@ -639,6 +682,15 @@ bool PCB_EDIT_FRAME::OpenProjectFiles( const std::vector<wxString>& aFileSet, in
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{
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Prj().GetProjectFile().NetSettings().ResolveNetClassAssignments( true );
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// Before we had a copper edge clearance setting, the edge line widths could be used
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// as a kludge to control them. So if there's no setting then infer it from the
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// edge widths.
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if( !loadedBoard->m_LegacyCopperEdgeClearanceLoaded )
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{
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int edgeClearance = inferLegacyEdgeClearance( loadedBoard );
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loadedBoard->GetDesignSettings().SetCopperEdgeClearance( edgeClearance );
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}
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// On save; design settings will be removed from the board
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loadedBoard->SetModified();
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}
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@ -225,6 +225,8 @@ protected:
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void onSize( wxSizeEvent& aEvent );
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int inferLegacyEdgeClearance( BOARD* aBoard );
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public:
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PCB_LAYER_BOX_SELECTOR* m_SelLayerBox; // a combo box to display and select active layer
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wxChoice* m_SelTrackWidthBox; // a choice box to display and select current track width
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@ -1864,6 +1864,7 @@ void PCB_PARSER::parseDefaults( BOARD_DESIGN_SETTINGS& designSettings )
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{
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case T_edge_clearance:
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designSettings.m_CopperEdgeClearance = parseBoardUnits( T_edge_clearance );
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m_board->m_LegacyCopperEdgeClearanceLoaded = true;
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NeedRIGHT();
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break;
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