haskal
/
kicad
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

drc: be more verbose when skipping LVS due to lack of schematic netlist

This commit is contained in:
Tomasz Wlostowski 2020-09-18 16:23:26 +02:00
parent 482767a850
commit 43404d4577
1 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
pcbnew/drc/drc_test_provider_lvs.cpp
View File

@ -211,8 +211,15 @@ bool DRC_TEST_PROVIDER_LVS::Run()
if( !reportPhase( _( "Checking PCB to schematic parity..." ) ) )
return false;
if( m_drcEngine->GetSchematicNetlist() )
testFootprints( *m_drcEngine->GetSchematicNetlist() );
auto netlist = m_drcEngine->GetSchematicNetlist();
if( !netlist )
{
reportAux( _("No netlist provided, skipping LVS.") );
return false;
}
testFootprints( *netlist );
reportRuleStatistics();
}