Add diode model to rectifier demo (ngspice-32 fix)
Patch by Holger Vogt Fixes https://gitlab.com/kicad/code/kicad/issues/4453
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*generic diode model
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.model 1N4148 D
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# C
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# rectifier_schlib_C
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#
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DEF C C 0 10 N Y 1 F N
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DEF rectifier_schlib_C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "C" 25 -100 50 H V L CNN
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F1 "rectifier_schlib_C" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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@ -26,11 +26,11 @@ X ~ 2 0 -150 110 U 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# D
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# rectifier_schlib_D
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#
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DEF D D 0 40 N N 1 F N
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DEF rectifier_schlib_D D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "D" 0 -100 50 H V C CNN
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F1 "rectifier_schlib_D" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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@ -48,11 +48,11 @@ X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# GND
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# rectifier_schlib_GND
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#
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DEF GND #PWR 0 0 Y Y 1 F P
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DEF rectifier_schlib_GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "GND" 0 -123 30 H V C CNN
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F1 "rectifier_schlib_GND" 0 -123 30 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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@ -61,11 +61,11 @@ X GND 1 0 0 0 D 20 30 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# R
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# rectifier_schlib_R
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#
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DEF R R 0 0 N Y 1 F N
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DEF rectifier_schlib_R R 0 0 N Y 1 F N
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F0 "R" 80 0 50 V V C CNN
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F1 "R" 0 0 50 V V C CNN
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F1 "rectifier_schlib_R" 0 0 50 V V C CNN
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F2 "" -70 0 50 V V C CNN
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F3 "" 0 0 50 H V C CNN
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$FPLIST
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@ -79,11 +79,11 @@ X ~ 2 0 -150 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# VSOURCE
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# rectifier_schlib_VSOURCE
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#
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DEF ~VSOURCE V 0 40 Y Y 1 F N
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DEF rectifier_schlib_VSOURCE V 0 40 Y Y 1 F N
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F0 "V" 200 200 50 H V C CNN
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F1 "VSOURCE" 250 100 50 H I C CNN
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F1 "rectifier_schlib_VSOURCE" 250 100 50 H I C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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F4 "Value" 0 0 60 H I C CNN "Fieldname"
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@ -1,6 +1,5 @@
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EESchema Schematic File Version 4
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LIBS:rectifier-cache
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EELAYER 26 0
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EELAYER 30 0
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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@ -64,6 +63,9 @@ F 3 "" H 5100 3700 50 0000 C CNN
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F 4 "Value" H 5100 3700 60 0001 C CNN "Fieldname"
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F 5 "D" H 5100 3700 60 0001 C CNN "Spice_Primitive"
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F 6 "2 1" H 5100 3700 60 0001 C CNN "Spice_Node_Sequence"
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F 7 "1N4148" H 5100 3700 50 0001 C CNN "Spice_Model"
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F 8 "Y" H 5100 3700 50 0001 C CNN "Spice_Netlist_Enabled"
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F 9 "diode.mod" H 5100 3700 50 0001 C CNN "Spice_Lib_File"
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1 5100 3700
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-1 0 0 1
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$EndComp
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@ -98,12 +100,12 @@ $EndComp
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Text Notes 4300 4900 0 60 ~ 0
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.tran 1u 10m\n
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Wire Wire Line
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4400 4350 4400 4250
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4400 4350 4400 4300
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Wire Wire Line
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4400 4300 5750 4300
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4400 4300 5400 4300
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Connection ~ 4400 4300
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Wire Wire Line
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5250 3700 5750 3700
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5250 3700 5400 3700
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Wire Wire Line
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5750 3700 5750 3850
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Wire Wire Line
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@ -126,4 +128,10 @@ Text Label 5750 3700 0 60 ~ 0
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rect_out
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Text Notes 4300 5000 0 60 ~ 0
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*.ac dec 10 1 1Meg\n
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Wire Wire Line
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4400 4300 4400 4250
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Wire Wire Line
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5400 3700 5750 3700
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Wire Wire Line
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5400 4300 5750 4300
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$EndSCHEMATC
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