drc: ignore silk2pad/silk2silk violations for hidden text objects

This commit is contained in:
Tomasz Wlostowski 2020-10-02 20:58:12 +02:00
parent ca8aca6faa
commit 5ef1dc17ad
5 changed files with 66 additions and 19 deletions

View File

@ -28,6 +28,7 @@
#include <class_module.h>
#include <class_pad.h>
#include <class_zone.h>
#include <class_pcb_text.h>
DRC_TEST_PROVIDER::DRC_TEST_PROVIDER() :
m_drcEngine( nullptr )
@ -280,3 +281,22 @@ int DRC_TEST_PROVIDER::forEachGeometryItem( const std::vector<KICAD_T>& aTypes,
return n;
}
bool DRC_TEST_PROVIDER::isInvisibleText( const BOARD_ITEM* aItem ) const
{
if( auto text = dyn_cast<const TEXTE_MODULE*>( aItem ) )
{
if( !text->IsVisible() )
return true;
}
if( auto text = dyn_cast<const TEXTE_PCB*>( aItem ) )
{
if( !text->IsVisible() )
return true;
}
return false;
}

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@ -120,6 +120,8 @@ protected:
virtual void accountCheck( const DRC_RULE* ruleToTest );
virtual void accountCheck( const DRC_CONSTRAINT& constraintToTest );
bool isInvisibleText( const BOARD_ITEM* aItem ) const;
EDA_UNITS userUnits() const;
DRC_ENGINE* m_drcEngine;
std::unordered_map<const DRC_RULE*, int> m_stats;

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@ -29,6 +29,10 @@
#include <drc/drc_rule.h>
#include <drc/drc_test_provider.h>
#include <drc/drc_length_report.h>
#include <drc/drc_rtree.h>
#include <geometry/shape.h>
#include <geometry/shape_segment.h>
#include <connectivity/connectivity_data.h>
#include <connectivity/from_to_cache.h>
@ -265,7 +269,7 @@ struct DIFF_PAIR_KEY
int totalLengthP;
};
static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp )
static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp, DRC_RTREE& aTree )
{
for( BOARD_CONNECTED_ITEM* itemP : aDp.itemsP )
@ -295,6 +299,16 @@ static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp )
if( coupled )
{
SHAPE_SEGMENT checkSegStart( cpair.coupledP.A, cpair.coupledN.A );
SHAPE_SEGMENT checkSegEnd( cpair.coupledP.B, cpair.coupledN.B );
// check if there's anyting in between the segments suspected to be coupled. If
// there's nothing, assume they are really coupled.
if( !aTree.CheckColliding( &checkSegStart, sp->GetLayer() )
&& !aTree.CheckColliding( &checkSegEnd, sp->GetLayer() ) )
{
cpair.parentP = sp;
cpair.parentN = sn;
@ -304,6 +318,7 @@ static void extractDiffPairCoupledItems( DIFF_PAIR_ITEMS& aDp )
}
}
}
}
bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run()
@ -353,6 +368,20 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run()
LSET::AllCuMask(), evaluateDpConstraints );
DRC_RTREE copperTree;
auto addToTree =
[&copperTree]( BOARD_ITEM *item ) -> bool
{
copperTree.insert( item );
return true;
};
int numItems =
forEachGeometryItem( { PCB_TRACE_T, PCB_VIA_T, PCB_PAD_T, PCB_ZONE_AREA_T, PCB_ARC_T },
LSET::AllCuMask(), addToTree );
reportAux( wxString::Format( _("DPs evaluated:") ) );
for( auto& it : dpRuleMatches )
@ -368,7 +397,7 @@ bool test::DRC_TEST_PROVIDER_DIFF_PAIR_COUPLING::Run()
reportAux( wxString::Format( "Rule '%s', DP: (+) %s - (-) %s", it.first.parentRule->m_Name, nameP, nameN ) );
extractDiffPairCoupledItems( it.second );
extractDiffPairCoupledItems( it.second, copperTree );
it.second.totalCoupled = 0;
it.second.totalLengthN = 0;

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@ -135,6 +135,12 @@ bool test::DRC_TEST_PROVIDER_SILK_TO_PAD::Run()
int actual;
VECTOR2I pos;
if( isInvisibleText( aRefItem->parent ) )
return true;
if( isInvisibleText( aTestItem->parent ) )
return true;
accountCheck( constraint );
if( !aRefItem->shape->Collide( aTestItem->shape, minClearance, &actual, &pos ) )

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@ -132,21 +132,11 @@ bool DRC_TEST_PROVIDER_SILK_TO_SILK::Run()
MODULE *parentModRef = nullptr;
MODULE *parentModTest = nullptr;
if( typeRef == PCB_MODULE_TEXT_T )
{
auto textRef = static_cast<TEXTE_MODULE*>( aRefItem->parent );
if( !textRef->IsVisible( ) )
if ( isInvisibleText( aRefItem->parent ) )
return true;
}
if( typeTest == PCB_MODULE_TEXT_T )
{
auto textTest = static_cast<TEXTE_MODULE*>( aTestItem->parent );
if( !textTest->IsVisible( ) )
if ( isInvisibleText( aTestItem->parent ) )
return true;
}
if( typeRef == PCB_MODULE_EDGE_T || typeRef == PCB_MODULE_TEXT_T )
{