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Update demo "video"

This commit is contained in:
jean-pierre charras 2019-08-25 18:39:24 +02:00
parent 4f73530c4a
commit 72c4cfd4b6
14 changed files with 37060 additions and 34520 deletions
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5
demos/video/bus_pci.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8
@ -2776,6 +2776,7 @@ Wire Wire Line
700 8850 700 8950
Wire Wire Line
850 8850 1150 8850
Connection ~ 2200 1650
Wire Bus Line
11100 5850 11100 6150
Wire Bus Line

7
demos/video/esvideo.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8
@ -1267,4 +1267,7 @@ Wire Wire Line
5550 2200 5650 2200
Wire Wire Line
5450 2200 5550 2200
Connection ~ 10550 2750
Connection ~ 4450 4200
Connection ~ 4450 3800
$EndSCHEMATC

4
demos/video/graphic.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8

3
demos/video/libs/video_schlib.dcm Normal file
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@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

1930
demos/video/libs/video_schlib.lib
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4
demos/video/modul.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8

4
demos/video/muxdata.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8

4
demos/video/pal-ntsc.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8

12
demos/video/rams.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8
@ -1748,4 +1748,12 @@ F 3 "" H 3600 3000 60 0001 C CNN
1 3600 3000
1 0 0 -1
$EndComp
Connection ~ 11300 7150
Connection ~ 8500 7150
Connection ~ 5650 7150
Connection ~ 2800 7150
Connection ~ 11300 2700
Connection ~ 8500 2700
Connection ~ 5650 2700
Connection ~ 2800 2700
$EndSCHEMATC

6
demos/video/video-cache.lib
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@ -661,7 +661,7 @@ ENDDEF
#
# video_schlib_CONN_1
#
DEF ~video_schlib_CONN_1 P 0 30 N N 1 F N
DEF video_schlib_CONN_1 P 0 30 N N 1 F N
F0 "P" 80 0 40 H V L CNN
F1 "video_schlib_CONN_1" 0 55 30 H I C CNN
F2 "" 0 0 60 H V C CNN
@ -831,7 +831,7 @@ ENDDEF
#
# video_schlib_GND
#
DEF ~video_schlib_GND #PWR 0 0 Y Y 1 F P
DEF video_schlib_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
F1 "video_schlib_GND" 0 -70 30 H I C CNN
F2 "" 0 0 60 H V C CNN
@ -1203,7 +1203,7 @@ X VCC 30 0 1900 0 D 60 60 1 1 W N
X A8 31 -800 1000 300 R 60 60 1 1 I
X A9 32 -800 900 300 R 60 60 1 1 I
X RAS2 34 -800 100 300 R 60 60 1 1 I I
X GND 39 0 -1950 0 U 60 60 1 1 W N
X GND 39 0 -1900 0 U 60 60 1 1 W N
X DQ1 4 800 1700 300 L 60 60 1 1 T
X CAS0 40 -800 -200 300 R 60 60 1 1 I I
X CAS1 41 -800 -300 300 R 60 60 1 1 I I

59585
demos/video/video.kicad_pcb
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9737
demos/video/video.net
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275
demos/video/video.pro
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@ -1,4 +1,4 @@
update=21/11/2017 21:17:04
update=25/08/2019 19:59:15
version=1
last_client=kicad
[general]
@ -10,26 +10,263 @@ version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_WriteFile=0
ERC_TestSimilarLabels=1
ERC_CheckUniqueGlobalLabels=1
ERC_CheckBusDriverConflicts=1
ERC_CheckBusEntryConflicts=1
ERC_CheckBusToBusConflicts=1
ERC_CheckBusToNetConflicts=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=video.net
UseCmpFile=0
PadDrill=3.048
PadDrillOvalY=3.048
PadSizeH=3.81
PadSizeV=5.08
PcbTextSizeV=1.524
PcbTextSizeH=1.524
PcbTextThickness=0.2032
ModuleTextSizeV=1.27
ModuleTextSizeH=1.27
ModuleTextSizeThickness=0.2032
LastSTEPExportPath=
LastIDFExportPath=
LastVRMLExportPath=
LastSpecctraDSNExportPath=
LastGenCADExportPath=
CopperLayerCount=4
BoardThickness=1.6002
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.7999999999999999
MinViaDrill=0.4
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.127
MinHoleToHole=0.25
CopperEdgeClearance=0.01
TrackWidth1=0.2
ViaDiameter1=0.889
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.3048
SilkTextSizeV=1.27
SilkTextSizeH=1.27
SilkTextSizeThickness=0.2032
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.3048
CopperTextSizeV=1.524
CopperTextSizeH=1.524
CopperTextThickness=0.2032
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.2032
CourtyardLineWidth=0.05
OthersLineWidth=0.09999999999999999
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.254
SolderMaskMinWidth=0
DrawSegmentWidth=0.3048
BoardOutlineThickness=0.2032
ModuleOutlineThickness=0.3048
[eeschema]
version=1
LibDir=
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=top_copper
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=GND_layer
Type=0
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=VCC_layer
Type=0
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=bottom_copper
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.2
ViaDiameter=0.889
ViaDrill=0.4
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=pwr
Clearance=0.2
TrackWidth=0.23
ViaDiameter=0.889
ViaDrill=0.4
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

4
demos/video/video.sch
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@ -1,6 +1,6 @@
EESchema Schematic File Version 4
EESchema Schematic File Version 5
LIBS:video-cache
EELAYER 29 0
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
encoding utf-8