Translated using Weblate (Korean)
Currently translated at 100.0% (9258 of 9258 strings) Translation: KiCad EDA/master source Translate-URL: https://hosted.weblate.org/projects/kicad/master-source/ko/
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@ -30,7 +30,7 @@ msgstr ""
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"Project-Id-Version: kicad\n"
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"Report-Msgid-Bugs-To: \n"
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"POT-Creation-Date: 2024-02-28 09:55-0800\n"
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"PO-Revision-Date: 2024-03-02 05:02+0000\n"
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"PO-Revision-Date: 2024-03-04 07:01+0000\n"
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"Last-Translator: 김랑기 <korearf@gmail.com>\n"
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"Language-Team: Korean <https://hosted.weblate.org/projects/kicad/"
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"master-source/ko/>\n"
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@ -2771,7 +2771,7 @@ msgstr "USLedger 11x17in"
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#: common/dialogs/dialog_page_settings.cpp:73
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msgid "User (Custom)"
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msgstr "사용자 (사용자 정의)"
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msgstr "사용자(사용자 정의)"
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#: common/dialogs/dialog_page_settings.cpp:105
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msgid "Preview Settings"
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@ -26433,7 +26433,7 @@ msgstr "선형 저항:"
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#: pcb_calculator/calculator_panels/panel_cable_size_base.cpp:126
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#, c-format
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msgid "Frequency for 100% skin depth:"
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msgstr "침투 깊이 100% 를 위한 주파수:"
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msgstr "100% 표면 깊이를 위한 주파수:"
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#: pcb_calculator/calculator_panels/panel_cable_size_base.cpp:138
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msgid "Ampacity:"
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@ -29686,7 +29686,7 @@ msgstr "N/A"
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#: pcbnew/dialogs/dialog_board_statistics.cpp:504 pcbnew/pad.cpp:1254
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msgid "PTH"
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msgstr "PTH"
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msgstr "도금 관통 홀"
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#: pcbnew/dialogs/dialog_board_statistics.cpp:504 pcbnew/pad.cpp:1257
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msgid "NPTH"
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@ -37144,6 +37144,483 @@ msgid ""
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"For the full documentation see [https://docs.kicad.org](https://docs.kicad."
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"org/GetMajorMinorVersion/en/pcbnew/pcbnew.html#custom_design_rules)."
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msgstr ""
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"### Top-level Clauses\n"
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"\n"
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" (version <number>)\n"
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"\n"
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" (rule <rule_name> <rule_clause> ...)\n"
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"\n"
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"\n"
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"<br>\n"
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"\n"
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"### Rule Clauses\n"
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"\n"
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" (constraint <constraint_type> ...)\n"
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"\n"
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" (condition \"<expression>\")\n"
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"\n"
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" (layer \"<layer_name>\")\n"
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"\n"
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" (severity <severity_name>)\n"
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"\n"
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"\n"
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"<br>\n"
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"\n"
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"### Constraints\n"
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"\n"
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"| Constraint type | Argument type "
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" | Desc"
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"ription "
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" "
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" "
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" "
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" "
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" |\n"
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"|---------------------------|------------------------------------------------"
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"-----------------------------------------------------------------------|-----"
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"-----------------------------------------------------------------------------"
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"-----------------------------------------------------------------------------"
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"-----------------------------------------------------------------------------"
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"-----------------------------------------------------------------------------"
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"-----------------------------------------------------------------------------"
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"--------------------------------------------------|\n"
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"| `annular_width` | min/opt/max "
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" | "
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"Checks the width of annular rings on vias.<br> "
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" "
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" "
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" "
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" "
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" |\n"
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"| `assertion` | \"<expression>\" "
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" | "
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"Checks the given expression.<br> "
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" "
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" "
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" "
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" "
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" |\n"
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"| `clearance` | min "
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" | "
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"Specifies the **electrical** clearance between copper objects of different "
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"nets. (See `physical_clearance` if you wish to specify clearance between "
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"objects regardless of net.)<br><br>To allow copper objects to overlap "
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"(collide), create a `clearance` constraint with the `min` value less than "
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"zero (for example, `-1`).<br> "
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" |\n"
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"| `courtyard_clearance` | min "
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" | "
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"Checks the clearance between footprint courtyards and generates an error if "
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"any two courtyards are closer than the `min` distance. If a footprint does "
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"not have a courtyard shape, no errors will be generated from this constraint."
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"<br> "
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" "
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" |\n"
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"| `diff_pair_gap` | min/opt/max "
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" | "
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"Checks the gap between coupled tracks in a differential pair. Coupled "
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"tracks are segments that are parallel to each other. Differential pair gap "
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"is not tested on uncoupled portions of a differential pair (for example, the "
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"fanout from a component).<br> "
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" "
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" |\n"
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"| `diff_pair_uncoupled` | max "
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" | "
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"Checks the distance that a differential pair track is routed uncoupled from "
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"the other polarity track in the pair (for example, where the pair fans out "
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"from a component, or becomes uncoupled to pass around another object such as "
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"a via).<br> "
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" "
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" |\n"
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"| `disallow` | `track`<br>`via`<br>`micro_via`<br>`buried_via`"
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"<br>`pad`<br>`zone`<br>`text`<br>`graphic`<br>`hole`<br>`footprint`<br> | "
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"Specify one or more object types to disallow, separated by spaces. For "
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"example, `(constraint disallow track)` or `(constraint disallow track via "
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"pad)`. If an object of this type matches the rule condition, a DRC error "
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"will be created.<br><br>This constraint is essentially the same as a keepout "
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"rule area, but can be used to create more specific keepout restrictions.<br> "
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" |\n"
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"| `edge_clearance` | min/opt/max "
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" | "
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"Checks the clearance between objects and the board edge.<br><br>This can "
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"also be thought of as the \"milling tolerance\" as the board edge will "
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"include all graphical items on the `Edge.Cuts` layer as well as any *oval* "
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"pad holes. (See `physical_hole_clearance` for the drilling tolerance.)<br> "
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" "
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" |\n"
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"| `length` | min/max "
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" | "
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"Checks the total routed length for the nets that match the rule condition "
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"and generates an error for each net that is below the `min` value (if "
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"specified) or above the `max` value (if specified) of the constraint.<br> "
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" "
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" "
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" |\n"
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"| `hole` | min/max "
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" | "
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"Checks the size (diameter) of a drilled hole in a pad or via. For oval "
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"holes, the smaller (minor) diameter will be tested against the `min` value ("
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"if specified) and the larger (major) diameter will be tested against the "
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"`max` value (if specified).<br> "
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" "
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" |\n"
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"| `hole_clearance` | min "
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" | "
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"Checks the clearance between a drilled hole in a pad or via and copper "
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"objects on a different net. The clearance is measured from the diameter of "
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"the hole, not its center.<br> "
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" "
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" "
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" |\n"
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"| `hole_to_hole` | min "
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" | "
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"Checks the clearance between mechanically-drilled holes in pads and vias. "
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"The clearance is measured between the diameters of the holes, not between "
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"their centers.<br><br>This constraint is soley for the protection of drill "
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"bits. The clearance between **laser-drilled** (microvias) and other non-"
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"mechanically-drilled holes is not checked, nor is the clearance between "
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"**milled** (oval-shaped) and other non-mechanically-drilled holes.<br> |\n"
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"| `physical_clearance` | min "
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" | "
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"Checks the clearance between two objects on a given layer (including non-"
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"copper layers).<br><br>While this can perform more general-purpose checks "
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"than `clearance`, it is much slower. Use `clearance` where possible.<br> "
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" "
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" "
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" |\n"
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"| `physical_hole_clearance` | min "
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" | "
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"Checks the clearance between a drilled hole in a pad or via and another "
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"object, regardless of net. The clearance is measured from the diameter of "
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"the hole, not its center.<br><br>This can also be thought of as the "
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"\"drilling tolerance\" as it only includes **round** holes (see "
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"`edge_clearance` for the milling tolerance).<br> "
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" "
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" |\n"
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"| `silk_clearance` | min/opt/max "
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" | "
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"Checks the clearance between objects on silkscreen layers and other objects.<"
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"br> "
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" "
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" "
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" "
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" |\n"
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"| `skew` | max "
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" | "
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"Checks the total skew for the nets that match the rule condition, that is, "
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"the difference between the length of each net and the average of all the "
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"lengths of each net that is matched by the rule. If the absolute value of "
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"the difference between that average and the length of any one net is above "
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"the constraint `max` value, an error will be generated.<br> "
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" |\n"
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"| `thermal_relief_gap` | min "
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" | "
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"Specifies the width of the gap between a pad and a zone with a thermal-"
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"relief connection.<br> "
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" "
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" "
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" "
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" |\n"
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"| `thermal_spoke_width` | opt "
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" | "
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"Specifies the width of the spokes connecting a pad to a zone with a thermal-"
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"relief connection.<br> "
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" "
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" "
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" "
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" |\n"
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"| `track_width` | min/opt/max "
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" | "
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"Checks the width of track and arc segments. An error will be generated for "
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"each segment that has a width below the `min` value (if specified) or above "
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"the `max` value (if specified).<br> "
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" "
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" "
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" |\n"
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"| `via_count` | max "
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" | "
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"Counts the number of vias on every net matched by the rule condition. If "
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"that number exceeds the constraint `max` value on any matched net, an error "
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"will be generated for that net.<br> "
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" "
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" "
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" |\n"
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"| `zone_connection` | `solid`<br>`thermal_reliefs`<br>`none` "
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" | "
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"Specifies the connection to be made between a zone and a pad.<br> "
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" "
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" "
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" "
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" "
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" |\n"
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"\n"
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"\n"
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"### Items\n"
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"\n"
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" * `A` _the first (or only) item under test_\n"
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" * `B` _the second item under test (for binary tests)_\n"
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" * `L` _the layer currently under test_\n"
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"\n"
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"<br>\n"
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"\n"
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"### Severity Names\n"
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"\n"
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" * warning\n"
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" * error\n"
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" * exclusion\n"
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" * ignore\n"
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"\n"
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"<br>\n"
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"\n"
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"### Examples\n"
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"\n"
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" (version 1)\n"
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"\n"
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" (rule HV\n"
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" (constraint clearance (min 1.5mm))\n"
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" (condition \"A.NetClass == 'HV'\"))\n"
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"\n"
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"\n"
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" (rule HV\n"
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" (layer outer)\n"
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" (constraint clearance (min 1.5mm))\n"
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" (condition \"A.NetClass == 'HV'\"))\n"
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"\n"
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"\n"
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" (rule HV_HV\n"
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" # wider clearance between HV tracks\n"
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" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
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" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
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"\n"
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"\n"
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" (rule HV_unshielded\n"
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" (constraint clearance (min 2mm))\n"
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" (condition \"A.NetClass == 'HV' && !A.enclosedByArea('Shield*')\"))\n"
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"\n"
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"\n"
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" (rule heavy_thermals\n"
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" (constraint thermal_spoke_width (min 0.5mm))\n"
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" (condition \"A.NetClass == 'HV'\"))\n"
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"<br><br>\n"
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"\n"
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"### Notes\n"
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"\n"
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"Version clause must be the first clause. It indicates the syntax version of "
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"the file so that \n"
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"future rules parsers can perform automatic updates. It should be\n"
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"set to \"1\".\n"
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"\n"
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"Rules should be ordered by specificity. Later rules take\n"
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"precedence over earlier rules; once a matching rule is found\n"
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"no further rules will be checked.\n"
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"\n"
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"Use Ctrl+/ to comment or uncomment line(s).\n"
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"<br><br><br>\n"
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"\n"
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"### Expression functions\n"
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"\n"
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"All function parameters support simple wildcards (`*` and `?`).\n"
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"<br><br>\n"
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"\n"
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" A.intersectsCourtyard('<footprint_refdes>')\n"
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"True if any part of `A` lies within the given footprint's principal "
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"courtyard.\n"
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"<br><br>\n"
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"\n"
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" A.intersectsFrontCourtyard('<footprint_refdes>')\n"
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"True if any part of `A` lies within the given footprint's front courtyard.\n"
|
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"<br><br>\n"
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"\n"
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" A.intersectsBackCourtyard('<footprint_refdes>')\n"
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"True if any part of `A` lies within the given footprint's back courtyard.\n"
|
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"<br><br>\n"
|
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"\n"
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" A.intersectsArea('<zone_name>')\n"
|
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"True if any part of `A` lies within the given zone's outline.\n"
|
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"<br><br>\n"
|
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"\n"
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" A.enclosedByArea('<zone_name>')\n"
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"True if all of `A` lies within the given zone's outline.\n"
|
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"\n"
|
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"NB: this is potentially a more expensive call than `intersectsArea()`. Use "
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"`intersectsArea()`\n"
|
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"where possible.\n"
|
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"<br><br>\n"
|
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"\n"
|
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" A.getField('<field_name>')\n"
|
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"The value of the given field. Only footprints have fields, so a field is "
|
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"only returned if\n"
|
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"`A` is a footprint.\n"
|
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"<br><br>\n"
|
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"\n"
|
||||
" A.isPlated()\n"
|
||||
"True if `A` has a hole which is plated.\n"
|
||||
"<br><br>\n"
|
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"\n"
|
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" A.inDiffPair('<net_name>')\n"
|
||||
"True if `A` has a net that is part of the specified differential pair.\n"
|
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"`<net_name>` is the base name of the differential pair. For example, "
|
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"`inDiffPair('/CLK')`\n"
|
||||
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
|
||||
"<br><br>\n"
|
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"\n"
|
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" AB.isCoupledDiffPair()\n"
|
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"True if `A` and `B` are members of the same diff pair.\n"
|
||||
"<br><br>\n"
|
||||
"\n"
|
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" A.memberOfGroup('<group_name>')\n"
|
||||
"True if `A` is a member of the given group. The name can contain wildcards.\n"
|
||||
"Includes nested membership.\n"
|
||||
"<br><br>\n"
|
||||
"\n"
|
||||
" A.memberOfFootprint('<footprint_reference>|<footprint_id>')\n"
|
||||
"True if `A` is a member of a footprint matching the given reference "
|
||||
"designator or footprint\n"
|
||||
"ID. The parameter can contain wildcards.\n"
|
||||
"\n"
|
||||
"NB: If matching against a footprint ID is desired, the parameter must "
|
||||
"contain a ':'.\n"
|
||||
"<br><br>\n"
|
||||
"\n"
|
||||
" A.memberOfSheet('<sheet_path>')\n"
|
||||
"True if `A` is a member of the given schematic sheet. The sheet path can "
|
||||
"contain wildcards.\n"
|
||||
"<br><br>\n"
|
||||
"\n"
|
||||
" A.existsOnLayer('<layer_name>')\n"
|
||||
"True if `A` exists on the given layer. The layer name can be\n"
|
||||
"either the name assigned in Board Setup > Board Editor Layers or\n"
|
||||
"the canonical name (ie: `F.Cu`).\n"
|
||||
"\n"
|
||||
"NB: this returns true if `A` is on the given layer, independently\n"
|
||||
"of whether or not the rule is being evaluated for that layer.\n"
|
||||
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
|
||||
"<br><br>\n"
|
||||
"\n"
|
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"### More Examples\n"
|
||||
"\n"
|
||||
" (rule \"copper keepout\"\n"
|
||||
" (constraint disallow track via zone)\n"
|
||||
" (condition \"A.intersectsArea('zone3')\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" (rule \"BGA neckdown\"\n"
|
||||
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
|
||||
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
|
||||
" (condition \"A.intersectsCourtyard('U3')\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" # prevent silk over tented vias\n"
|
||||
" (rule silk_over_via\n"
|
||||
" (constraint silk_clearance (min 0.2mm))\n"
|
||||
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" (rule \"Distance between Vias of Different Nets\"\n"
|
||||
" (constraint hole_to_hole (min 0.254mm))\n"
|
||||
" (condition \"A.Type == 'Via' && B.Type == 'Via' && A.Net != B.Net\"))"
|
||||
"\n"
|
||||
"\n"
|
||||
" (rule \"Clearance between Pads of Different Nets\"\n"
|
||||
" (constraint clearance (min 3.0mm))\n"
|
||||
" (condition \"A.Type == 'Pad' && B.Type == 'Pad' && A.Net != B.Net\"))"
|
||||
"\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" (rule \"Via Hole to Track Clearance\"\n"
|
||||
" (constraint hole_clearance (min 0.254mm))\n"
|
||||
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
|
||||
"\n"
|
||||
" (rule \"Pad to Track Clearance\"\n"
|
||||
" (constraint clearance (min 0.2mm))\n"
|
||||
" (condition \"A.Type == 'Pad' && B.Type == 'Track'\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" (rule \"clearance-to-1mm-cutout\"\n"
|
||||
" (constraint edge_clearance (min 0.8mm))\n"
|
||||
" (condition \"A.Layer == 'Edge.Cuts' && A.Line_Width == 1.0mm\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" (rule \"Max Drill Hole Size Mechanical\"\n"
|
||||
" (constraint hole_size (max 6.3mm))\n"
|
||||
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
|
||||
"\n"
|
||||
" (rule \"Max Drill Hole Size PTH\"\n"
|
||||
" (constraint hole_size (max 6.35mm))\n"
|
||||
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" # Specify an optimal gap for a particular diff-pair\n"
|
||||
" (rule \"dp clock gap\"\n"
|
||||
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
|
||||
" (condition \"A.inDiffPair('/CLK')\"))\n"
|
||||
"\n"
|
||||
" # Specify a larger clearance around any diff-pair\n"
|
||||
" (rule \"dp clearance\"\n"
|
||||
" (constraint clearance (min \"1.5mm\"))\n"
|
||||
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" # Don't use thermal reliefs on heatsink pads\n"
|
||||
" (rule heat_sink_pad\n"
|
||||
" (constraint zone_connection solid)\n"
|
||||
" (condition \"A.Fabrication_Property == 'Heatsink pad'\"))\n"
|
||||
"\n"
|
||||
" # Require all four thermal relief spokes to connect to parent zone\n"
|
||||
" (rule fully_spoked_pads\n"
|
||||
" (constraint min_resolved_spokes 4))\n"
|
||||
"\n"
|
||||
" # Set thermal relief gap & spoke width for all zones\n"
|
||||
" (rule defined_relief\n"
|
||||
" (constraint thermal_relief_gap (min 10mil))\n"
|
||||
" (constraint thermal_spoke_width (min 12mil)))\n"
|
||||
"\n"
|
||||
" # Override thermal relief gap & spoke width for GND and PWR zones\n"
|
||||
" (rule defined_relief_pwr\n"
|
||||
" (constraint thermal_relief_gap (min 10mil))\n"
|
||||
" (constraint thermal_spoke_width (min 12mil))\n"
|
||||
" (condition \"A.Name == 'zone_GND' || A.Name == 'zone_PWR'\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" # Prevent solder wicking from SMD pads\n"
|
||||
" (rule holes_in_pads\n"
|
||||
" (constraint physical_hole_clearance (min 0.2mm))\n"
|
||||
" (condition \"B.Pad_Type == 'SMD'\"))\n"
|
||||
"\n"
|
||||
" # Disallow solder mask margin overrides\n"
|
||||
" (rule \"disallow solder mask margin overrides\"\n"
|
||||
" (constraint assertion \"A.Soldermask_Margin_Override == 0mm\")\n"
|
||||
" (condition \"A.Type == 'Pad'\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" # Enforce a mechanical clearance between components and board edge\n"
|
||||
" (rule front_mechanical_board_edge_clearance\n"
|
||||
" (layer \"F.Courtyard\")\n"
|
||||
" (constraint physical_clearance (min 3mm))\n"
|
||||
" (condition \"B.Layer == 'Edge.Cuts'\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" # Check current-carrying capacity\n"
|
||||
" (rule high-current\n"
|
||||
" (constraint track_width (min 1.0mm))\n"
|
||||
" (constraint connection_width (min 0.8mm))\n"
|
||||
" (condition \"A.NetClass == 'Power'\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
" # Separate drill bit and milling cutter size constraints\n"
|
||||
" (rule \"Plated through-hole size\"\n"
|
||||
" (constraint hole_size (min 0.2mm) (max 6.35mm))\n"
|
||||
" (condition \"A.isPlated() && A.Hole_Size_X == A.Hole_Size_Y\"))\n"
|
||||
"\n"
|
||||
" (rule \"Plated slot size\"\n"
|
||||
" (constraint hole_size (min 0.5mm))\n"
|
||||
" (condition \"A.isPlated() && A.Hole_Size_X != A.Hole_Size_Y\"))\n"
|
||||
"\n"
|
||||
"\n"
|
||||
"### 문서\n"
|
||||
"\n"
|
||||
"전체 문서는 다음을 참조하세요. [https://docs.kicad.org](https://docs.kicad."
|
||||
"org/GetMajorMinorVersion/en/pcbnew/pcbnew.html#custom_design_rules)."
|
||||
|
||||
#: pcbnew/dialogs/panel_setup_teardrops_base.cpp:19
|
||||
msgid "Default properties for round shapes:"
|
||||
|
@ -43719,9 +44196,8 @@ msgid "Item allowed at current location."
|
|||
msgstr "현재 경로에서 항목이 사용 가능합니다."
|
||||
|
||||
#: pcbnew/tools/board_inspection_tool.cpp:1515
|
||||
#, fuzzy
|
||||
msgid "Select a footprint to diff with its library equivalent."
|
||||
msgstr "상응하는 라이브러리에서 차이를 둘 풋프린트 선택."
|
||||
msgstr "선택한 풋프린트를 라이브러리의 풋프린트와 비교합니다."
|
||||
|
||||
#: pcbnew/tools/board_inspection_tool.cpp:1533
|
||||
msgid "Select a footprint for a footprint associations report."
|
||||
|
|
Loading…
Reference in New Issue