pcbnew bug fix in place via (partial drc was made) (old bug)
This commit is contained in:
parent
2cfe92de85
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7e79113c22
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@ -8,6 +8,8 @@ email address.
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================================================================================
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================================================================================
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+ all
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+ all
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* hotkeys handling finished
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* hotkeys handling finished
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+ pcbnew
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* bug fix: a subtle bug in place via : partial drc only was made.
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2007-Sep-14 UPDATE Dick Hollenbeck <dick@softplc.com>
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2007-Sep-14 UPDATE Dick Hollenbeck <dick@softplc.com>
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@ -162,6 +162,8 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
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* if a track is in progress :
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* if a track is in progress :
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* put (if possible, i.e. if no DRC problem) a Via on the end of the current
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* put (if possible, i.e. if no DRC problem) a Via on the end of the current
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* track, swap the current active layer and start a new trac segment on the new layer
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* track, swap the current active layer and start a new trac segment on the new layer
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* @param track = track in progress, or NULL
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* @param DC = current device context
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*/
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*/
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{
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{
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TRACK* pt_segm;
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TRACK* pt_segm;
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@ -191,20 +193,27 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
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return;
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return;
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}
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}
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/* Is the current segment Ok (no DRC error) */
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/* Is the current segment Ok (no DRC error) ? */
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if( Drc_On )
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if( Drc_On )
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{
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if( Drc( this, DC, g_CurrentTrackSegment, m_Pcb->m_Track, 1 ) == BAD_DRC )
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if( Drc( this, DC, g_CurrentTrackSegment, m_Pcb->m_Track, 1 ) == BAD_DRC )
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/* DRC error, the change layer is not made */
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/* DRC error, the change layer is not made */
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return;
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return;
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if( g_TwoSegmentTrackBuild && g_CurrentTrackSegment->Back() ) // We must handle 2 segments
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{
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if( Drc( this, DC, g_CurrentTrackSegment->Back(), m_Pcb->m_Track, 1 ) == BAD_DRC )
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return;
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}
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}
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/* Saving current state before placing a via.
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/* Saving current state before placing a via.
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If the via canot be placed this current state will be reused */
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* If the via canot be placed this current state will be reused */
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itmp = g_TrackSegmentCount;
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itmp = g_TrackSegmentCount;
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Begin_Route( g_CurrentTrackSegment, DC );
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Begin_Route( g_CurrentTrackSegment, DC );
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DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
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DrawPanel->ManageCurseur( DrawPanel, DC, FALSE );
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/* create the via */
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/* create the via */
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Via = new SEGVIA( m_Pcb );
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Via = new SEGVIA( m_Pcb );
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Via->m_Flags = IS_NEW;
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Via->m_Flags = IS_NEW;
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Via->m_Width = g_DesignSettings.m_CurrentViaSize;
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Via->m_Width = g_DesignSettings.m_CurrentViaSize;
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@ -220,7 +229,7 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
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else
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else
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GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_BOTTOM;
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GetScreen()->m_Active_Layer = GetScreen()->m_Route_Layer_BOTTOM;
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/* Adjust the via layer pair */
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/* Adjust the via layer pair */
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if( (Via->m_Shape & 15) == VIA_ENTERREE )
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if( (Via->m_Shape & 15) == VIA_ENTERREE )
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{
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{
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Via->SetLayer( old_layer | GetScreen()->m_Active_Layer << 4 );
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Via->SetLayer( old_layer | GetScreen()->m_Active_Layer << 4 );
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@ -230,10 +239,10 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
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Via->SetLayer( old_layer | GetScreen()->m_Active_Layer << 4 );
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Via->SetLayer( old_layer | GetScreen()->m_Active_Layer << 4 );
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}
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}
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else
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else
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Via->SetLayer( 0x0F ); // Usual via is from copper to component; layer pair is 0 and 0x0F
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Via->SetLayer( 0x0F ); // Usual via is from copper to component; layer pair is 0 and 0x0F
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if( Drc_On &&( Drc( this, DC, Via, m_Pcb->m_Track, 1 ) == BAD_DRC ) )
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if( Drc_On &&( Drc( this, DC, Via, m_Pcb->m_Track, 1 ) == BAD_DRC ) )
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{
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{
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/* DRC fault: the Via cannot be placed here ... */
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/* DRC fault: the Via cannot be placed here ... */
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delete Via;
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delete Via;
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GetScreen()->m_Active_Layer = old_layer;
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GetScreen()->m_Active_Layer = old_layer;
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@ -242,39 +251,39 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
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}
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}
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/* A new via was created. It was Ok.
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/* A new via was created. It was Ok.
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Put it in linked list, after the g_CurrentTrackSegment */
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* Put it in linked list, after the g_CurrentTrackSegment */
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Via->Pback = g_CurrentTrackSegment;
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Via->Pback = g_CurrentTrackSegment;
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g_CurrentTrackSegment->Pnext = Via;
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g_CurrentTrackSegment->Pnext = Via;
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g_TrackSegmentCount++;
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g_TrackSegmentCount++;
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/* The g_CurrentTrackSegment is now in linked list and we need a new track segment
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/* The g_CurrentTrackSegment is now in linked list and we need a new track segment
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after the via, starting at via location.
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* after the via, starting at via location.
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it will become the new curren segment (from via to the mouse cursor)
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* it will become the new curren segment (from via to the mouse cursor)
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*/
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*/
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g_CurrentTrackSegment = g_CurrentTrackSegment->Copy(); /* create a new segment
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g_CurrentTrackSegment = g_CurrentTrackSegment->Copy(); /* create a new segment
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from the last entered segment, with the current width, flags, netcode, etc... values
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* from the last entered segment, with the current width, flags, netcode, etc... values
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layer, start and end point are not correct, and will be modified next */
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* layer, start and end point are not correct, and will be modified next */
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g_CurrentTrackSegment->SetLayer( GetScreen()->m_Active_Layer ); // set the layer to the new value
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g_CurrentTrackSegment->SetLayer( GetScreen()->m_Active_Layer ); // set the layer to the new value
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/* the start point is the via position,
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/* the start point is the via position,
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and the end point is the cursor which also is on the via (will change when moving mouse)
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* and the end point is the cursor which also is on the via (will change when moving mouse)
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*/
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*/
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g_CurrentTrackSegment->m_Start = g_CurrentTrackSegment->m_End = Via->m_Start;
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g_CurrentTrackSegment->m_Start = g_CurrentTrackSegment->m_End = Via->m_Start;
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g_TrackSegmentCount++;
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g_TrackSegmentCount++;
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g_CurrentTrackSegment->Pback = Via;
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g_CurrentTrackSegment->Pback = Via;
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Via->Pnext = g_CurrentTrackSegment;
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Via->Pnext = g_CurrentTrackSegment;
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if( g_TwoSegmentTrackBuild )
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if( g_TwoSegmentTrackBuild )
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{
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{
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// Create a second segment (we must have 2 track segments to adjust)
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// Create a second segment (we must have 2 track segments to adjust)
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TRACK* track = g_CurrentTrackSegment;
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TRACK* track = g_CurrentTrackSegment;
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g_CurrentTrackSegment = track->Copy();
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g_CurrentTrackSegment = track->Copy();
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g_TrackSegmentCount++;
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g_TrackSegmentCount++;
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g_CurrentTrackSegment->Pback = track;
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g_CurrentTrackSegment->Pback = track;
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track->Pnext = g_CurrentTrackSegment;
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track->Pnext = g_CurrentTrackSegment;
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@ -324,7 +333,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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MODULE* Module = NULL;
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MODULE* Module = NULL;
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if( g_Show_Ratsnest )
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if( g_Show_Ratsnest )
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return; // Deja Affich<63>
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return; // Deja Affich<63>
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if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
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if( (m_Pcb->m_Status_Pcb & LISTE_CHEVELU_OK) == 0 )
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{
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{
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@ -338,7 +347,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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pt_pad = (D_PAD*) item;
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pt_pad = (D_PAD*) item;
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Module = (MODULE*) pt_pad->m_Parent;
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Module = (MODULE*) pt_pad->m_Parent;
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}
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}
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if( pt_pad ) /* Affichage du chevelu du net correspondant */
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if( pt_pad ) /* Affichage du chevelu du net correspondant */
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{
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{
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pt_pad->Display_Infos( this );
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pt_pad->Display_Infos( this );
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@ -352,7 +361,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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pt_chevelu->status |= CH_VISIBLE;
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pt_chevelu->status |= CH_VISIBLE;
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if( (pt_chevelu->status & CH_ACTIF) == 0 )
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if( (pt_chevelu->status & CH_ACTIF) == 0 )
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continue;
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continue;
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GRSetDrawMode( DC, GR_XOR );
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GRSetDrawMode( DC, GR_XOR );
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GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
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GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
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pt_chevelu->pad_start->m_Pos.y,
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pt_chevelu->pad_start->m_Pos.y,
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@ -370,12 +379,11 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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if( item->m_Parent && (item->m_Parent->Type() == TYPEMODULE) )
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if( item->m_Parent && (item->m_Parent->Type() == TYPEMODULE) )
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Module = (MODULE*) item->m_Parent;
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Module = (MODULE*) item->m_Parent;
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}
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}
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else if( item->Type() == TYPEMODULE )
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else if( item->Type() == TYPEMODULE )
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{
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{
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Module = (MODULE*) item;
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Module = (MODULE*) item;
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}
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}
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if( Module )
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if( Module )
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{
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{
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Module->Display_Infos( this );
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Module->Display_Infos( this );
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@ -390,11 +398,11 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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{
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{
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if( pt_chevelu->status & CH_VISIBLE )
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if( pt_chevelu->status & CH_VISIBLE )
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continue;
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continue;
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pt_chevelu->status |= CH_VISIBLE;
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pt_chevelu->status |= CH_VISIBLE;
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if( (pt_chevelu->status & CH_ACTIF) == 0 )
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if( (pt_chevelu->status & CH_ACTIF) == 0 )
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continue;
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continue;
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GRSetDrawMode( DC, GR_XOR );
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GRSetDrawMode( DC, GR_XOR );
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GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
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GRLine( &DrawPanel->m_ClipBox, DC, pt_chevelu->pad_start->m_Pos.x,
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pt_chevelu->pad_start->m_Pos.y,
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pt_chevelu->pad_start->m_Pos.y,
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@ -405,7 +413,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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}
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}
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}
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}
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}
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}
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pt_pad = NULL;
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pt_pad = NULL;
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}
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}
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}
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}
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@ -417,7 +425,7 @@ void WinEDA_PcbFrame::Show_1_Ratsnest( EDA_BaseStruct* item, wxDC* DC )
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{
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{
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DrawGeneralRatsnest( DC );
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DrawGeneralRatsnest( DC );
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pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
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pt_chevelu = (CHEVELU*) m_Pcb->m_Ratsnest;
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for( ii = m_Pcb->GetNumRatsnests(); (ii > 0) && pt_chevelu; pt_chevelu++, ii-- )
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for( ii = m_Pcb->GetNumRatsnests(); (ii > 0) && pt_chevelu; pt_chevelu++, ii-- )
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pt_chevelu->status &= ~CH_VISIBLE;
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pt_chevelu->status &= ~CH_VISIBLE;
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}
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}
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@ -373,7 +373,7 @@ void WinEDA_PcbFrame::OnHotKey( wxDC* DC, int hotkey,
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case HK_ADD_VIA: // Switch to alternate layer and Place a via if a track is in progress
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case HK_ADD_VIA: // Switch to alternate layer and Place a via if a track is in progress
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if( m_ID_current_state != ID_TRACK_BUTT )
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if( m_ID_current_state != ID_TRACK_BUTT )
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return;
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return;
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if( ItemFree )
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if( ItemFree ) // no track in progress: switch layer only
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{
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{
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Other_Layer_Route( NULL, DC );
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Other_Layer_Route( NULL, DC );
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break;
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break;
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@ -382,7 +382,7 @@ void WinEDA_PcbFrame::OnHotKey( wxDC* DC, int hotkey,
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return;
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return;
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if( (GetCurItem()->m_Flags & IS_NEW) == 0 )
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if( (GetCurItem()->m_Flags & IS_NEW) == 0 )
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return;
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return;
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Other_Layer_Route( (TRACK*) GetCurItem(), DC );
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Other_Layer_Route( (TRACK*) GetCurItem(), DC ); // place via and switch layer
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if( DisplayOpt.ContrastModeDisplay )
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if( DisplayOpt.ContrastModeDisplay )
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GetScreen()->SetRefreshReq();
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GetScreen()->SetRefreshReq();
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break;
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break;
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@ -67,13 +67,16 @@ BEGIN_EVENT_TABLE( WinEDA_PcbFrame, WinEDA_BasePcbFrame )
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EVT_MENU_RANGE(ID_CONFIG_AND_PREFERENCES_START, ID_CONFIG_AND_PREFERENCES_END,
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EVT_MENU_RANGE(ID_CONFIG_AND_PREFERENCES_START, ID_CONFIG_AND_PREFERENCES_END,
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WinEDA_PcbFrame::Process_Config)
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WinEDA_PcbFrame::Process_Config)
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EVT_MENU( ID_COLORS_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_OPTIONS_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_TRACK_SIZE_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_TRACK_SIZE_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_DRAWINGS_WIDTHS_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_DRAWINGS_WIDTHS_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_PAD_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_PAD_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_LOOK_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_LOOK_SETUP, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_CONFIG_SAVE, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_CONFIG_SAVE, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_CONFIG_READ, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_CONFIG_READ, WinEDA_PcbFrame::Process_Config )
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EVT_MENU( ID_PCB_USER_GRID_SETUP, WinEDA_PcbFrame::Process_Special_Functions )
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EVT_MENU( ID_PCB_USER_GRID_SETUP, WinEDA_PcbFrame::Process_Special_Functions )
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EVT_MENU_RANGE( ID_LANGUAGE_CHOICE, ID_LANGUAGE_CHOICE_END,
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EVT_MENU_RANGE( ID_LANGUAGE_CHOICE, ID_LANGUAGE_CHOICE_END,
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WinEDA_DrawFrame::SetLanguage )
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WinEDA_DrawFrame::SetLanguage )
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