Update Translations

This commit is contained in:
Seth Hillbrand 2022-10-07 11:37:40 -07:00
parent bf0b80d676
commit 8f9830eb92
34 changed files with 9546 additions and 13001 deletions

View File

@ -2,7 +2,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2011-11-29 21:48+0200\n"
"Last-Translator: Evgeniy Ivanov <evgeniy_p_ivanov@yahoo.ca>\n"
"Language-Team: KiCad Team <evgeniy_p_ivanov@yahoo.ca>\n"
@ -4506,7 +4506,7 @@ msgid "Shape"
msgstr "Форма"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Радиус"
@ -4541,8 +4541,8 @@ msgstr "Комп. отпечатъци"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Ширина"
@ -4595,14 +4595,14 @@ msgstr "Започни DRC"
msgid "Start Y"
msgstr "Започни DRC"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
#, fuzzy
msgid "End X"
msgstr "Край на инструмент"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#, fuzzy
msgid "End Y"
msgstr "Край на инструмент"
@ -4689,7 +4689,7 @@ msgstr "Ляво"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4965,7 +4965,7 @@ msgstr "Неуспешно отв. на файл \"%s\""
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
#, fuzzy
msgid "Cut"
msgstr "По избор"
@ -4997,7 +4997,7 @@ msgstr ""
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Изтрий"
@ -5640,8 +5640,8 @@ msgid "Invalid size %lld: too large"
msgstr ""
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr ""
@ -17705,7 +17705,7 @@ msgstr "Избор на слой:"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21965,14 +21965,14 @@ msgstr "Други:"
msgid "no layers"
msgstr "2 слоя"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
#, fuzzy
msgid "Position X"
msgstr "Позиция X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
#, fuzzy
msgid "Position Y"
msgstr "Позиция Y"
@ -26057,66 +26057,66 @@ msgstr "Неочаквана грешка при съхранение на ко
msgid "Error loading footprint library table."
msgstr "Архивирай или добави отпечатъци в библиотечен файл"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
#, fuzzy
msgid "Circle Properties"
msgstr "Настройки на извод"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
#, fuzzy
msgid "Arc Properties"
msgstr "Настройки"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
#, fuzzy
msgid "Polygon Properties"
msgstr "Настройки на извод"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
#, fuzzy
msgid "Rectangle Properties"
msgstr "Настройки на извод"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
#, fuzzy
msgid "Line Segment Properties"
msgstr "Библ. настройки на компонента"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
#, fuzzy
msgid "Modify drawing properties"
msgstr "Настройки за чертане"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
#, fuzzy
msgid "The arc angle cannot be zero."
msgstr "Класът на верига по подразбиране неможе да бъде премахнат"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr " Vout трябва да е по-голямо от vref"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr " Vout трябва да е по-голямо от vref"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#, fuzzy
msgid "The rectangle cannot be empty."
msgstr "Класът на верига по подразбиране неможе да бъде премахнат"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
#, fuzzy
msgid "The polygon outline thickness must be >= 0."
msgstr " Vout трябва да е по-голямо от vref"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
#, fuzzy
msgid "Error List"
msgstr "Грешки"
@ -28469,19 +28469,19 @@ msgid "Via type:"
msgstr "Форма на прох.отв.:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
#, fuzzy
msgid "Through"
msgstr "Проходна връзка"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
#, fuzzy
msgid "Micro"
msgstr "Микро проходна връзка"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
#, fuzzy
msgid "Blind/buried"
msgstr "Скрит/-а"
@ -30022,216 +30022,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr "Провери модул"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
#, fuzzy
msgid "Default properties for new dimension objects:"
@ -30893,13 +30683,13 @@ msgstr "Старт на запълване..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -30909,7 +30699,7 @@ msgstr "Старт на запълване..."
msgid "(%s clearance %s; actual %s)"
msgstr "Локална стойност на отст. на маската:"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, fuzzy, c-format
msgid "(nets %s and %s)"
msgstr "Елемент %d %c"
@ -32708,7 +32498,7 @@ msgstr "Завърти извод"
msgid "Castellated"
msgstr "Изчисли"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Диаметър"
@ -33082,7 +32872,7 @@ msgstr "Сляп/погребан прох.отв."
msgid "Through Via"
msgstr "Проходна връзка"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Свредел"
@ -33105,27 +32895,27 @@ msgstr "Извод %s, %s, %s"
msgid "Track %s on %s, length %s"
msgstr "Извод %s, %s, %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
#, fuzzy
msgid "Origin X"
msgstr "Начало на решетката"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
#, fuzzy
msgid "Origin Y"
msgstr "Начало на решетката"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
#, fuzzy
msgid "Layer Top"
msgstr "Слой"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
#, fuzzy
msgid "Layer Bottom"
msgstr "Дъно"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
#, fuzzy
msgid "Via Type"
msgstr "Форма на прох.отв.:"
@ -35576,27 +35366,27 @@ msgstr "Завърти"
msgid "Change Side / Flip"
msgstr "Промяна на размера на прох.отв. и свредлото"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
#, fuzzy
msgid "Move exact"
msgstr "Премести текст"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, fuzzy, c-format
msgid "Duplicated %d item(s)"
msgstr "Дублиране"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
#, fuzzy
msgid "Select reference point for the copy..."
msgstr "Установи нач.коорд. за решетката"
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
#, fuzzy
msgid "Selection copied"
msgstr "Избор на верига"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Копирай етикет"
@ -38156,47 +37946,47 @@ msgstr "Добави клас на верига"
msgid "Presets (Ctrl+Tab):"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
#, fuzzy
msgid "Save preset..."
msgstr "Съхрани като"
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
#, fuzzy
msgid "Delete preset..."
msgstr "Изтрий лист"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Layer preset name:"
msgstr "Избор на слой:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Save Layer Preset"
msgstr "Запази платка"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
#, fuzzy
msgid "Presets"
msgstr "Нулиране"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
#, fuzzy
msgid "Delete Preset"
msgstr "Изтрий лист"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
#, fuzzy
msgid "Select preset:"
msgstr "Избор на неопроводена връзка"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
#, fuzzy
msgid "Open Preferences"
msgstr "Предпочитания"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -3,7 +3,7 @@ msgid ""
msgstr ""
"Project-Id-Version: kicad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-08-15 01:21+0000\n"
"Last-Translator: Arnau Llovet Vidal <arnaullv@gmail.com>\n"
"Language-Team: Catalan <https://hosted.weblate.org/projects/kicad/v6/ca/>\n"
@ -4238,7 +4238,7 @@ msgid "Shape"
msgstr "Forma"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Radi"
@ -4272,8 +4272,8 @@ msgstr "Punts"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Amplada"
@ -4321,13 +4321,13 @@ msgstr "Inici X"
msgid "Start Y"
msgstr "Inici Y"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Final X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Final Y"
@ -4413,7 +4413,7 @@ msgstr "Esquerra"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4695,7 +4695,7 @@ msgstr "No es pot copiar el fitxer '%s'."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Retalla"
@ -4725,7 +4725,7 @@ msgstr "Enganxa les cel·les del porta-retalls a la matriu en la cel·la actual"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Elimina"
@ -5308,8 +5308,8 @@ msgid "Invalid size %lld: too large"
msgstr "Mida no vàlida %lld: massa llarg"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Arc invàlid amb radi %f i angle %f"
@ -17086,7 +17086,7 @@ msgstr "Selecciona capa: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21153,13 +21153,13 @@ msgstr "Altres"
msgid "no layers"
msgstr "Sense capes"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Posició X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Posició Y"
@ -25059,60 +25059,60 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Error en carregar la taula de les biblioteques d'empremtes."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Propietats del cercle"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Propietats de l'arc"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
#, fuzzy
msgid "Polygon Properties"
msgstr "Propietats del pin"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
#, fuzzy
msgid "Rectangle Properties"
msgstr "Propietats del cercle"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Propietats del segment de línia"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Modifica les propietats del dibuix"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
#, fuzzy
msgid "The arc angle cannot be zero."
msgstr "L'angle de l'arc ha de ser més gran que zero."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr "El gruix de l'element ha de ser més gran que zero."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr "El radi ha de ser més gran que zero."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#, fuzzy
msgid "The rectangle cannot be empty."
msgstr "L'angle de l'arc ha de ser més gran que zero."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
#, fuzzy
msgid "The polygon outline thickness must be >= 0."
msgstr "El gruix de l'element ha de ser més gran que zero."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Llista dels errors"
@ -27320,17 +27320,17 @@ msgid "Via type:"
msgstr "Tipus de via:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr ""
@ -28805,216 +28805,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr ""
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Propietats per defecte pels nous objectes de dimensió:"
@ -29642,13 +29432,13 @@ msgstr "S'estan verificant les zones..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29658,7 +29448,7 @@ msgstr "S'estan verificant les zones..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s marge %s; actual %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, fuzzy, c-format
msgid "(nets %s and %s)"
msgstr "Rescata %s com a %s"
@ -31411,7 +31201,7 @@ msgstr "Repeteix el pin"
msgid "Castellated"
msgstr "Calcula"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Diàmetre"
@ -31761,7 +31551,7 @@ msgstr "Via cega o enterrada"
msgid "Through Via"
msgstr "A través d'una via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Perforació"
@ -31784,25 +31574,25 @@ msgstr "Pista (arc) %s sobre %s, longitud %s"
msgid "Track %s on %s, length %s"
msgstr "Pista %s sobre (%s), longitud %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Origen X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Origen Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
#, fuzzy
msgid "Layer Top"
msgstr "Capa"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
#, fuzzy
msgid "Layer Bottom"
msgstr "Inferior"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Tipus de via"
@ -34209,24 +33999,24 @@ msgstr "Gira"
msgid "Change Side / Flip"
msgstr "Canvia la mida de la via i de la perforació"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "S'ha(n) duplicat %d element(s)"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Selecciona el punt de referència per la còpia..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Selecció copiada"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Cancel·la"
@ -36652,44 +36442,44 @@ msgstr "Afegeix una altra classe de xarxa"
msgid "Presets (Ctrl+Tab):"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Desa pre-ajustament..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Elimina pre-ajustament..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Layer preset name:"
msgstr "Selecció de la capa:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Save Layer Preset"
msgstr "Selecció del parell de capes"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
#, fuzzy
msgid "Presets"
msgstr "Restableix"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
#, fuzzy
msgid "Delete Preset"
msgstr "Elimina la xarxa"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Selecciona predefinició:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
#, fuzzy
msgid "Open Preferences"
msgstr "&Preferències"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -14,7 +14,7 @@ msgid ""
msgstr ""
"Project-Id-Version: kicad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-10-03 10:53+0000\n"
"Last-Translator: Jan Straka <bach@email.cz>\n"
"Language-Team: Czech <https://hosted.weblate.org/projects/kicad/v6/cs/>\n"
@ -4201,7 +4201,7 @@ msgid "Shape"
msgstr "Tvar"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Poloměr"
@ -4235,8 +4235,8 @@ msgstr "Body"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Šířka"
@ -4284,13 +4284,13 @@ msgstr "Začátek X"
msgid "Start Y"
msgstr "Začátek Y"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Konec X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Konec Y"
@ -4376,7 +4376,7 @@ msgstr "Vlevo"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4657,7 +4657,7 @@ msgstr "Nelze kopírovat soubor '%s'."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Vyjmout"
@ -4685,7 +4685,7 @@ msgstr "Vložit buňky ze schránky do matice v aktuální buňce"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Smazat"
@ -5264,8 +5264,8 @@ msgid "Invalid size %lld: too large"
msgstr "Neplatná velikost %lld: příliš velká"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Neplatný oblouk s poloměrem %f a úhlem %f"
@ -16854,7 +16854,7 @@ msgstr "Výběr vrstvy: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -20806,13 +20806,13 @@ msgstr "a další"
msgid "no layers"
msgstr "žádné vrstvy"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Pozice X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Pozice Y"
@ -24573,55 +24573,55 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Chyba načtení tabulky knihovny pouzder."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Vlastnosti kružnice"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Vlastnosti oblouku"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Mnohoúhelník Vlastnosti"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Vlastnosti obdélníku"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Vlastnosti segmentu čáry"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Upravit vlastnosti kresby"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "Úhel oblouku nemůže být nulový."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr "Tloušťka položky musí být větší než nula."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr "Poloměr musí být větší než nula."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Obdélník nemůže být prázdný."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr "Tloušťka obrysu polygonu musí být> = 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Seznam chyb"
@ -26772,17 +26772,17 @@ msgid "Via type:"
msgstr "Typ prokovu:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Průchozí"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Mikro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Slepé/vnořené"
@ -28212,216 +28212,6 @@ msgstr "Pravidla DRC:"
msgid "Check rule syntax"
msgstr "Kontrola syntaxe pravidla"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Výchozí vlastnosti pro nové prvky typu kóty:"
@ -29046,13 +28836,13 @@ msgstr "Kontrola zón..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29062,7 +28852,7 @@ msgstr "Kontrola zón..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s izolační mezera %s; aktuální %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(sítě %s a %s)"
@ -30763,7 +30553,7 @@ msgstr "Chladič"
msgid "Castellated"
msgstr "Vypočítat"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Průměr"
@ -31106,7 +30896,7 @@ msgstr "Slepé/vnořené prokovy"
msgid "Through Via"
msgstr "Průchozí prokov"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Vrtání"
@ -31129,23 +30919,23 @@ msgstr "Spoj (oblouk) %s na %s, délka %s"
msgid "Track %s on %s, length %s"
msgstr "Spoj %s na %s, délka %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Počátek X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Počátek Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Horní vrstva"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Spodní vrstva"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Typ prokovu"
@ -31813,7 +31603,7 @@ msgstr ""
"ekvivalent v KiCadu. Místo toho se používá plná výplň."
#: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:3567
#, c-format, fuzzy
#, fuzzy, c-format
msgid ""
"The CADSTAR Hatching code '%s' has %d hatches defined. KiCad only supports 2 "
"hatches (crosshatching) 90 degrees apart. The imported hatching is "
@ -33627,25 +33417,25 @@ msgstr "Otočit"
msgid "Change Side / Flip"
msgstr "Změnit stranu / Obrátit"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Přesunout přesně"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "Duplikována %d položka(y)"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
#, fuzzy
msgid "Select reference point for the copy..."
msgstr "Vybrat referenční bod pro kopírování..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Výběr zkopírován"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
msgid "Copy canceled"
msgstr "Kopírování zrušeno"
@ -35927,39 +35717,39 @@ msgstr "Skrýt všechny ostatní třídy sítí"
msgid "Presets (Ctrl+Tab):"
msgstr "Přednastavuje (Ctrl+Tab):"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Uložit předvolbu..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Smazat předvolbu..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Název předvolby vrstvy:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Uložit předvolbu vrstvy"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Předvolby"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Smazat předvolbu"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Vybrat předvolbu:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Otevřít Předvolby"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -6,7 +6,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2021-08-20 19:52+0000\n"
"Last-Translator: Seth Hillbrand <seth@kipro-pcb.com>\n"
"Language-Team: Danish <https://hosted.weblate.org/projects/kicad/master-"
@ -4314,7 +4314,7 @@ msgid "Shape"
msgstr "Figur"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Radius"
@ -4348,8 +4348,8 @@ msgstr "Punkter"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Bredde"
@ -4400,13 +4400,13 @@ msgstr "Start lag"
msgid "Start Y"
msgstr "Start lag"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Afslut X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Afslut Y"
@ -4492,7 +4492,7 @@ msgstr "Venstre"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4785,7 +4785,7 @@ msgstr "Kan ikke kopiere filen \"%s\"."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Klip"
@ -4813,7 +4813,7 @@ msgstr "Indsæt udklipsholderceller i matrix ved den aktuelle celle"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Slet"
@ -5407,8 +5407,8 @@ msgid "Invalid size %lld: too large"
msgstr "Ugyldig størrelse %ll d: for stor"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Ugyldig lysbue med radius %f og vinkel %f"
@ -17237,7 +17237,7 @@ msgstr "Vælg lag: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21377,13 +21377,13 @@ msgstr "og andre"
msgid "no layers"
msgstr "ingen lag"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Position X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Position Y"
@ -25253,57 +25253,57 @@ msgid "Error loading footprint library table."
msgstr ""
"Der opstod en fejl under indlæsning af projektfodspor-biblioteketabellen"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Cirkelegenskaber"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Arc Properties"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Polygon-egenskaber"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Rektangelegenskaber"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Egenskaber for linjesegment"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Rediger tegneegenskaber"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "Buevinklen kan ikke være nul."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr "Sporafstand skal være større end 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr "Sporafstand skal være større end 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Rektanglet kan ikke være tomt."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Fejlliste"
@ -27520,17 +27520,17 @@ msgid "Via type:"
msgstr "Via type:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "igennem"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Micro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Blind / begravet"
@ -28997,216 +28997,6 @@ msgstr "DRC-regler:"
msgid "Check rule syntax"
msgstr "Tjek regelsyntaks"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Standardegenskaber for nye dimensionobjekter:"
@ -29831,13 +29621,13 @@ msgstr "Kontrol af zoneudfyldning ..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29847,7 +29637,7 @@ msgstr "Kontrol af zoneudfyldning ..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s clearance %s; faktisk %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(net %s og %s)"
@ -31602,7 +31392,7 @@ msgstr "Kølelegeme"
msgid "Castellated"
msgstr "Castelleret"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Diameter"
@ -31953,7 +31743,7 @@ msgstr "Blind / Begravet Via"
msgid "Through Via"
msgstr "Gennem Via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Bore"
@ -31976,23 +31766,23 @@ msgstr "Spor %s på %s, længde %s"
msgid "Track %s on %s, length %s"
msgstr "Spor %s på %s, længde %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Oprindelse X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Oprindelse Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Layer Top"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Lagbund"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Via Type"
@ -34568,24 +34358,24 @@ msgstr "Roter"
msgid "Change Side / Flip"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Flyt nøjagtigt"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "Kopieret %d vare (r)"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Vælg referencepunkt for kopien ..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Valg kopieret"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Kopi annulleret"
@ -36859,39 +36649,39 @@ msgstr "Skjul alle andre netklasser"
msgid "Presets (Ctrl+Tab):"
msgstr "(Ctrl + Tab)"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Gem forudindstilling ..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Slet forudindstilling ..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Lagets forudindstillede navn:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Gem lagindstilling"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Forudindstilling"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Slet forudindstilling"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Vælg forudindstilling:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Åben præferencer"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

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@ -2,7 +2,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2018-07-15 17:07+0200\n"
"Last-Translator: Simon Richter <Simon.Richter@hogyros.de>\n"
"Language-Team: Simon Richter <Simon.Richter@hogyros.de>\n"
@ -20092,421 +20092,6 @@ msgstr "DRC rules:"
msgid "Check rule syntax"
msgstr "Check rule syntax"
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgid "Default properties for new dimension objects:"
msgstr "Default properties for new dimension objects:"
@ -26417,6 +26002,429 @@ msgstr "KiCad Schematic"
msgid "KiCad Printed Circuit Board"
msgstr "KiCad Printed Circuit Board"
#~ msgid ""
#~ "### Top-level Clauses\n"
#~ "\n"
#~ " (version <number>)\n"
#~ "\n"
#~ " (rule <rule_name> <rule_clause> ...)\n"
#~ "\n"
#~ "\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Rule Clauses\n"
#~ "\n"
#~ " (constraint <constraint_type> ...)\n"
#~ "\n"
#~ " (condition \"<expression>\")\n"
#~ "\n"
#~ " (layer \"<layer_name>\")\n"
#~ "\n"
#~ "\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Constraint Types\n"
#~ "\n"
#~ " * annular\\_width\n"
#~ " * clearance\n"
#~ " * courtyard_clearance\n"
#~ " * diff\\_pair\\_gap\n"
#~ " * diff\\_pair\\_uncoupled\n"
#~ " * disallow\n"
#~ " * edge\\_clearance\n"
#~ " * length\n"
#~ " * hole\\_clearance\n"
#~ " * hole\\_size\n"
#~ " * silk\\_clearance\n"
#~ " * skew\n"
#~ " * track\\_width\n"
#~ " * via\\_count\n"
#~ " * via\\_diameter\n"
#~ "\n"
#~ "\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Item Types\n"
#~ "\n"
#~ " * buried_via\n"
#~ " * graphic\n"
#~ " * hole\n"
#~ " * micro_via\n"
#~ " * pad\n"
#~ " * text\n"
#~ " * track\n"
#~ " * via\n"
#~ " * zone\n"
#~ "\n"
#~ "<br>\n"
#~ "\n"
#~ "### Examples\n"
#~ "\n"
#~ " (version 1)\n"
#~ "\n"
#~ " (rule HV\n"
#~ " (constraint clearance (min 1.5mm))\n"
#~ " (condition \"A.NetClass == 'HV'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule HV\n"
#~ " (layer outer)\n"
#~ " (constraint clearance (min 1.5mm))\n"
#~ " (condition \"A.NetClass == 'HV'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule HV_HV\n"
#~ " # wider clearance between HV tracks\n"
#~ " (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
#~ " (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule HV_unshielded\n"
#~ " (constraint clearance (min 2mm))\n"
#~ " (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Notes\n"
#~ "\n"
#~ "Version clause must be the first clause. It indicates the syntax version "
#~ "of the file so that \n"
#~ "future rules parsers can perform automatic updates. It should be\n"
#~ "set to \"1\".\n"
#~ "\n"
#~ "Rules should be ordered by specificity. Later rules take\n"
#~ "precedence over earlier rules; once a matching rule is found\n"
#~ "no further rules will be checked.\n"
#~ "\n"
#~ "Use Ctrl+/ to comment or uncomment line(s).\n"
#~ "<br><br><br>\n"
#~ "\n"
#~ "### Expression functions\n"
#~ "\n"
#~ "All function parameters support simple wildcards (`*` and `?`).\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideCourtyard('<footprint_refdes>')\n"
#~ "True if any part of `A` lies within the given footprint's principal "
#~ "courtyard.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideFrontCourtyard('<footprint_refdes>')\n"
#~ "True if any part of `A` lies within the given footprint's front "
#~ "courtyard.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideBackCourtyard('<footprint_refdes>')\n"
#~ "True if any part of `A` lies within the given footprint's back "
#~ "courtyard.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideArea('<zone_name>')\n"
#~ "True if any part of `A` lies within the given zone's outline.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.isPlated()\n"
#~ "True if `A` has a hole which is plated.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.inDiffPair('<net_name>')\n"
#~ "True if `A` has net that is part of the specified differential pair.\n"
#~ "`<net_name>` is the base name of the differential pair. For example, "
#~ "`inDiffPair('/CLK')`\n"
#~ "matches items in the `/CLK_P` and `/CLK_N` nets.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " AB.isCoupledDiffPair()\n"
#~ "True if `A` and `B` are members of the same diff pair.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.memberOf('<group_name>')\n"
#~ "True if `A` is a member of the given group. Includes nested membership.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.existsOnLayer('<layer_name>')\n"
#~ "True if `A` exists on the given layer. The layer name can be\n"
#~ "either the name assigned in Board Setup > Board Editor Layers or\n"
#~ "the canonical name (ie: `F.Cu`).\n"
#~ "\n"
#~ "NB: this returns true if `A` is on the given layer, independently\n"
#~ "of whether or not the rule is being evaluated for that layer.\n"
#~ "For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
#~ "<br><br><br>\n"
#~ "\n"
#~ "### More Examples\n"
#~ "\n"
#~ " (rule \"copper keepout\"\n"
#~ " (constraint disallow track via zone)\n"
#~ " (condition \"A.insideArea('zone3')\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"BGA neckdown\"\n"
#~ " (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
#~ " (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
#~ " (condition \"A.insideCourtyard('U3')\"))\n"
#~ "\n"
#~ "\n"
#~ " # prevent silk over tented vias\n"
#~ " (rule silk_over_via\n"
#~ " (constraint silk_clearance (min 0.2mm))\n"
#~ " (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"Distance between Vias of Different Nets\"\n"
#~ " (constraint hole_to_hole (min 0.254mm))\n"
#~ " (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net"
#~ "\"))\n"
#~ "\n"
#~ " (rule \"Clearance between Pads of Different Nets\"\n"
#~ " (constraint clearance (min 3.0mm))\n"
#~ " (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net"
#~ "\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"Via Hole to Track Clearance\"\n"
#~ " (constraint hole_clearance (min 0.254mm))\n"
#~ " (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
#~ "\n"
#~ " (rule \"Pad to Track Clearance\"\n"
#~ " (constraint clearance (min 0.2mm))\n"
#~ " (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"clearance-to-1mm-cutout\"\n"
#~ " (constraint clearance (min 0.8mm))\n"
#~ " (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"Max Drill Hole Size Mechanical\"\n"
#~ " (constraint hole_size (max 6.3mm))\n"
#~ " (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
#~ "\n"
#~ " (rule \"Max Drill Hole Size PTH\"\n"
#~ " (constraint hole_size (max 6.35mm))\n"
#~ " (condition \"A.Pad_Type == 'Through-hole'\"))\n"
#~ "\n"
#~ "\n"
#~ " # Specify an optimal gap for a particular diff-pair\n"
#~ " (rule \"dp clock gap\"\n"
#~ " (constraint diff_pair_gap (opt \"0.8mm\"))\n"
#~ " (condition \"A.inDiffPair('/CLK')\"))\n"
#~ "\n"
#~ " # Specify a larger clearance around any diff-pair\n"
#~ " (rule \"dp clearance\"\n"
#~ " (constraint clearance (min \"1.5mm\"))\n"
#~ " (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
#~ msgstr ""
#~ "### Top-level Clauses\n"
#~ "\n"
#~ " (version <number>)\n"
#~ "\n"
#~ " (rule <rule_name> <rule_clause> ...)\n"
#~ "\n"
#~ "\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Rule Clauses\n"
#~ "\n"
#~ " (constraint <constraint_type> ...)\n"
#~ "\n"
#~ " (condition \"<expression>\")\n"
#~ "\n"
#~ " (layer \"<layer_name>\")\n"
#~ "\n"
#~ "\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Constraint Types\n"
#~ "\n"
#~ " * annular\\_width\n"
#~ " * clearance\n"
#~ " * courtyard_clearance\n"
#~ " * diff\\_pair\\_gap\n"
#~ " * diff\\_pair\\_uncoupled\n"
#~ " * disallow\n"
#~ " * edge\\_clearance\n"
#~ " * length\n"
#~ " * hole\\_clearance\n"
#~ " * hole\\_size\n"
#~ " * silk\\_clearance\n"
#~ " * skew\n"
#~ " * track\\_width\n"
#~ " * via\\_count\n"
#~ " * via\\_diameter\n"
#~ "\n"
#~ "\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Item Types\n"
#~ "\n"
#~ " * buried_via\n"
#~ " * graphic\n"
#~ " * hole\n"
#~ " * micro_via\n"
#~ " * pad\n"
#~ " * text\n"
#~ " * track\n"
#~ " * via\n"
#~ " * zone\n"
#~ "\n"
#~ "<br>\n"
#~ "\n"
#~ "### Examples\n"
#~ "\n"
#~ " (version 1)\n"
#~ "\n"
#~ " (rule HV\n"
#~ " (constraint clearance (min 1.5mm))\n"
#~ " (condition \"A.NetClass == 'HV'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule HV\n"
#~ " (layer outer)\n"
#~ " (constraint clearance (min 1.5mm))\n"
#~ " (condition \"A.NetClass == 'HV'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule HV_HV\n"
#~ " # wider clearance between HV tracks\n"
#~ " (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
#~ " (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule HV_unshielded\n"
#~ " (constraint clearance (min 2mm))\n"
#~ " (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
#~ "<br><br>\n"
#~ "\n"
#~ "### Notes\n"
#~ "\n"
#~ "Version clause must be the first clause. It indicates the syntax version "
#~ "of the file so that \n"
#~ "future rules parsers can perform automatic updates. It should be\n"
#~ "set to \"1\".\n"
#~ "\n"
#~ "Rules should be ordered by specificity. Later rules take\n"
#~ "precedence over earlier rules; once a matching rule is found\n"
#~ "no further rules will be checked.\n"
#~ "\n"
#~ "Use Ctrl+/ to comment or uncomment line(s).\n"
#~ "<br><br><br>\n"
#~ "\n"
#~ "### Expression functions\n"
#~ "\n"
#~ "All function parameters support simple wildcards (`*` and `?`).\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideCourtyard('<footprint_refdes>')\n"
#~ "True if any part of `A` lies within the given footprint's principal "
#~ "courtyard.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideFrontCourtyard('<footprint_refdes>')\n"
#~ "True if any part of `A` lies within the given footprint's front "
#~ "courtyard.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideBackCourtyard('<footprint_refdes>')\n"
#~ "True if any part of `A` lies within the given footprint's back "
#~ "courtyard.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.insideArea('<zone_name>')\n"
#~ "True if any part of `A` lies within the given zone's outline.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.isPlated()\n"
#~ "True if `A` has a hole which is plated.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.inDiffPair('<net_name>')\n"
#~ "True if `A` has net that is part of the specified differential pair.\n"
#~ "`<net_name>` is the base name of the differential pair. For example, "
#~ "`inDiffPair('/CLK')`\n"
#~ "matches items in the `/CLK_P` and `/CLK_N` nets.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " AB.isCoupledDiffPair()\n"
#~ "True if `A` and `B` are members of the same diff pair.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.memberOf('<group_name>')\n"
#~ "True if `A` is a member of the given group. Includes nested membership.\n"
#~ "<br><br>\n"
#~ "\n"
#~ " A.existsOnLayer('<layer_name>')\n"
#~ "True if `A` exists on the given layer. The layer name can be\n"
#~ "either the name assigned in Board Setup > Board Editor Layers or\n"
#~ "the canonical name (ie: `F.Cu`).\n"
#~ "\n"
#~ "NB: this returns true if `A` is on the given layer, independently\n"
#~ "of whether or not the rule is being evaluated for that layer.\n"
#~ "For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
#~ "<br><br><br>\n"
#~ "\n"
#~ "### More Examples\n"
#~ "\n"
#~ " (rule \"copper keepout\"\n"
#~ " (constraint disallow track via zone)\n"
#~ " (condition \"A.insideArea('zone3')\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"BGA neckdown\"\n"
#~ " (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
#~ " (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
#~ " (condition \"A.insideCourtyard('U3')\"))\n"
#~ "\n"
#~ "\n"
#~ " # prevent silk over tented vias\n"
#~ " (rule silk_over_via\n"
#~ " (constraint silk_clearance (min 0.2mm))\n"
#~ " (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"Distance between Vias of Different Nets\"\n"
#~ " (constraint hole_to_hole (min 0.254mm))\n"
#~ " (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net"
#~ "\"))\n"
#~ "\n"
#~ " (rule \"Clearance between Pads of Different Nets\"\n"
#~ " (constraint clearance (min 3.0mm))\n"
#~ " (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net"
#~ "\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"Via Hole to Track Clearance\"\n"
#~ " (constraint hole_clearance (min 0.254mm))\n"
#~ " (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
#~ "\n"
#~ " (rule \"Pad to Track Clearance\"\n"
#~ " (constraint clearance (min 0.2mm))\n"
#~ " (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"clearance-to-1mm-cutout\"\n"
#~ " (constraint clearance (min 0.8mm))\n"
#~ " (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
#~ "\n"
#~ "\n"
#~ " (rule \"Max Drill Hole Size Mechanical\"\n"
#~ " (constraint hole_size (max 6.3mm))\n"
#~ " (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
#~ "\n"
#~ " (rule \"Max Drill Hole Size PTH\"\n"
#~ " (constraint hole_size (max 6.35mm))\n"
#~ " (condition \"A.Pad_Type == 'Through-hole'\"))\n"
#~ "\n"
#~ "\n"
#~ " # Specify an optimal gap for a particular diff-pair\n"
#~ " (rule \"dp clock gap\"\n"
#~ " (constraint diff_pair_gap (opt \"0.8mm\"))\n"
#~ " (condition \"A.inDiffPair('/CLK')\"))\n"
#~ "\n"
#~ " # Specify a larger clearance around any diff-pair\n"
#~ " (rule \"dp clearance\"\n"
#~ " (constraint clearance (min \"1.5mm\"))\n"
#~ " (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
#, c-format
#~ msgid "Unable to locate padstack %s in file %s\n"
#~ msgstr "Unable to locate padstack %s in file %s\n"

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@ -3,7 +3,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-04-28 11:12+0000\n"
"Last-Translator: Miklós Márton <martonmiklosqdev@gmail.com>\n"
"Language-Team: Hungarian <https://hosted.weblate.org/projects/kicad/v6/hu/>\n"
@ -4404,7 +4404,7 @@ msgid "Shape"
msgstr "Alak"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Sugár"
@ -4439,8 +4439,8 @@ msgstr "Pont vonszolása"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Szélesség"
@ -4491,14 +4491,14 @@ msgstr "Kezdő Y:"
msgid "Start Y"
msgstr "Kezdő Y:"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
#, fuzzy
msgid "End X"
msgstr "Vég X:"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#, fuzzy
msgid "End Y"
msgstr "Vég Y:"
@ -4585,7 +4585,7 @@ msgstr "Balra"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4887,7 +4887,7 @@ msgstr "A(z) \"%s\" fájl nem másolható."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Kivágás"
@ -4916,7 +4916,7 @@ msgstr ""
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Töröl"
@ -5566,8 +5566,8 @@ msgid "Invalid size %lld: too large"
msgstr "Érvénytelen méret, túl nagy: %lld"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Érvénytelen körív %f sugárral és %f° nyílással"
@ -17339,7 +17339,7 @@ msgstr "Réteg kiválasztása:"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21521,14 +21521,14 @@ msgstr " és további"
msgid "no layers"
msgstr "nem réteg"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
#, fuzzy
msgid "Position X"
msgstr "X pozíció:"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
#, fuzzy
msgid "Position Y"
msgstr "Y pozíció:"
@ -25531,57 +25531,57 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Hiba történt az alkatrészrajzolat könyvtártáblázat betöltése során"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Kör tulajdonságok"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Körív tulajdonságok"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Sokszög tulajdonságok"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
#, fuzzy
msgid "Rectangle Properties"
msgstr "Kör tulajdonságok"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Vonalszegmens tulajdonságok"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Rajzelem tulajdonságok módosítása"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "A körív nyílásszöge nem lehet nulla."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr "Az elem vastagságának nullánál nagyobbnak kell lennie."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr "A sugárnak nullánál nagyobbnak kell lennie."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#, fuzzy
msgid "The rectangle cannot be empty."
msgstr "A körív nyílásszöge nem lehet nulla."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr "A sokszög körvonal vastagsága nem lehet negatív."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Hibalista"
@ -27856,17 +27856,17 @@ msgid "Via type:"
msgstr "Via típus:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Átmenő"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "μVia"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Zsák/eltemetett"
@ -29390,216 +29390,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr ""
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
#, fuzzy
msgid "Default properties for new dimension objects:"
@ -30266,13 +30056,13 @@ msgstr "Zónakitöltések ellenőrzése..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -30282,7 +30072,7 @@ msgstr "Zónakitöltések ellenőrzése..."
msgid "(%s clearance %s; actual %s)"
msgstr "lokális távolságtartás és szigetelési távolság beállítások"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, fuzzy, c-format
msgid "(nets %s and %s)"
msgstr "a %c és %c részegységben"
@ -32098,7 +31888,7 @@ msgstr "Rajzjel láb ismétlése"
msgid "Castellated"
msgstr "Számolás"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Forrszem átmérő"
@ -32474,7 +32264,7 @@ msgstr "Zsák/eltemetett via"
msgid "Through Via"
msgstr "Átmenő via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Furat"
@ -32497,27 +32287,27 @@ msgstr "Vezetősáv %s %s a(z) %s rétegen, hossza: %s"
msgid "Track %s on %s, length %s"
msgstr "Vezetősáv %s %s a(z) %s rétegen, hossza: %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
#, fuzzy
msgid "Origin X"
msgstr "Kezdőpont"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
#, fuzzy
msgid "Origin Y"
msgstr "Kezdőpont"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
#, fuzzy
msgid "Layer Top"
msgstr "Réteg"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
#, fuzzy
msgid "Layer Bottom"
msgstr "Alulra"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
#, fuzzy
msgid "Via Type"
msgstr "Via típus:"
@ -35017,26 +34807,26 @@ msgstr "Forgatás"
msgid "Change Side / Flip"
msgstr "Via átmérő és furat módosítása"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Mozgatás pontosan"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "%d azonos elem"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
#, fuzzy
msgid "Select reference point for the copy..."
msgstr "Referencia pont megadása másoláshoz..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
#, fuzzy
msgid "Selection copied"
msgstr "Kijelölés másolva."
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Másolás megszakítva."
@ -37482,47 +37272,47 @@ msgstr "Egy új vezetékosztály hozzáadása"
msgid "Presets (Ctrl+Tab):"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
#, fuzzy
msgid "Save preset..."
msgstr "Mentés másként"
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
#, fuzzy
msgid "Delete preset..."
msgstr "Vezeték törlése"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Layer preset name:"
msgstr "Rétegválasztás:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Save Layer Preset"
msgstr "Könyvtárak mentése"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
#, fuzzy
msgid "Presets"
msgstr "Visszaállítás"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
#, fuzzy
msgid "Delete Preset"
msgstr "Vezeték törlése"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
#, fuzzy
msgid "Select preset:"
msgstr "Légvezetékek kiválasztása"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
#, fuzzy
msgid "Open Preferences"
msgstr "Beállítások"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -6,7 +6,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2021-11-22 17:30+0000\n"
"Last-Translator: whenwesober <naomi16i_1298q@cikuh.com>\n"
"Language-Team: Indonesian <https://hosted.weblate.org/projects/kicad/master-"
@ -4180,7 +4180,7 @@ msgid "Shape"
msgstr ""
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr ""
@ -4214,8 +4214,8 @@ msgstr ""
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Lebar"
@ -4266,13 +4266,13 @@ msgstr "Titik mulai"
msgid "Start Y"
msgstr "Titik mulai"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr ""
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr ""
@ -4358,7 +4358,7 @@ msgstr "Kiri"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4636,7 +4636,7 @@ msgstr "Tidak dapat menyalin berkas \"%s\"."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Potong"
@ -4664,7 +4664,7 @@ msgstr ""
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Hapus"
@ -5245,8 +5245,8 @@ msgid "Invalid size %lld: too large"
msgstr ""
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr ""
@ -16311,7 +16311,7 @@ msgstr ""
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -20227,13 +20227,13 @@ msgstr ""
msgid "no layers"
msgstr ""
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr ""
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr ""
@ -23889,55 +23889,55 @@ msgstr ""
"\n"
"%s"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr ""
@ -25998,17 +25998,17 @@ msgid "Via type:"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr ""
@ -27394,216 +27394,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr ""
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr ""
@ -28202,13 +27992,13 @@ msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -28218,7 +28008,7 @@ msgstr ""
msgid "(%s clearance %s; actual %s)"
msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr ""
@ -29912,7 +29702,7 @@ msgstr ""
msgid "Castellated"
msgstr ""
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr ""
@ -30249,7 +30039,7 @@ msgstr ""
msgid "Through Via"
msgstr ""
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr ""
@ -30272,23 +30062,23 @@ msgstr ""
msgid "Track %s on %s, length %s"
msgstr ""
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr ""
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr ""
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr ""
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr ""
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr ""
@ -32664,24 +32454,24 @@ msgstr "Rotasi"
msgid "Change Side / Flip"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
msgid "Copy canceled"
msgstr ""
@ -34886,39 +34676,39 @@ msgstr ""
msgid "Presets (Ctrl+Tab):"
msgstr "Preset (Ctrl+Tab):"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Simpan preset..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Hapus preset..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Nama layer preset:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Simpan Layer Preset"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Hapus Preset"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Pilih preset:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Buka Preferensi"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -102,7 +102,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-06-09 19:41+0200\n"
"Last-Translator: Marco Ciampa <ciampix@posteo.net>\n"
"Language-Team: Italian <https://hosted.weblate.org/projects/kicad/master-"
@ -4336,7 +4336,7 @@ msgid "Shape"
msgstr "Forma"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Raggio"
@ -4370,8 +4370,8 @@ msgstr "Punti"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Larghezza"
@ -4419,13 +4419,13 @@ msgstr "Inizio X"
msgid "Start Y"
msgstr "Inizio Y"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Fine X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Fine Y"
@ -4511,7 +4511,7 @@ msgstr "Sinistra"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4796,7 +4796,7 @@ msgstr "Impossibile copiare il file '%s'."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Taglia"
@ -4825,7 +4825,7 @@ msgstr "Incolla le celle sugli appunti sulla matrice alla cella corrente"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Cancella"
@ -5405,8 +5405,8 @@ msgid "Invalid size %lld: too large"
msgstr "Dimensione non valida %lld: troppo larga"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Arco non valido con raggio %f e angolo %f"
@ -16946,7 +16946,7 @@ msgstr "Seleziona strato: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -20939,13 +20939,13 @@ msgstr "e altri"
msgid "no layers"
msgstr "nessuno strato"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Posizione X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Posizione Y"
@ -24785,57 +24785,57 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Errore nel caricamento tabella librerie impronte."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Proprietà cerchio"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Proprietà arco"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Proprietà poligono"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Proprietà rettangolo"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Proprietà segmento di linea"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Modifica proprietà grafiche"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "L'angolo dell'arco non può essere zero."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr "Lo spazio piste deve essere maggiore di 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr "Lo spazio piste deve essere maggiore di 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Il rettangolo non può essere vuoto."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Elenco errori"
@ -27033,17 +27033,17 @@ msgid "Via type:"
msgstr "Tipo via:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Passante"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Micro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Cieco/sepolto"
@ -28536,216 +28536,6 @@ msgstr "Regole DRC:"
msgid "Check rule syntax"
msgstr "Controlla la sintassi regole"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Proprietà predefinite per i nuovi oggetti dimensione:"
@ -29348,13 +29138,13 @@ msgstr "Controllo zone..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29364,7 +29154,7 @@ msgstr "Controllo zone..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s distanza %s; attuale %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(coll %s e %s)"
@ -31089,7 +30879,7 @@ msgstr "Dissipatore"
msgid "Castellated"
msgstr "Dentellati"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Diametro"
@ -31427,7 +31217,7 @@ msgstr "Via cieco/sepolto"
msgid "Through Via"
msgstr "Via passanti"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Foro"
@ -31450,23 +31240,23 @@ msgstr "Pista (arco) %s su %s, lung. %s"
msgid "Track %s on %s, length %s"
msgstr "Pista %s su %s, lung. %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "X origine"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Y origine"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Strato superiore"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Strato inferiore"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Tipo via"
@ -34005,24 +33795,24 @@ msgstr "Ruota"
msgid "Change Side / Flip"
msgstr "Cambia lato / ribalta"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Sposta esattamente"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "%d elementi duplicati"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Selezionare il punto di riferimento per la copia..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Selezione copiata"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
msgid "Copy canceled"
msgstr "Copia annullata"
@ -36253,39 +36043,39 @@ msgstr "Nascondi tutte le altre netclass"
msgid "Presets (Ctrl+Tab):"
msgstr "Preimpostazioni (Ctrl+Tab):"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Salva preimpostazione..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Cancella preimpostazione..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Nome preimpostazione strato:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Salva preimpostazione strato"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Reimpostazioni"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Cancella preimpostazione"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Seleziona preimpostazione:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Apri preferenze"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

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@ -6,7 +6,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad 4.0\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2021-08-20 19:52+0000\n"
"Last-Translator: Seth Hillbrand <seth@kipro-pcb.com>\n"
"Language-Team: Lithuanian <https://hosted.weblate.org/projects/kicad/master-"
@ -4334,7 +4334,7 @@ msgid "Shape"
msgstr "Forma"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Spindulys"
@ -4368,8 +4368,8 @@ msgstr "Taškai"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Plotis"
@ -4420,13 +4420,13 @@ msgstr "Начальная точка по X:"
msgid "Start Y"
msgstr "Начальная точка по Y:"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "X pabaiga"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Pabaiga Y"
@ -4512,7 +4512,7 @@ msgstr "Kairėn"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4805,7 +4805,7 @@ msgstr "Negalima nukopijuoti failo „%s“."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Iškirpti"
@ -4833,7 +4833,7 @@ msgstr "Įklijuokite iškarpinės langelius matricai dabartinėje langelyje"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Pašalinti"
@ -5428,8 +5428,8 @@ msgid "Invalid size %lld: too large"
msgstr "Neteisingas dydis %ll d: per didelis"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Netinkamas lankas su spinduliu %f ir kampu %f"
@ -17279,7 +17279,7 @@ msgstr "Pasirinkite sluoksnį: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21445,13 +21445,13 @@ msgstr "ir kiti"
msgid "no layers"
msgstr "jokių sluoksnių"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Pozicijos X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Pozicijos Y"
@ -25324,57 +25324,57 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Klaida įkeliant projekto pėdsakų bibliotekos lentelę"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Apskritimo savybės"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Lanko savybės"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Daugiakampio ypatybės"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Stačiakampio ypatybės"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Atkarpos savybęs"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Keisti piešimo ypatybes"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "Lanko kampas negali būti lygus nuliui."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr "Толщина элемента должна быть больше нуля."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr "Spindulys turi būti didesnis už 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Stačiakampis negali būti tuščias."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
#, fuzzy
msgid "The polygon outline thickness must be >= 0."
msgstr "Толщина элемента должна быть больше нуля."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Klaidų sąrašas"
@ -27594,17 +27594,17 @@ msgid "Via type:"
msgstr "Perėjimo tipas:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Ištisinis perėjimas"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Mikro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Aklas / palaidotas"
@ -29080,216 +29080,6 @@ msgstr "KDR taisyklės:"
msgid "Check rule syntax"
msgstr "Patikrinkite taisyklės sintaksę"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Numatytosios naujų matmenų objektų ypatybės:"
@ -29913,13 +29703,13 @@ msgstr "Tikrinama zonos užpildymas ..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29929,7 +29719,7 @@ msgstr "Tikrinama zonos užpildymas ..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s leidimas %s; faktinis %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(tinklai %s ir %s)"
@ -31689,7 +31479,7 @@ msgstr "Radiatorius"
msgid "Castellated"
msgstr "Castellated"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Diametras"
@ -32038,7 +31828,7 @@ msgstr "Paslėptas perėjimas"
msgid "Through Via"
msgstr "Ištisinis perėjimas"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Grąžtas"
@ -32061,23 +31851,23 @@ msgstr "Takelis %s %s, ilgis %s"
msgid "Track %s on %s, length %s"
msgstr "Takelis %s %s, ilgis %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Kilmė X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Kilmė Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Sluoksnio viršus"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Sluoksnio apačia"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "„Via Type“"
@ -34661,24 +34451,24 @@ msgstr "Pasukti"
msgid "Change Side / Flip"
msgstr "Ppakeisti perėjimo ir grąžto dydį"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Perkelti tiksliai"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "Kopijuojami %d elementai"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Pasirinkite kopijos atskaitos tašką ..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Pasirinkimas nukopijuotas"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Kopija atšaukta"
@ -36958,39 +36748,39 @@ msgstr "Slėpti visas kitas tinklo klases"
msgid "Presets (Ctrl+Tab):"
msgstr "(„Ctrl“ + tabuliavimo klavišas)"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Išsaugoti iš anksto nustatytą ..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Ištrinti iš anksto nustatytą ..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Iš anksto nustatytas sluoksnio pavadinimas:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Išsaugoti sluoksnio išankstinį nustatymą"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Parinktys"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Ištrinti iš anksto nustatytą"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Pasirinkite išankstinį nustatymą:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Atidarykite „Preferences“"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -4,7 +4,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad 6.0\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2021-01-13 14:21+0000\n"
"Last-Translator: Rihards Skuja <rhssk@posteo.eu>\n"
"Language-Team: Latvian <https://hosted.weblate.org/projects/kicad/master-"
@ -4137,7 +4137,7 @@ msgid "Shape"
msgstr ""
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr ""
@ -4171,8 +4171,8 @@ msgstr ""
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr ""
@ -4220,13 +4220,13 @@ msgstr ""
msgid "Start Y"
msgstr ""
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr ""
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr ""
@ -4312,7 +4312,7 @@ msgstr ""
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4576,7 +4576,7 @@ msgstr ""
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr ""
@ -4604,7 +4604,7 @@ msgstr ""
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr ""
@ -5181,8 +5181,8 @@ msgid "Invalid size %lld: too large"
msgstr ""
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr ""
@ -16014,7 +16014,7 @@ msgstr ""
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -19834,13 +19834,13 @@ msgstr ""
msgid "no layers"
msgstr ""
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr ""
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr ""
@ -23445,55 +23445,55 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr ""
@ -25542,17 +25542,17 @@ msgid "Via type:"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr ""
@ -26931,216 +26931,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr ""
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr ""
@ -27735,13 +27525,13 @@ msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -27751,7 +27541,7 @@ msgstr ""
msgid "(%s clearance %s; actual %s)"
msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr ""
@ -29390,7 +29180,7 @@ msgstr ""
msgid "Castellated"
msgstr ""
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr ""
@ -29723,7 +29513,7 @@ msgstr ""
msgid "Through Via"
msgstr ""
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr ""
@ -29746,23 +29536,23 @@ msgstr ""
msgid "Track %s on %s, length %s"
msgstr ""
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr ""
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr ""
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr ""
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr ""
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr ""
@ -32063,24 +31853,24 @@ msgstr ""
msgid "Change Side / Flip"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
msgid "Copy canceled"
msgstr ""
@ -34269,39 +34059,39 @@ msgstr ""
msgid "Presets (Ctrl+Tab):"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-04-13 14:13+0000\n"
"Last-Translator: Bas Wijnen <wijnen@debian.org>\n"
"Language-Team: Dutch <https://hosted.weblate.org/projects/kicad/v6/nl/>\n"
@ -4237,7 +4237,7 @@ msgid "Shape"
msgstr "Vorm"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Straal"
@ -4271,8 +4271,8 @@ msgstr "Punten"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Breedte"
@ -4320,13 +4320,13 @@ msgstr "Start X"
msgid "Start Y"
msgstr "Start Y"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Einde X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Einde Y"
@ -4412,7 +4412,7 @@ msgstr "Links"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4697,7 +4697,7 @@ msgstr "Kan bestand '%s' niet kopiëren."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Knip"
@ -4726,7 +4726,7 @@ msgstr "Plak klembordcellen in de matrix in de huidige cel"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Verwijderen"
@ -5307,8 +5307,8 @@ msgid "Invalid size %lld: too large"
msgstr "Ongeldige maat %lld: te groot"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Ongeldige boog met straal %f en hoek %f"
@ -17023,7 +17023,7 @@ msgstr "Selecteer laag: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21036,13 +21036,13 @@ msgstr "en anderen"
msgid "no layers"
msgstr "geen lagen"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Positie X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Positie Y"
@ -24890,57 +24890,57 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Fout bij het laden van de footprint-bibliotheek-tabel."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Circle Eigenschappen"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Arc-eigenschappen"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Polygoon-eigenschappen"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Rechthoekige eigenschappen"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Eigenschappen lijnsegment"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Wijzig tekeningeigenschappen"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "De booghoek mag niet nul zijn."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr "Traceerafstand moet groter zijn dan 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr "Traceerafstand moet groter zijn dan 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "De rechthoek mag niet leeg zijn."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Foutenlijst"
@ -27147,17 +27147,17 @@ msgid "Via type:"
msgstr "Via type:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Door"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Micro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Blind / begraven"
@ -28655,216 +28655,6 @@ msgstr "DRC-regels:"
msgid "Check rule syntax"
msgstr "Controleer de syntaxis van de regel"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Standaardeigenschappen voor nieuwe dimensieobjecten:"
@ -29472,13 +29262,13 @@ msgstr "Zones controleren ..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29488,7 +29278,7 @@ msgstr "Zones controleren ..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s vrije afstand %s; werkelijk %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(netten %s en %s)"
@ -31205,7 +30995,7 @@ msgstr "Koellichaam"
msgid "Castellated"
msgstr "Gekanteeld"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Diameter"
@ -31545,7 +31335,7 @@ msgstr "Blind/Onzichtbare Via"
msgid "Through Via"
msgstr "Through Via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Boor"
@ -31568,23 +31358,23 @@ msgstr "Spoor (boog) %s op %s, lengte %s"
msgid "Track %s on %s, length %s"
msgstr "Spoor %s op %s, lengte %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Nulpunt X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Nulpunt Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Laag boven"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Laag onder"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Via Type"
@ -34125,24 +33915,24 @@ msgstr "Roteren"
msgid "Change Side / Flip"
msgstr "Omdraaien"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Verplaats exact"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "%d artikel(en) gedupliceerd"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Selecteer referentiepunt voor de kopie ..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Selectie gekopieerd"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
msgid "Copy canceled"
msgstr "Kopiëren geannuleerd"
@ -36370,39 +36160,39 @@ msgstr "Verberg alle andere net-klassen"
msgid "Presets (Ctrl+Tab):"
msgstr "Voorvoegsel (Ctrl+Tab):"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Instelling opslaan ..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Instelling verwijderen ..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Layer preset naam:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Layer Preset opslaan"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Instellingen"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Instelling verwijderen"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Selecteer preset:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Open Voorkeuren"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -5,7 +5,7 @@ msgid ""
msgstr ""
"Project-Id-Version: 5.99\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-06-27 00:52+0000\n"
"Last-Translator: Allan Nordhøy <epost@anotheragency.no>\n"
"Language-Team: Norwegian Bokmål <https://hosted.weblate.org/projects/kicad/"
@ -4326,7 +4326,7 @@ msgid "Shape"
msgstr "Form"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Radius"
@ -4360,8 +4360,8 @@ msgstr "Punkter"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Bredde"
@ -4413,13 +4413,13 @@ msgstr "Start laget"
msgid "Start Y"
msgstr "Start laget"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Slutt X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Avslutt Y"
@ -4505,7 +4505,7 @@ msgstr "Venstre"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4797,7 +4797,7 @@ msgstr "Kan ikke kopiere filen \"%s\"."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Klipp ut"
@ -4825,7 +4825,7 @@ msgstr "Lim ut utklippstavlecellene til matrise ved gjeldende celle"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Slett"
@ -5453,8 +5453,8 @@ msgid "Invalid size %lld: too large"
msgstr "Ugyldig størrelse %ll d: for stor"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Ugyldig lysbue med radius %f og vinkel %f"
@ -17301,7 +17301,7 @@ msgstr "Velg lag: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21454,13 +21454,13 @@ msgstr "og andre"
msgid "no layers"
msgstr "ingen lag"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Posisjon X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Posisjon Y"
@ -25333,57 +25333,57 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Feil ved innlasting av prosjektets fotavtrykk-bibliotektabell"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Sirkelegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Arc Properties"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Egenskaper for mangekant"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Rektangelegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Linjesegmentegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Endre tegneegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "Buevinkelen kan ikke være null."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr "Sporgapet må være større enn 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr "Sporgapet må være større enn 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Rektangelet kan ikke være tomt."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Feilliste"
@ -27593,17 +27593,17 @@ msgid "Via type:"
msgstr "Via-type:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Gjennom"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Mikro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Blind / begravd"
@ -29079,216 +29079,6 @@ msgstr "DRC-regler:"
msgid "Check rule syntax"
msgstr "Kontroller regelsyntaks"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Standardegenskaper for nye dimensjonsobjekter:"
@ -29917,13 +29707,13 @@ msgstr "Kontrollerer sonefyllinger ..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29933,7 +29723,7 @@ msgstr "Kontrollerer sonefyllinger ..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s klaring %s; faktisk %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(garn %s og %s)"
@ -31684,7 +31474,7 @@ msgstr "Kjøleribbe"
msgid "Castellated"
msgstr "Kastellert"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Diameter"
@ -32033,7 +31823,7 @@ msgstr "Blind / Begravet Via"
msgid "Through Via"
msgstr "Gjennom Via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Bore"
@ -32056,23 +31846,23 @@ msgstr "Spor %s på %s, lengde %s"
msgid "Track %s on %s, length %s"
msgstr "Spor %s på %s, lengde %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Opprinnelse X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Opprinnelse Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Layer Top"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Lagbunn"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Via-type"
@ -34651,24 +34441,24 @@ msgstr "Roter"
msgid "Change Side / Flip"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Gå nøyaktig"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "Duplisert %d vare (r)"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Velg referansepunkt for kopien ..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Valget ble kopiert"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Kopien avbrutt"
@ -36941,40 +36731,40 @@ msgstr "Skjul alle andre nettklasser"
msgid "Presets (Ctrl+Tab):"
msgstr "(Ctrl+Tab)"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Lagre forhåndsinnstilling ..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Slett forhåndsinnstilling ..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Lagets forhåndsinnstilte navn:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Lagre laginnstilling"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Forhåndsinnstillinger"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Slett forhåndsinnstilling"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Velg forhåndsinnstilling:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
#, fuzzy
msgid "Open Preferences"
msgstr "&Innstillinger"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

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@ -5,7 +5,7 @@ msgid ""
msgstr ""
"Project-Id-Version: kicad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-07-07 12:47+0000\n"
"Last-Translator: Marcel Hecko <maco@blava.net>\n"
"Language-Team: Slovak <https://hosted.weblate.org/projects/kicad/v6/sk/>\n"
@ -4297,7 +4297,7 @@ msgid "Shape"
msgstr "Tvar"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Polomer"
@ -4331,8 +4331,8 @@ msgstr "Body"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Šírka"
@ -4383,13 +4383,13 @@ msgstr "Spustiť DRC"
msgid "Start Y"
msgstr "Spustiť DRC"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Koniec X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Koniec Y"
@ -4475,7 +4475,7 @@ msgstr "Vľavo"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4768,7 +4768,7 @@ msgstr "Nemožno kopírovať súbor \"%s\"."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Vystrihnúť"
@ -4796,7 +4796,7 @@ msgstr "Prilepte bunky schránky do matice v aktuálnej bunke"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Odstrániť"
@ -5390,8 +5390,8 @@ msgid "Invalid size %lld: too large"
msgstr "Neplatná veľkosť %ll d: príliš veľká"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Neplatný oblúk s polomerom %f a uhlom %f"
@ -17215,7 +17215,7 @@ msgstr "Vyberte vrstvu: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21353,13 +21353,13 @@ msgstr "a ďalšie"
msgid "no layers"
msgstr "žiadne vrstvy"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Pozícia X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Pozícia Y"
@ -25231,58 +25231,58 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Chyba načítania tabuľky z knižnice púzdier projektu"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Vlastnosti kruhu"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Vlastnosti oblúka"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Vlastnosti mnohouholníkov"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Vlastnosti obdĺžnika"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Vlastnosti segmentu čiary"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Upravte vlastnosti výkresu"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "Uhol oblúka nemôže byť nulový."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr " Uout musí byť väčšie ako Uref"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr " Uout musí byť väčšie ako Uref"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Obdĺžnik nemôže byť prázdny."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
#, fuzzy
msgid "The polygon outline thickness must be >= 0."
msgstr " Uout musí byť väčšie ako Uref"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Zoznam chýb"
@ -27498,17 +27498,17 @@ msgid "Via type:"
msgstr "Typom:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Skrz"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Micro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Slepý / pochovaný"
@ -28982,216 +28982,6 @@ msgstr "Pravidlá KDR:"
msgid "Check rule syntax"
msgstr "Skontrolujte syntax pravidla"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Predvolené vlastnosti pre nové objekty dimenzie:"
@ -29819,13 +29609,13 @@ msgstr "Kontroluje sa plnenie zón ..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29835,7 +29625,7 @@ msgstr "Kontroluje sa plnenie zón ..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s klírens %s; skutočný %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(siete %s a %s)"
@ -31587,7 +31377,7 @@ msgstr "Chladič"
msgid "Castellated"
msgstr "Castellated"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Priemer"
@ -31935,7 +31725,7 @@ msgstr "Slepá/vnorená prechodka"
msgid "Through Via"
msgstr "Cez Via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Vŕtačka"
@ -31958,23 +31748,23 @@ msgstr "Trať %s dňa %s, dĺžka %s"
msgid "Track %s on %s, length %s"
msgstr "Trať %s dňa %s, dĺžka %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Pôvod X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Pôvod Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Vrchná vrstva"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Dno vrstvy"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Cez Type"
@ -34536,24 +34326,24 @@ msgstr "Otočiť"
msgid "Change Side / Flip"
msgstr "Zmeniť veľkosť via a vŕtanie"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Posunúť presne"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "Duplikované %d položky"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Vyberte referenčný bod pre kópiu ..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Výber bol skopírovaný"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Kópia bola zrušená"
@ -36833,39 +36623,39 @@ msgstr "Skryť všetky ostatné netclassy"
msgid "Presets (Ctrl+Tab):"
msgstr "(Ctrl + Tab)"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Uložiť predvoľbu ..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Odstrániť predvoľbu ..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Názov predvoľby vrstvy:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Uložiť predvoľbu vrstvy"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Predvoľby"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Odstrániť predvoľbu"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Vyberte predvoľbu:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Otvoriť Nastavenia"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -4,7 +4,7 @@ msgid ""
msgstr ""
"Project-Id-Version: kicad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-08-28 17:17+0000\n"
"Last-Translator: Vitan Košpenda <kospendavitan@gmail.com>\n"
"Language-Team: Slovenian <https://hosted.weblate.org/projects/kicad/v6/sl/>\n"
@ -4884,7 +4884,7 @@ msgid "Shape"
msgstr "Oblika"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
#, fuzzy
msgid "Radius"
@ -4923,8 +4923,8 @@ msgstr "Točke"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
#, fuzzy
msgid "Width"
msgstr "Širina"
@ -4980,14 +4980,14 @@ msgstr "Začni sloj"
msgid "Start Y"
msgstr "Začni sloj"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
#, fuzzy
msgid "End X"
msgstr "Konec X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#, fuzzy
msgid "End Y"
msgstr "Konec Y"
@ -5080,7 +5080,7 @@ msgstr "Levo"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
#, fuzzy
@ -5397,7 +5397,7 @@ msgstr "Datoteke \"%s\" ni mogoče kopirati."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
#, fuzzy
msgid "Cut"
msgstr "Izreži"
@ -5431,7 +5431,7 @@ msgstr "Celice odložišča prilepite v matrico v trenutni celici"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
#, fuzzy
msgid "Delete"
msgstr "Briši"
@ -6107,8 +6107,8 @@ msgid "Invalid size %lld: too large"
msgstr "Neveljavna velikost %ll d: prevelika"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, fuzzy, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Neveljaven lok s polmerom %f in kotom %f"
@ -19458,7 +19458,7 @@ msgstr "Izberite sloj: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -24099,14 +24099,14 @@ msgstr "in drugi"
msgid "no layers"
msgstr "brez plasti"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
#, fuzzy
msgid "Position X"
msgstr "Položaj X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
#, fuzzy
msgid "Position Y"
msgstr "Položaj Y"
@ -28602,63 +28602,63 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Napaka pri nalaganju tabele knjižnice odtisa projekta"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
#, fuzzy
msgid "Circle Properties"
msgstr "Lastnosti kroga"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
#, fuzzy
msgid "Arc Properties"
msgstr "Lastnosti obloka"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
#, fuzzy
msgid "Polygon Properties"
msgstr "Lastnosti mnogokotnika"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
#, fuzzy
msgid "Rectangle Properties"
msgstr "Lastnosti pravokotnika"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
#, fuzzy
msgid "Line Segment Properties"
msgstr "Lastnosti odseka vrstic"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
#, fuzzy
msgid "Modify drawing properties"
msgstr "Spreminjanje lastnosti risbe"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "Kot loka ne sme biti enak nič."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
#, fuzzy
msgid "The item thickness must be greater than zero."
msgstr "Vrzel v sledovih mora biti večja od 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr "Vrzel v sledovih mora biti večja od 0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Pravokotnik ne sme biti prazen."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
#, fuzzy
msgid "Error List"
msgstr "Seznam napak"
@ -31250,19 +31250,19 @@ msgid "Via type:"
msgstr "Tip skoznika:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
#, fuzzy
msgid "Through"
msgstr "Skozi"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
#, fuzzy
msgid "Micro"
msgstr "Mikro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
#, fuzzy
msgid "Blind/buried"
msgstr "Slep / pokopan"
@ -32929,216 +32929,6 @@ msgstr "Pravila DRK:"
msgid "Check rule syntax"
msgstr "Preverite skladnjo pravila"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
#, fuzzy
msgid "Default properties for new dimension objects:"
@ -33842,13 +33632,13 @@ msgstr "Preverjanje zapolnitve območja ..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -33858,7 +33648,7 @@ msgstr "Preverjanje zapolnitve območja ..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s zračnost %s; dejanska %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, fuzzy, c-format
msgid "(nets %s and %s)"
msgstr "(mreže %s in %s)"
@ -35787,7 +35577,7 @@ msgstr "Hladilnik"
msgid "Castellated"
msgstr "Kastelasti"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
#, fuzzy
msgid "Diameter"
msgstr "Premer"
@ -36180,7 +35970,7 @@ msgstr "Slepa / zakopana Via"
msgid "Through Via"
msgstr "Skozi Via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Vrtanje"
@ -36204,27 +35994,27 @@ msgstr "Skladba %s na %s, dolžina %s"
msgid "Track %s on %s, length %s"
msgstr "Skladba %s na %s, dolžina %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
#, fuzzy
msgid "Origin X"
msgstr "Izvor X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
#, fuzzy
msgid "Origin Y"
msgstr "Izvor Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
#, fuzzy
msgid "Layer Top"
msgstr "Vrh sloja"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
#, fuzzy
msgid "Layer Bottom"
msgstr "Dno sloja"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
#, fuzzy
msgid "Via Type"
msgstr "Preko tipa"
@ -38955,27 +38745,27 @@ msgstr "Zavrti"
msgid "Change Side / Flip"
msgstr "Zamenjaj vrtalnik"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
#, fuzzy
msgid "Move exact"
msgstr "Premakni se natančno"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, fuzzy, c-format
msgid "Duplicated %d item(s)"
msgstr "Podvojene postavke %d"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
#, fuzzy
msgid "Select reference point for the copy..."
msgstr "Izberite referenčno točko za kopijo ..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
#, fuzzy
msgid "Selection copied"
msgstr "Izbor je kopiran"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Kopija preklicana"
@ -41676,47 +41466,47 @@ msgstr "Skrij vse ostale mrežne razrede"
msgid "Presets (Ctrl+Tab):"
msgstr "(Ctrl + Tab)"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
#, fuzzy
msgid "Save preset..."
msgstr "Shrani prednastavitev ..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
#, fuzzy
msgid "Delete preset..."
msgstr "Izbriši prednastavljeno ..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Layer preset name:"
msgstr "Ime prednastavljene plasti:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Save Layer Preset"
msgstr "Shrani prednastavitev sloja"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
#, fuzzy
msgid "Presets"
msgstr "Prednastavljeni"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
#, fuzzy
msgid "Delete Preset"
msgstr "Izbriši prednastavitev"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
#, fuzzy
msgid "Select preset:"
msgstr "Izberite prednastavitev:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
#, fuzzy
msgid "Open Preferences"
msgstr "Odprite nastavitve"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
#, fuzzy
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "

View File

@ -3,7 +3,7 @@ msgid ""
msgstr ""
"Project-Id-Version: KiCad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-09-05 11:13+0000\n"
"Last-Translator: Zoran <zastos@gmail.com>\n"
"Language-Team: Serbian <https://hosted.weblate.org/projects/kicad/v6/sr/>\n"
@ -4298,7 +4298,7 @@ msgid "Shape"
msgstr "Облик"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Полупречник"
@ -4332,8 +4332,8 @@ msgstr ""
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Дужина"
@ -4384,14 +4384,14 @@ msgstr "X:"
msgid "Start Y"
msgstr "Y:"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
#, fuzzy
msgid "End X"
msgstr "Крај X:"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#, fuzzy
msgid "End Y"
msgstr "Крај Y:"
@ -4478,7 +4478,7 @@ msgstr "Лијево"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4751,7 +4751,7 @@ msgstr "Немогуће копирати датотеку \"%s\"."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Исјеци"
@ -4779,7 +4779,7 @@ msgstr ""
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Избриши"
@ -5401,8 +5401,8 @@ msgid "Invalid size %lld: too large"
msgstr ""
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr ""
@ -16988,7 +16988,7 @@ msgstr "Изабери слој: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -21102,14 +21102,14 @@ msgstr " и остали"
msgid "no layers"
msgstr ""
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
#, fuzzy
msgid "Position X"
msgstr "X позиција:"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
#, fuzzy
msgid "Position Y"
msgstr "Y позиција:"
@ -24965,60 +24965,60 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Грешка: "
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Својства круга"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Својства лука"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Својства полигона"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
#, fuzzy
msgid "Rectangle Properties"
msgstr "Својства круга"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
#, fuzzy
msgid "Line Segment Properties"
msgstr "Стил линије"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
#, fuzzy
msgid "Modify drawing properties"
msgstr "Опције цртања"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#, fuzzy
msgid "The radius must be greater than zero."
msgstr "Попуњавање зона"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#, fuzzy
msgid "The rectangle cannot be empty."
msgstr "Попуњавање зона"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Листа грешака"
@ -27184,17 +27184,17 @@ msgid "Via type:"
msgstr "Тип:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Кроз"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr ""
@ -28639,216 +28639,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr ""
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr ""
@ -29489,13 +29279,13 @@ msgstr "Попуњавање зона"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29505,7 +29295,7 @@ msgstr "Попуњавање зона"
msgid "(%s clearance %s; actual %s)"
msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, fuzzy, c-format
msgid "(nets %s and %s)"
msgstr " у јединицама%c и %c"
@ -31239,7 +31029,7 @@ msgstr ""
msgid "Castellated"
msgstr ""
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr ""
@ -31603,7 +31393,7 @@ msgstr ""
msgid "Through Via"
msgstr ""
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr ""
@ -31626,26 +31416,26 @@ msgstr "Попуњавање зона"
msgid "Track %s on %s, length %s"
msgstr "Попуњавање зона"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
#, fuzzy
msgid "Origin X"
msgstr "Почетак:"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
#, fuzzy
msgid "Origin Y"
msgstr "Почетак:"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
#, fuzzy
msgid "Layer Top"
msgstr "Слој"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr ""
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
#, fuzzy
msgid "Via Type"
msgstr "Тип:"
@ -34022,26 +33812,26 @@ msgstr "Окрени"
msgid "Change Side / Flip"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
#, fuzzy
msgid "Move exact"
msgstr "Помјери"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
#, fuzzy
msgid "Selection copied"
msgstr "Појасни избор"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Копирање прекинуто."
@ -36445,46 +36235,46 @@ msgstr "Сакриј све слојеве бакра"
msgid "Presets (Ctrl+Tab):"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
#, fuzzy
msgid "Save preset..."
msgstr "Сачувај &Као..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
#, fuzzy
msgid "Delete preset..."
msgstr "Избриши мрежу"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Layer preset name:"
msgstr "Избор слоја:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
#, fuzzy
msgid "Save Layer Preset"
msgstr "Изабери језик"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
#, fuzzy
msgid "Delete Preset"
msgstr "Избриши мрежу"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
#, fuzzy
msgid "Select preset:"
msgstr "Изабери"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
#, fuzzy
msgid "Open Preferences"
msgstr "&Преференце"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -7,7 +7,7 @@ msgid ""
msgstr ""
"Project-Id-Version: \n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-10-06 09:15+0000\n"
"Last-Translator: Henrik Kauhanen <henrik@kauhanen.se>\n"
"Language-Team: Swedish <https://hosted.weblate.org/projects/kicad/v6/sv/>\n"
@ -4213,7 +4213,7 @@ msgid "Shape"
msgstr "Form"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Radie"
@ -4247,8 +4247,8 @@ msgstr "Punkter"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Bredd"
@ -4296,13 +4296,13 @@ msgstr "Start X"
msgid "Start Y"
msgstr "Start Y"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Avsluta X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Avsluta Y"
@ -4388,7 +4388,7 @@ msgstr "Vänster"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4673,7 +4673,7 @@ msgstr "Kan inte kopiera filen '%s'."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Klipp ut"
@ -4701,7 +4701,7 @@ msgstr "Klistra in urklippsceller i matris vid aktuell cell"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Radera"
@ -5281,8 +5281,8 @@ msgid "Invalid size %lld: too large"
msgstr "Ogiltig storlek %lld: för stor"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Ogiltig båge med radie %f och vinkel %f"
@ -16921,7 +16921,7 @@ msgstr "Välj lager: %s"
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -20917,13 +20917,13 @@ msgstr "och andra"
msgid "no layers"
msgstr "inga lager"
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr "Position X"
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr "Position Y"
@ -24744,55 +24744,55 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Fel vid inläsning av fotavtrycksbibliotekstabell."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr "Cirkelegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr "Båg-egenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr "Polygonegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr "Rektangelegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr "Egenskaper för linjesegment"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr "Ändra ritningsegenskaper"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr "Bågvinkeln kan inte vara noll."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr "Objektets tjocklek måste vara större än noll."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr "Radien måste vara större än noll."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr "Rektangeln kan inte vara tom."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr "Polygonens konturtjocklek måste vara >=0."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr "Fellista"
@ -26970,17 +26970,17 @@ msgid "Via type:"
msgstr "Via typ:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "Genom"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Mikro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Blind / begravd"
@ -28459,216 +28459,6 @@ msgstr "DRC-regler:"
msgid "Check rule syntax"
msgstr "Kontrollera regelsyntax"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr "Standardegenskaper för nya måttsättningsobjekt:"
@ -29269,13 +29059,13 @@ msgstr "Kontrollerar zoner..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -29285,7 +29075,7 @@ msgstr "Kontrollerar zoner..."
msgid "(%s clearance %s; actual %s)"
msgstr "(%s clearance %s; faktisk %s)"
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr "(nät %s och %s)"
@ -30996,7 +30786,7 @@ msgstr "Kylfläns"
msgid "Castellated"
msgstr "Krenelerad"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Diameter"
@ -31334,7 +31124,7 @@ msgstr "Blind / begravd via"
msgid "Through Via"
msgstr "Genom Via"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Borra"
@ -31357,23 +31147,23 @@ msgstr "Ledare (båge) %s på %s, längd %s"
msgid "Track %s on %s, length %s"
msgstr "Ledare %s på %s, längd %s"
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr "Origo X"
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr "Origo Y"
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr "Övre lager"
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr "Undre lager"
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr "Via typ"
@ -33881,24 +33671,24 @@ msgstr "Rotera"
msgid "Change Side / Flip"
msgstr "Byt sida / vänd"
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr "Flytta exakt"
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr "Duplicerade %d objekt"
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr "Välj referenspunkt för kopian ..."
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr "Urvalet kopierades"
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
msgid "Copy canceled"
msgstr "Kopiering avbröts"
@ -36107,39 +35897,39 @@ msgstr "Dölj alla andra nätklasser"
msgid "Presets (Ctrl+Tab):"
msgstr "Förinställningar (Ctrl + Tab):"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr "Spara förinställning ..."
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr "Ta bort förinställning ..."
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr "Lagrets förinställda namn:"
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr "Spara lagringsförinställning"
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "Förinställningar"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr "Ta bort förinställning"
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr "Välj förinställning:"
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Öppna inställningar"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

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@ -10,7 +10,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-07-04 20:18+0000\n"
"Last-Translator: Mustafa Selçuk ÇAVDAR <mselcuk@gmail.com>\n"
"Language-Team: Turkish <https://hosted.weblate.org/projects/kicad/v6/tr/>\n"
@ -4199,7 +4199,7 @@ msgid "Shape"
msgstr "Şekil"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Yarıçap"
@ -4233,8 +4233,8 @@ msgstr "Noktalar"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
msgid "Width"
msgstr "Genişlik"
@ -4282,13 +4282,13 @@ msgstr "X'i Başlat"
msgid "Start Y"
msgstr "Y'yi başlat"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "X'i sonlandır"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Y'yi bitir"
@ -4374,7 +4374,7 @@ msgstr "Sol"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4659,7 +4659,7 @@ msgstr "'%s' dosyası kopyalanamıyor."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Kes"
@ -4687,7 +4687,7 @@ msgstr "Pano hücrelerini geçerli hücredeki matrise yapıştırın"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Sil"
@ -5266,8 +5266,8 @@ msgid "Invalid size %lld: too large"
msgstr "Geçersiz boyut %lld: çok büyük"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "%f Yarıçaplı geçersiz Yay ve %f açı"
@ -16375,7 +16375,7 @@ msgstr ""
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -20178,13 +20178,13 @@ msgstr "ve diğerleri"
msgid "no layers"
msgstr ""
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr ""
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr ""
@ -23784,55 +23784,55 @@ msgstr ""
msgid "Error loading footprint library table."
msgstr "Ayak izi kitaplığı tablosu yüklenirken hata oluştu."
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr ""
@ -25877,17 +25877,17 @@ msgid "Via type:"
msgstr "Geçiş türü:"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr "İçinden"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr "Mikro"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr "Kör/gömülü"
@ -27265,216 +27265,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr ""
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr ""
@ -28073,13 +27863,13 @@ msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -28089,7 +27879,7 @@ msgstr ""
msgid "(%s clearance %s; actual %s)"
msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr ""
@ -29733,7 +29523,7 @@ msgstr ""
msgid "Castellated"
msgstr "Sıralanmış"
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr "Çap"
@ -30067,7 +29857,7 @@ msgstr ""
msgid "Through Via"
msgstr "Tam Geçiş(via)"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr "Matkap"
@ -30090,23 +29880,23 @@ msgstr ""
msgid "Track %s on %s, length %s"
msgstr ""
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr ""
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr ""
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr ""
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr ""
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr ""
@ -32392,24 +32182,24 @@ msgstr "Döndür"
msgid "Change Side / Flip"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
msgid "Copy canceled"
msgstr "Kopya iptal edildi"
@ -34590,39 +34380,39 @@ msgstr "Diğer Tüm Netclass'ları Gizle"
msgid "Presets (Ctrl+Tab):"
msgstr "Hazır Ayarlar (Ctrl+Tab):"
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr "ön ayarlar"
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr "Tercihleri Aç"
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

View File

@ -4,7 +4,7 @@ msgid ""
msgstr ""
"Project-Id-Version: Kicad\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2022-09-29 19:10-0700\n"
"POT-Creation-Date: 2022-10-07 11:37-0700\n"
"PO-Revision-Date: 2022-09-07 20:50+0000\n"
"Last-Translator: lê văn lập <levanlap2502@gmail.com>\n"
"Language-Team: Vietnamese <https://hosted.weblate.org/projects/kicad/v6/vi/"
@ -4449,7 +4449,7 @@ msgid "Shape"
msgstr "Hình dạng"
#: common/eda_shape.cpp:574 common/eda_shape.cpp:584
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:181
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:173
#: pcbnew/pcb_track.cpp:686
msgid "Radius"
msgstr "Bán kính"
@ -4483,8 +4483,8 @@ msgstr "Điểm"
#: pcbnew/dialogs/panel_setup_tracks_and_vias_base.cpp:155
#: pcbnew/fp_text.cpp:305 pcbnew/fp_text_grid_table.cpp:105 pcbnew/pad.cpp:1008
#: pcbnew/pcb_target.cpp:158 pcbnew/pcb_target.cpp:204 pcbnew/pcb_text.cpp:127
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1132 pcbnew/pcb_track.cpp:1149
#: pcbnew/pcb_track.cpp:1168
#: pcbnew/pcb_track.cpp:681 pcbnew/pcb_track.cpp:1127 pcbnew/pcb_track.cpp:1144
#: pcbnew/pcb_track.cpp:1163
#, fuzzy
msgid "Width"
msgstr "Chiều rộng"
@ -4536,13 +4536,13 @@ msgstr "Bắt đầu X"
msgid "Start Y"
msgstr "Bắt đầu Y"
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1140
#: pcbnew/pcb_track.cpp:1157
#: common/eda_shape.cpp:1652 pcbnew/pcb_shape.cpp:264 pcbnew/pcb_track.cpp:1135
#: pcbnew/pcb_track.cpp:1152
msgid "End X"
msgstr "Kết thúc X"
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1142
#: pcbnew/pcb_track.cpp:1159
#: common/eda_shape.cpp:1654 pcbnew/pcb_shape.cpp:266 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
msgid "End Y"
msgstr "Kết thúc Y"
@ -4632,7 +4632,7 @@ msgstr "Trái"
#: pagelayout_editor/dialogs/properties_frame_base.cpp:89
#: pagelayout_editor/dialogs/properties_frame_base.cpp:105
#: pcbnew/dialogs/dialog_dimension_properties_base.cpp:315
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:179
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:171
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:117
#: pcbnew/dialogs/dialog_text_properties_base.cpp:145
msgid "Center"
@ -4951,7 +4951,7 @@ msgstr "Không thể sao chép tệp \"%s\"."
#: common/grid_tricks.cpp:278 common/tool/actions.cpp:153
#: eeschema/tools/ee_actions.cpp:148 pcbnew/dialogs/panel_setup_rules.cpp:112
#: pcbnew/tools/edit_tool.cpp:2011
#: pcbnew/tools/edit_tool.cpp:2016
msgid "Cut"
msgstr "Cắt"
@ -4984,7 +4984,7 @@ msgstr "Dán các ô bảng tạm vào ma trận tại ô hiện tại"
#: common/grid_tricks.cpp:284 common/tool/actions.cpp:191
#: kicad/project_tree_pane.cpp:771 pcbnew/dialogs/panel_setup_rules.cpp:115
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2013
#: pcbnew/plugins/kicad/pcb_parser.cpp:857 pcbnew/tools/edit_tool.cpp:2018
msgid "Delete"
msgstr "Xóa bỏ"
@ -5634,8 +5634,8 @@ msgid "Invalid size %lld: too large"
msgstr "Kích thước không hợp lệ %lld: quá lớn"
#: common/plugins/eagle/eagle_parser.cpp:281
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:373
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:389
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:366
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:382
#, c-format
msgid "Invalid Arc with radius %f and angle %f"
msgstr "Arc không hợp lệ với bán kính %f và góc %f"
@ -17052,7 +17052,7 @@ msgstr ""
#: pcbnew/fp_text_grid_table.cpp:109 pcbnew/pad.cpp:980
#: pcbnew/pcb_dimension.cpp:353 pcbnew/pcb_dimension.cpp:1087
#: pcbnew/pcb_shape.cpp:159 pcbnew/pcb_target.cpp:155 pcbnew/pcb_text.cpp:120
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1173
#: pcbnew/pcb_track.cpp:679 pcbnew/pcb_track.cpp:738 pcbnew/pcb_track.cpp:1168
#: pcbnew/tools/board_inspection_tool.cpp:238
#: pcbnew/tools/board_inspection_tool.cpp:385
#: pcbnew/tools/board_inspection_tool.cpp:461
@ -20957,13 +20957,13 @@ msgstr ""
msgid "no layers"
msgstr ""
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1134
#: pcbnew/pcb_track.cpp:1151
#: pcbnew/board_item.cpp:232 pcbnew/pcb_track.cpp:1129
#: pcbnew/pcb_track.cpp:1146
msgid "Position X"
msgstr ""
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1137
#: pcbnew/pcb_track.cpp:1154
#: pcbnew/board_item.cpp:234 pcbnew/pcb_track.cpp:1132
#: pcbnew/pcb_track.cpp:1149
msgid "Position Y"
msgstr ""
@ -24597,55 +24597,55 @@ msgstr "Không thể tạo đường dẫn bảng thư viện chung \"%s\"."
msgid "Error loading footprint library table."
msgstr "Lỗi tải bảng thư viện footprint trong dự án"
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:178
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:170
msgid "Circle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:191
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:183
msgid "Arc Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:197
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:189
msgid "Polygon Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:203
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:195
msgid "Rectangle Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:209
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:201
msgid "Line Segment Properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:343
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:336
msgid "Modify drawing properties"
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:368
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:361
msgid "The arc angle cannot be zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:415
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:427
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:433
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:388
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:398
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:408
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:420
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:426
msgid "The item thickness must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:402
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:395
msgid "The radius must be greater than zero."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:412
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:405
msgid "The rectangle cannot be empty."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:421
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:414
msgid "The polygon outline thickness must be >= 0."
msgstr ""
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:444
#: pcbnew/dialogs/dialog_graphic_item_properties.cpp:437
msgid "Error List"
msgstr ""
@ -26709,17 +26709,17 @@ msgid "Via type:"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1112
#: pcbnew/pcb_track.cpp:1107
msgid "Through"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1114
#: pcbnew/pcb_track.cpp:1109
msgid "Micro"
msgstr ""
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:255
#: pcbnew/pcb_track.cpp:1113
#: pcbnew/pcb_track.cpp:1108
msgid "Blind/buried"
msgstr ""
@ -28113,216 +28113,6 @@ msgstr ""
msgid "Check rule syntax"
msgstr ""
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2
msgid ""
"### Top-level Clauses\n"
"\n"
" (version <number>)\n"
"\n"
" (rule <rule_name> <rule_clause> ...)\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Rule Clauses\n"
"\n"
" (constraint <constraint_type> ...)\n"
"\n"
" (condition \"<expression>\")\n"
"\n"
" (layer \"<layer_name>\")\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Constraint Types\n"
"\n"
" * annular\\_width\n"
" * clearance\n"
" * courtyard_clearance\n"
" * diff\\_pair\\_gap\n"
" * diff\\_pair\\_uncoupled\n"
" * disallow\n"
" * edge\\_clearance\n"
" * length\n"
" * hole\\_clearance\n"
" * hole\\_size\n"
" * silk\\_clearance\n"
" * skew\n"
" * track\\_width\n"
" * via\\_count\n"
" * via\\_diameter\n"
"\n"
"\n"
"<br><br>\n"
"\n"
"### Item Types\n"
"\n"
" * buried_via\n"
" * graphic\n"
" * hole\n"
" * micro_via\n"
" * pad\n"
" * text\n"
" * track\n"
" * via\n"
" * zone\n"
"\n"
"<br>\n"
"\n"
"### Examples\n"
"\n"
" (version 1)\n"
"\n"
" (rule HV\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV\n"
" (layer outer)\n"
" (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_HV\n"
" # wider clearance between HV tracks\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n"
"\n"
" (rule HV_unshielded\n"
" (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n"
"\n"
"### Notes\n"
"\n"
"Version clause must be the first clause. It indicates the syntax version of "
"the file so that \n"
"future rules parsers can perform automatic updates. It should be\n"
"set to \"1\".\n"
"\n"
"Rules should be ordered by specificity. Later rules take\n"
"precedence over earlier rules; once a matching rule is found\n"
"no further rules will be checked.\n"
"\n"
"Use Ctrl+/ to comment or uncomment line(s).\n"
"<br><br><br>\n"
"\n"
"### Expression functions\n"
"\n"
"All function parameters support simple wildcards (`*` and `?`).\n"
"<br><br>\n"
"\n"
" A.insideCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's principal "
"courtyard.\n"
"<br><br>\n"
"\n"
" A.insideFrontCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's front courtyard.\n"
"<br><br>\n"
"\n"
" A.insideBackCourtyard('<footprint_refdes>')\n"
"True if any part of `A` lies within the given footprint's back courtyard.\n"
"<br><br>\n"
"\n"
" A.insideArea('<zone_name>')\n"
"True if any part of `A` lies within the given zone's outline.\n"
"<br><br>\n"
"\n"
" A.isPlated()\n"
"True if `A` has a hole which is plated.\n"
"<br><br>\n"
"\n"
" A.inDiffPair('<net_name>')\n"
"True if `A` has net that is part of the specified differential pair.\n"
"`<net_name>` is the base name of the differential pair. For example, "
"`inDiffPair('/CLK')`\n"
"matches items in the `/CLK_P` and `/CLK_N` nets.\n"
"<br><br>\n"
"\n"
" AB.isCoupledDiffPair()\n"
"True if `A` and `B` are members of the same diff pair.\n"
"<br><br>\n"
"\n"
" A.memberOf('<group_name>')\n"
"True if `A` is a member of the given group. Includes nested membership.\n"
"<br><br>\n"
"\n"
" A.existsOnLayer('<layer_name>')\n"
"True if `A` exists on the given layer. The layer name can be\n"
"either the name assigned in Board Setup > Board Editor Layers or\n"
"the canonical name (ie: `F.Cu`).\n"
"\n"
"NB: this returns true if `A` is on the given layer, independently\n"
"of whether or not the rule is being evaluated for that layer.\n"
"For the latter use a `(layer \"layer_name\")` clause in the rule.\n"
"<br><br><br>\n"
"\n"
"### More Examples\n"
"\n"
" (rule \"copper keepout\"\n"
" (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n"
"\n"
"\n"
" (rule \"BGA neckdown\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n"
"\n"
"\n"
" # prevent silk over tented vias\n"
" (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n"
"\n"
" (rule \"Distance between Vias of Different Nets\"\n"
" (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n"
" (rule \"Clearance between Pads of Different Nets\"\n"
" (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n"
"\n"
" (rule \"Via Hole to Track Clearance\"\n"
" (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type == 'Via' && B.Type == 'Track'\"))\n"
"\n"
" (rule \"Pad to Track Clearance\"\n"
" (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n"
"\n"
" (rule \"clearance-to-1mm-cutout\"\n"
" (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n"
"\n"
" (rule \"Max Drill Hole Size Mechanical\"\n"
" (constraint hole_size (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
"\n"
" (rule \"Max Drill Hole Size PTH\"\n"
" (constraint hole_size (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n"
"\n"
" # Specify an optimal gap for a particular diff-pair\n"
" (rule \"dp clock gap\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('/CLK')\"))\n"
"\n"
" # Specify a larger clearance around any diff-pair\n"
" (rule \"dp clearance\"\n"
" (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr ""
#: pcbnew/dialogs/panel_setup_text_and_graphics_base.cpp:72
msgid "Default properties for new dimension objects:"
msgstr ""
@ -28925,13 +28715,13 @@ msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:312
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:378
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:468
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:514
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:704
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:733
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:756
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:782
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1020
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:463
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:509
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:699
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:728
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:751
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:777
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:1015
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:214
#: pcbnew/drc/drc_test_provider_courtyard_clearance.cpp:242
#: pcbnew/drc/drc_test_provider_edge_clearance.cpp:101
@ -28941,7 +28731,7 @@ msgstr ""
msgid "(%s clearance %s; actual %s)"
msgstr ""
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:679
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:674
#, c-format
msgid "(nets %s and %s)"
msgstr ""
@ -30616,7 +30406,7 @@ msgstr ""
msgid "Castellated"
msgstr ""
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1169
#: pcbnew/pad.cpp:1004 pcbnew/pcb_track.cpp:742 pcbnew/pcb_track.cpp:1164
msgid "Diameter"
msgstr ""
@ -30958,7 +30748,7 @@ msgstr ""
msgid "Through Via"
msgstr "Via xuyên lỗ"
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1171
#: pcbnew/pcb_track.cpp:746 pcbnew/pcb_track.cpp:1166
msgid "Drill"
msgstr ""
@ -30981,23 +30771,23 @@ msgstr ""
msgid "Track %s on %s, length %s"
msgstr ""
#: pcbnew/pcb_track.cpp:1135 pcbnew/pcb_track.cpp:1152
#: pcbnew/pcb_track.cpp:1130 pcbnew/pcb_track.cpp:1147
msgid "Origin X"
msgstr ""
#: pcbnew/pcb_track.cpp:1138 pcbnew/pcb_track.cpp:1155
#: pcbnew/pcb_track.cpp:1133 pcbnew/pcb_track.cpp:1150
msgid "Origin Y"
msgstr ""
#: pcbnew/pcb_track.cpp:1174
#: pcbnew/pcb_track.cpp:1169
msgid "Layer Top"
msgstr ""
#: pcbnew/pcb_track.cpp:1176
#: pcbnew/pcb_track.cpp:1171
msgid "Layer Bottom"
msgstr ""
#: pcbnew/pcb_track.cpp:1178
#: pcbnew/pcb_track.cpp:1173
msgid "Via Type"
msgstr ""
@ -33336,24 +33126,24 @@ msgstr ""
msgid "Change Side / Flip"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2107
#: pcbnew/tools/edit_tool.cpp:2112
msgid "Move exact"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2240
#: pcbnew/tools/edit_tool.cpp:2245
#, c-format
msgid "Duplicated %d item(s)"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2463
#: pcbnew/tools/edit_tool.cpp:2468
msgid "Select reference point for the copy..."
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2464 pcbnew/tools/edit_tool.cpp:2481
#: pcbnew/tools/edit_tool.cpp:2469 pcbnew/tools/edit_tool.cpp:2486
msgid "Selection copied"
msgstr ""
#: pcbnew/tools/edit_tool.cpp:2465
#: pcbnew/tools/edit_tool.cpp:2470
#, fuzzy
msgid "Copy canceled"
msgstr "Hủy bỏ"
@ -35580,39 +35370,39 @@ msgstr ""
msgid "Presets (Ctrl+Tab):"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2422
#: pcbnew/widgets/appearance_controls.cpp:2432
msgid "Save preset..."
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2423
#: pcbnew/widgets/appearance_controls.cpp:2433
msgid "Delete preset..."
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Layer preset name:"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2501
#: pcbnew/widgets/appearance_controls.cpp:2534
msgid "Save Layer Preset"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2545
#: pcbnew/widgets/appearance_controls.cpp:2578
msgid "Presets"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2557
#: pcbnew/widgets/appearance_controls.cpp:2590
msgid "Delete Preset"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:2558
#: pcbnew/widgets/appearance_controls.cpp:2591
msgid "Select preset:"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:3033
#: pcbnew/widgets/appearance_controls.cpp:3066
msgid "Open Preferences"
msgstr ""
#: pcbnew/widgets/appearance_controls.cpp:3047
#: pcbnew/widgets/appearance_controls.cpp:3080
msgid ""
"The current color theme is read-only. Create a new theme in Preferences to "
"enable color editing."

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