Test the via types to the design rules

Fixes: lp:1741695
* https://bugs.launchpad.net/kicad/+bug/1741695
This commit is contained in:
Kristoffer Ödmark 2018-01-07 00:37:24 +01:00 committed by jean-pierre charras
parent bb694b97c2
commit 98d330f395
3 changed files with 32 additions and 1 deletions

View File

@ -71,6 +71,10 @@ wxString DRC_ITEM::GetErrorText() const
return wxString( _( "Via hole > diameter" ) );
case DRCE_MICRO_VIA_INCORRECT_LAYER_PAIR:
return wxString( _( "Micro Via: incorrect layer pairs (not adjacent)" ) );
case DRCE_MICRO_VIA_NOT_ALLOWED:
return wxString( _( "Micro Via: not allowed" ) );
case DRCE_BURIED_VIA_NOT_ALLOWED:
return wxString( _( "Buried Via: not allowed" ) );
case COPPERAREA_INSIDE_COPPERAREA:
return wxString( _( "Copper area inside copper area" ) );
case COPPERAREA_CLOSE_TO_COPPERAREA:

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@ -202,11 +202,31 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
return false;
}
// test if the type of via is allowed due to design rules
if( ( refvia->GetViaType() == VIA_MICROVIA ) &&
( m_pcb->GetDesignSettings().m_MicroViasAllowed == false ) )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_MICRO_VIA_NOT_ALLOWED, m_currentMarker );
return false;
}
// test if the type of via is allowed due to design rules
if( ( refvia->GetViaType() == VIA_BLIND_BURIED ) &&
( m_pcb->GetDesignSettings().m_BlindBuriedViaAllowed == false ) )
{
m_currentMarker = fillMarker( refvia, NULL,
DRCE_BURIED_VIA_NOT_ALLOWED, m_currentMarker );
return false;
}
// For microvias: test if they are blind vias and only between 2 layers
// because they are used for very small drill size and are drill by laser
// and **only one layer** can be drilled
if( refvia->GetViaType() == VIA_MICROVIA )
{
PCB_LAYER_ID layer1, layer2;
bool err = true;
@ -227,6 +247,7 @@ bool DRC::doTrackDrc( TRACK* aRefSeg, TRACK* aStart, bool testPads )
return false;
}
}
}
else // This is a track segment
{

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@ -36,6 +36,10 @@
#define BAD_DRC 1
// DRC error codes could be defined by an enum.
// however a #define is used because error code value is displayed in DRC messages,
// and using #define that shows each numerical value helps for debug.
/// DRC error codes:
#define DRCE_ 1 // not used yet
#define DRCE_UNCONNECTED_ITEMS 2 ///< items are unconnected
@ -83,7 +87,9 @@
#define DRCE_OVERLAPPING_FOOTPRINTS 44 ///< footprint courtyards overlap
#define DRCE_MISSING_COURTYARD_IN_FOOTPRINT 45 ///< footprint has no courtyard defined
#define DRCE_MALFORMED_COURTYARD_IN_FOOTPRINT 46 ///< footprint has a courtyard but malformed
///< (not convetrible to polygon)
///< (not convertible to a closed polygon with holes)
#define DRCE_MICRO_VIA_NOT_ALLOWED 47 ///< micro vias are not allowed
#define DRCE_BURIED_VIA_NOT_ALLOWED 48 ///< buried vias are not allowed
class EDA_DRAW_PANEL;