Eagle importer: two stage netlist update

After Eagle project import, schematic and board netlists are inconsistent:
footprints do not have sheetpaths assigned, schematics are unannotated.

One can update netlist either by references or timestamps, but timestamps
are empty in pcbnew, and updating by reference must by preceded by
annotation which may lead to broken links between board and schematics
(Eagle does not require references to end with a number, so KiCad annotater
will add numbers in such cases).

To fix the problem, there is a two step netlist update:
- update by reference without the annotation step, to assign
correct sheetpaths to footprints
- update by timestamp, after symbols are annotated, in order to
update references in the board

Fixes: lp:1748502
* https://bugs.launchpad.net/kicad/+bug/1748502
This commit is contained in:
Maciej Suminski 2018-02-16 19:29:47 +01:00
parent 43523a6179
commit 9e80eff90a
4 changed files with 9 additions and 51 deletions

View File

@ -550,7 +550,7 @@ public:
const wxString& aFullFileName,
unsigned aNetlistOptions,
REPORTER* aReporter = NULL,
bool silent = false ) override;
bool silent = false );
/**
* Create a netlist file.

View File

@ -192,36 +192,6 @@ public:
return false;
}
/**
* Function ReadPcbNetlist
* provides access to PcbNew's function ReadPcbNetlist.
*/
VTBL_ENTRY void ReadPcbNetlist( const wxString& aNetlistFileName,
const wxString& aCmpFileName,
REPORTER* aReporter,
bool aChangeFootprint,
bool aDeleteBadTracks,
bool aDeleteExtraFootprints,
bool aSelectByTimestamp,
bool aDeleteSinglePadNets,
bool aIsDryRun )
{
};
/**
* Function ReadPcbNetlist
* provides access to Eeschema's function CreateNetlist.
*/
VTBL_ENTRY bool CreateNetlist( int aFormat,
const wxString& aFullFileName,
unsigned aNetlistOptions,
REPORTER* aReporter = NULL,
bool silent = false )
{
return false;
};
/**
* Function ShowModal
* puts up this wxFrame as if it were a modal dialog, with all other instantiated

View File

@ -115,8 +115,6 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
}
}
wxFileName pcb( sch );
wxFileName netlist( pro );
pro.SetExt( ProjectFileExtension ); // enforce extension
@ -127,9 +125,7 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
pro.MakeAbsolute();
SetProjectFileName( pro.GetFullPath() );
wxString prj_filename = GetProjectFileName();
wxString sch_filename = sch.GetFullPath();
if( sch.FileExists() )
@ -162,10 +158,9 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
schframe->Iconize( false );
schframe->Raise();
schframe->CreateNetlist( NET_TYPE_PCBNEW, netlist.GetFullPath(), 0, NULL, true );
}
if( pcb.FileExists() )
{
PCB_EDIT_FRAME* pcbframe = (PCB_EDIT_FRAME*) Kiway.Player( FRAME_PCB, false );
@ -189,7 +184,7 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
// if the frame is not visible, the board is not yet loaded
if( !pcbframe->IsVisible() )
{
pcbframe->ImportFile( pcb.GetFullPath(), IO_MGR::EAGLE );
pcbframe->ImportFile( pcb.GetFullPath(), IO_MGR::EAGLE );
pcbframe->Show( true );
}
@ -199,18 +194,11 @@ void KICAD_MANAGER_FRAME::OnImportEagleFiles( wxCommandEvent& event )
pcbframe->Raise();
if( netlist.FileExists() )
{
pcbframe->ReadPcbNetlist( netlist.GetFullPath(),
wxEmptyString,
NULL,
false,
false,
false,
false,
false,
false );
}
// Two stage project update:
// - first, assign valid timestamps to footprints
// - second, perform schematic annotation and update footprint references
pcbframe->Kiway().ExpressMail( FRAME_SCH, MAIL_SCH_PCB_UPDATE_REQUEST, "no-annotate;by-reference", this );
pcbframe->Kiway().ExpressMail( FRAME_SCH, MAIL_SCH_PCB_UPDATE_REQUEST, "quiet-annotate;by-timestamp", this );
}
ReCreateTreePrj();

View File

@ -1550,7 +1550,7 @@ public:
bool aDeleteExtraFootprints,
bool aSelectByTimestamp,
bool aDeleteSinglePadNets,
bool aIsDryRun ) override;
bool aIsDryRun );
/**
* Function RemoveMisConnectedTracks