Translated using Weblate (Chinese (Simplified))

Currently translated at 100.0% (7191 of 7191 strings)

Translation: KiCad EDA/master source
Translate-URL: https://hosted.weblate.org/projects/kicad/master-source/zh_Hans/
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@ -16,7 +16,7 @@ msgstr ""
"Project-Id-Version: KiCad_zh_CN_Master_v0.0.32\n" "Project-Id-Version: KiCad_zh_CN_Master_v0.0.32\n"
"Report-Msgid-Bugs-To: \n" "Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2021-11-16 10:40-0800\n" "POT-Creation-Date: 2021-11-16 10:40-0800\n"
"PO-Revision-Date: 2021-11-26 03:21+0000\n" "PO-Revision-Date: 2021-11-26 21:26+0000\n"
"Last-Translator: taotieren <admin@taotieren.com>\n" "Last-Translator: taotieren <admin@taotieren.com>\n"
"Language-Team: Chinese (Simplified) <https://hosted.weblate.org/projects/" "Language-Team: Chinese (Simplified) <https://hosted.weblate.org/projects/"
"kicad/master-source/zh_Hans/>\n" "kicad/master-source/zh_Hans/>\n"
@ -20159,7 +20159,6 @@ msgid "Not worth using"
msgstr "不值得使用" msgstr "不值得使用"
#: pcb_calculator/eserie_help.h:2 #: pcb_calculator/eserie_help.h:2
#, fuzzy
msgid "" msgid ""
"E-series are defined in IEC 60063.\n" "E-series are defined in IEC 60063.\n"
"\n" "\n"
@ -20187,22 +20186,23 @@ msgid ""
"\tR1 | R2 |...| Rn\tresistors in parallel\n" "\tR1 | R2 |...| Rn\tresistors in parallel\n"
"\tR1 + (R2|R3)...\t\tany combination of the above\n" "\tR1 + (R2|R3)...\t\tany combination of the above\n"
msgstr "" msgstr ""
"在 IEC (国际电工委员会) 60063 中定义的 E 系列是一种被\n" "E 系列是在 IEC (国际电工委员会) 60063 中定义的。\n"
"广泛接受的电子元器件首选编号系统。可用值在对数刻度\n"
"上近似等距。\n"
"\n" "\n"
"\tE12: 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.8 8.2\n" "可用值在对数刻度上近似等距。\n"
"\tE6: 1.0 - 1.5 - 2.2 - 3.3 - 4.7 - 6.8 -\n" "\n"
"\tE3: 1.0 - - - 2.2 - - - 4.7 - - -\n" "\tE24(5%): 1.0 1.1 1.2 1.3 1.5 1.6 1.8 2.0 2.2 2.4 2.7 3.0 3.3 3.6 3.9 4.3 "
"4.7 5.1 5.6 6.2 6.8 7.5 8.2 9.1\n"
"\tE12(10%): 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.8 8.2\n"
"\tE6(20%): 1.0 - 1.5 - 2.2 - 3.3 - 4.7 - 6.8 -\n"
"\tE3(50%): 1.0 - - - 2.2 - - - 4.7 - - -\n"
"\tE1 : 1.0 - - - - - - - - - - -\n" "\tE1 : 1.0 - - - - - - - - - - -\n"
"\n" "\n"
"此计算器查找标准 E 系列元件的组合来\n" "- 这个计算器可以查找标准 E 系列 (在 10 Ω 和 1 MΩ 之间) 的组合以创建任意的数值。\n"
"创建任意值。您可以输入所需的电阻范围从0.0025 到 4000 kΩ。\n" "- 您可以输入0.0025 到 4000 kΩ之间所需的电阻。\n"
"给出的解决方案使用多达 4 个元件。\n" "- 给出了最多使用 4 个元件的解决方案。\n"
"\n" "\n"
"默认情况下,请求值总是被排除在解决方案集之外。也可以指定将最多两个额外的值排" "所要求的值总是被排除在解决方案集之外。<br>\n"
"除在解决方案之外,前提是\n" "如果出现元件可用性问题,最多可以排除两个额外的值。\n"
"这些组件值不可用。\n"
"\n" "\n"
"解决方案依照下列格式提供:\n" "解决方案依照下列格式提供:\n"
"\n" "\n"
@ -20265,7 +20265,6 @@ msgstr ""
"是否要退出并放弃变更?" "是否要退出并放弃变更?"
#: pcb_calculator/tracks_width_versus_current_formula.h:2 #: pcb_calculator/tracks_width_versus_current_formula.h:2
#, fuzzy
msgid "" msgid ""
"If you specify the maximum current, then the trace widths will be calculated " "If you specify the maximum current, then the trace widths will be calculated "
"to suit.\n" "to suit.\n"
@ -20292,20 +20291,20 @@ msgid ""
msgstr "" msgstr ""
"如果你指定最大电流,则会计算相应的布线宽度。\n" "如果你指定最大电流,则会计算相应的布线宽度。\n"
"\n" "\n"
"如果你指定其中一个布线宽度,则将计算它可以处理的最大电流。然后将计算另外的同" "如果你指定其中一个布线宽度,则将计算它可以处理的最大电流。然后将计算另外的同样处理此电流的布线宽度。\n"
"样处理此电流的布线宽度。\n"
"\n" "\n"
"控制值以粗体显示。\n" "控制值以粗体显示。\n"
"\n" "\n"
"计算适用于最大 35A外部或 17.5A(内部)的电流、最多 100 摄氏度的气温上升和" "计算适用于最大 35A外部或 17.5A(内部)的电流、高达 100 °C的温升和最多 400mil10mm的宽度。\n"
"最多 400mil10mm的宽度。\n"
"\n" "\n"
"来自 IPC 2221的该公式为\n" "来自 IPC 2221的该公式为\n"
"<center>__I = K * dT<sup>0.44</sup> * (W*H)<sup>0.725</sup>__</center>\n" "<center>___I = K &sdot; &Delta;T<sup>0.44</sup> &sdot; (W &sdot; H)<sup>0."
"725</sup>___</center> \n"
"其中: \n" "其中: \n"
"__I__ = 最大电流(单位:安培) \n" "__I__ = 最大电流单位A 安培) \n"
"__dt__ = 环境温度温升(单位:摄氏度) \n" "__&Delta;T__ = 环境温度温升单位°C 摄氏度) \n"
"__WH__ = 布线的宽度和厚度 (单位:密耳)\n" "__W__ = 布线的宽度 单位mil 密耳)\n"
"__H__ = 布线的厚度 单位mil 密耳)\n"
"__K__ = 0.024 用于内部布线0.048 用于外部布线 \n" "__K__ = 0.024 用于内部布线0.048 用于外部布线 \n"
#: pcb_calculator/transline_dlg_funct.cpp:140 #: pcb_calculator/transline_dlg_funct.cpp:140
@ -22869,7 +22868,7 @@ msgstr "不运行"
#: pcbnew/dialogs/dialog_drc_base.cpp:27 #: pcbnew/dialogs/dialog_drc_base.cpp:27
msgid "Refill all zones before performing DRC" msgid "Refill all zones before performing DRC"
msgstr "在执行 DRC 之前重新填充所有铜" msgstr "在执行 DRC 之前重新填充所有铜"
#: pcbnew/dialogs/dialog_drc_base.cpp:30 #: pcbnew/dialogs/dialog_drc_base.cpp:30
msgid "Report all errors for each track" msgid "Report all errors for each track"
@ -23388,7 +23387,7 @@ msgstr "包含过孔 (&V)"
#: pcbnew/dialogs/dialog_filter_selection_base.cpp:51 #: pcbnew/dialogs/dialog_filter_selection_base.cpp:51
msgid "Include &zones" msgid "Include &zones"
msgstr "包含铜 (&Z)" msgstr "包含铜 (&Z)"
#: pcbnew/dialogs/dialog_filter_selection_base.h:59 #: pcbnew/dialogs/dialog_filter_selection_base.h:59
msgid "Filter Selected Items" msgid "Filter Selected Items"
@ -23745,17 +23744,17 @@ msgstr "注意:添加焊膏间隙(绝对和相对)以确定最终间隙。
#: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:300 #: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:300
#: pcbnew/dialogs/dialog_pad_properties_base.cpp:703 #: pcbnew/dialogs/dialog_pad_properties_base.cpp:703
msgid "Connection to Copper Zones" msgid "Connection to Copper Zones"
msgstr "连接到铜区" msgstr "连接到铜区"
#: pcbnew/dialogs/dialog_footprint_properties_base.cpp:402 #: pcbnew/dialogs/dialog_footprint_properties_base.cpp:402
#: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:302 #: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:302
msgid "Pad connection to zones:" msgid "Pad connection to zones:"
msgstr "焊盘连接到铜:" msgstr "焊盘连接到铜:"
#: pcbnew/dialogs/dialog_footprint_properties_base.cpp:406 #: pcbnew/dialogs/dialog_footprint_properties_base.cpp:406
#: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:306 #: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:306
msgid "Use zone setting" msgid "Use zone setting"
msgstr "使用铜设置" msgstr "使用铜设置"
#: pcbnew/dialogs/dialog_footprint_properties_base.cpp:406 #: pcbnew/dialogs/dialog_footprint_properties_base.cpp:406
#: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:306 #: pcbnew/dialogs/dialog_footprint_properties_fp_editor_base.cpp:306
@ -24223,7 +24222,7 @@ msgstr "删除项"
#: pcbnew/widgets/appearance_controls.cpp:338 #: pcbnew/widgets/appearance_controls.cpp:338
#: pcbnew/widgets/panel_selection_filter_base.cpp:53 #: pcbnew/widgets/panel_selection_filter_base.cpp:53
msgid "Zones" msgid "Zones"
msgstr "铜" msgstr "铜"
#: pcbnew/dialogs/dialog_global_deletion_base.cpp:31 #: pcbnew/dialogs/dialog_global_deletion_base.cpp:31
msgid "Board outlines" msgid "Board outlines"
@ -24907,7 +24906,7 @@ msgstr "程度"
#: pcbnew/dialogs/dialog_non_copper_zones_properties_base.h:84 #: pcbnew/dialogs/dialog_non_copper_zones_properties_base.h:84
msgid "Non Copper Zones Properties" msgid "Non Copper Zones Properties"
msgstr "非铜区属性" msgstr "非铜区属性"
#: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:136 #: pcbnew/dialogs/dialog_pad_basicshapes_properties.cpp:136
msgid "Ring" msgid "Ring"
@ -25490,7 +25489,7 @@ msgstr "防散热导线宽度:"
#: pcbnew/dialogs/dialog_pad_properties_base.cpp:746 #: pcbnew/dialogs/dialog_pad_properties_base.cpp:746
msgid "Custom pad shape in zone:" msgid "Custom pad shape in zone:"
msgstr "铜中的自定义焊盘形状:" msgstr "铜中的自定义焊盘形状:"
#: pcbnew/dialogs/dialog_pad_properties_base.cpp:750 #: pcbnew/dialogs/dialog_pad_properties_base.cpp:750
msgid "Use pad shape" msgid "Use pad shape"
@ -25715,7 +25714,7 @@ msgstr "负片绘制"
#: pcbnew/dialogs/dialog_plot_base.cpp:149 #: pcbnew/dialogs/dialog_plot_base.cpp:149
msgid "Check zone fills before plotting" msgid "Check zone fills before plotting"
msgstr "在绘制之前检查铜填充" msgstr "在绘制之前检查铜填充"
#: pcbnew/dialogs/dialog_plot_base.cpp:169 #: pcbnew/dialogs/dialog_plot_base.cpp:169
msgid "Global solder mask minimum width and/or margin are not set to 0. " msgid "Global solder mask minimum width and/or margin are not set to 0. "
@ -26391,7 +26390,7 @@ msgstr "禁止敷铜"
#: pcbnew/dialogs/dialog_rule_area_properties_base.cpp:64 #: pcbnew/dialogs/dialog_rule_area_properties_base.cpp:64
msgid "Zones will not fill copper into this area" msgid "Zones will not fill copper into this area"
msgstr "铜时不会将铜填充到该区域以内" msgstr "铜时不会将铜填充到该区域以内"
#: pcbnew/dialogs/dialog_rule_area_properties_base.cpp:68 #: pcbnew/dialogs/dialog_rule_area_properties_base.cpp:68
msgid "Keep out footprints" msgid "Keep out footprints"
@ -26546,7 +26545,7 @@ msgstr "通过网自动更新"
msgid "" msgid ""
"Automatically change the net of this via when the pads or zones it touches " "Automatically change the net of this via when the pads or zones it touches "
"are changed" "are changed"
msgstr "当它接触的焊盘或铜更改时自动更改这个过孔的网络" msgstr "当它接触的焊盘或铜更改时自动更改这个过孔的网络"
#: pcbnew/dialogs/dialog_track_via_properties_base.cpp:60 #: pcbnew/dialogs/dialog_track_via_properties_base.cpp:60
msgid "Start point X:" msgid "Start point X:"
@ -27144,11 +27143,11 @@ msgstr ""
#: pcbnew/dialogs/panel_setup_constraints_base.cpp:86 #: pcbnew/dialogs/panel_setup_constraints_base.cpp:86
#, c-format #, c-format
msgid "Note: zone filling can be slow when < %s." msgid "Note: zone filling can be slow when < %s."
msgstr "注:< %s 时铜填充可能会变慢。" msgstr "注:< %s 时铜填充可能会变慢。"
#: pcbnew/dialogs/panel_setup_constraints_base.cpp:98 #: pcbnew/dialogs/panel_setup_constraints_base.cpp:98
msgid "Zone fill strategy" msgid "Zone fill strategy"
msgstr "铜填充策略" msgstr "铜填充策略"
#: pcbnew/dialogs/panel_setup_constraints_base.cpp:111 #: pcbnew/dialogs/panel_setup_constraints_base.cpp:111
msgid "Mimic legacy behavior" msgid "Mimic legacy behavior"
@ -27170,11 +27169,11 @@ msgstr "平滑多边形 (最佳性能)"
msgid "" msgid ""
"Better performance, exact export fidelity, and more complete filling near " "Better performance, exact export fidelity, and more complete filling near "
"higher-priority zones." "higher-priority zones."
msgstr "更好的性能、精确的导出保真度,以及在较高优先级铜附近更完整的填充。" msgstr "更好的性能、精确的导出保真度,以及在较高优先级铜附近更完整的填充。"
#: pcbnew/dialogs/panel_setup_constraints_base.cpp:134 #: pcbnew/dialogs/panel_setup_constraints_base.cpp:134
msgid "Allow fillets outside zone outline" msgid "Allow fillets outside zone outline"
msgstr "允许圆角超出铜轮廓" msgstr "允许圆角超出铜轮廓"
#: pcbnew/dialogs/panel_setup_constraints_base.cpp:149 #: pcbnew/dialogs/panel_setup_constraints_base.cpp:149
msgid "Length tuning" msgid "Length tuning"
@ -28045,7 +28044,6 @@ msgid "Check rule syntax"
msgstr "检查规则语法" msgstr "检查规则语法"
#: pcbnew/dialogs/panel_setup_rules_help_md.h:2 #: pcbnew/dialogs/panel_setup_rules_help_md.h:2
#, fuzzy
msgid "" msgid ""
"### Top-level Clauses\n" "### Top-level Clauses\n"
"\n" "\n"
@ -28254,83 +28252,121 @@ msgid ""
" (constraint clearance (min \"1.5mm\"))\n" " (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n" " (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
msgstr "" msgstr ""
"### Top-level Clauses\n"
"### 顶层语句\n" "### 顶层语句\n"
"\n" "\n"
" 版本语句:(version <版本号>)\n" " (version <number>)\n"
"# 版本语句:(version <版本号>)\n"
"\n" "\n"
"\n" "\n"
" 规则语句:(rule <规则名> <规则语句> ...)\n" " (rule <rule_name> <rule_clause> ...)\n"
"# 规则语句:(rule <规则名> <规则语句> ...)\n"
"\n" "\n"
"\n" "\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
"### Rule Clauses\n"
"### 规则语句\n" "### 规则语句\n"
"\n" "\n"
" 约束语句:(constraint <约束类型> ...)\n" " (constraint <constraint_type> ...)\n"
"# 约束语句:(constraint <约束类型> ...)\n"
"\n" "\n"
" 条件语句:(condition \"<条件表达式>\")\n" " (condition \"<expression>\")\n"
"# 条件语句:(condition \"<条件表达式>\")\n"
"\n" "\n"
" 层语句:(layer \"<层名>\")\n" " (layer \"<layer_name>\")\n"
"# 层语句:(layer \"<层名>\")\n"
"\n" "\n"
"\n" "\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
"### Constraint Types\n"
"### 约束类型\n" "### 约束类型\n"
"\n" "\n"
" * annular_width (孔铜环宽度)\n" " * annular\\_width\n"
" * clearance (间隙)\n" "# (孔铜环宽度)\n"
" * courtyard_clearance (封装外框之间的间隙)\n" " * clearance\n"
" * diff\\_pair\\_gap (差分对间隙)\n" "# (间隙)\n"
" * courtyard_clearance\n"
"# (封装外框之间的间隙)\n"
" * diff\\_pair\\_gap\n"
"# (差分对间隙)\n"
" * diff\\_pair\\_uncoupled\n" " * diff\\_pair\\_uncoupled\n"
" * disallow (不允许)\n" "# (对布线从该对中的另一个极性布线解耦的距离)\n"
" * edge_clearance (与板边的间隙)\n" " * disallow\n"
" * length (长度)\n" "# (不允许)\n"
" * hole (孔)\n" " * edge\\_clearance\n"
" * hole_clearance (与孔的间隙)\n" "# (与板边的间隙)\n"
" * silk_clearance (与丝印的间隙)\n" " * length\n"
" * skew (偏移)\n" "# (长度)\n"
" * track_width (线宽)\n" " * hole\n"
" * via_count (过孔个数)\n" "# (通孔)\n"
" * hole\\_clearance\n"
"# (与通孔的间隙)\n"
" * silk\\_clearance\n"
"# (与丝印的间隙)\n"
" * skew\n"
"# (总偏差)\n"
" * track\\_width\n"
"# (布线线宽)\n"
" * via\\_count\n"
"# (过孔个数)\n"
"\n" "\n"
"\n" "\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
"### Item Types\n"
"### 电路板元素类型\n" "### 电路板元素类型\n"
"\n" "\n"
" * buried_via (埋孔)\n" " * buried_via\n"
" * graphic (图形)\n" "# (埋孔)\n"
" * hole (通孔)\n" " * graphic\n"
" * micro_via (微孔)\n" "# (图形)\n"
" * pad (焊盘)\n" " * hole\n"
" * text (文字)\n" "# (通孔)\n"
" * track (布线)\n" " * micro_via\n"
" * via (过孔)\n" "# (微孔)\n"
" * zone (区域)\n" " * pad\n"
"# (焊盘)\n"
" * text\n"
"# (文本)\n"
" * track\n"
"# (布线)\n"
" * via\n"
"# (过孔)\n"
" * zone\n"
"# (敷铜)\n"
"\n" "\n"
"<br>\n" "<br>\n"
"\n" "\n"
"### Examples\n"
"### 范例\n" "### 范例\n"
"\n" "\n"
" (version 1)\n" " (version 1)\n"
"\n" "\n"
" (rule 高压间距\n" " (rule HV\n"
"# (rule 高压间距\n"
" (constraint clearance (min 1.5mm))\n" " (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n" " (condition \"A.NetClass == 'HV'\"))\n"
"\n" "\n"
"\n" "\n"
" (rule 外层高压间距\n" " (rule HV\n"
"# (rule 外层高压间距\n"
" (layer outer)\n" " (layer outer)\n"
" (constraint clearance (min 1.5mm))\n" " (constraint clearance (min 1.5mm))\n"
" (condition \"A.NetClass == 'HV'\"))\n" " (condition \"A.NetClass == 'HV'\"))\n"
"\n" "\n"
"\n" "\n"
" (rule 高压之间间距\n" " (rule HV_HV\n"
"# (rule 高压之间间距\n"
" # wider clearance between HV tracks\n"
" # 高压线路之间间距应该更大\n" " # 高压线路之间间距应该更大\n"
" (constraint clearance (min \"1.5mm + 2.0mm\"))\n" " (constraint clearance (min \"1.5mm + 2.0mm\"))\n"
" (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n" " (condition \"A.NetClass == 'HV' && B.NetClass == 'HV'\"))\n"
"\n" "\n"
"\n" "\n"
" (rule 无护罩高压线路\n" " (rule HV_unshielded\n"
"# (rule 无护罩高压线路\n"
" (constraint clearance (min 2mm))\n" " (constraint clearance (min 2mm))\n"
" (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n" " (condition \"A.NetClass == 'HV' && !A.insideArea('Shield*')\"))\n"
"<br><br>\n" "<br><br>\n"
@ -28346,12 +28382,14 @@ msgstr ""
"使用 Ctrl+/ 来对选中的行添加或取消注释。\n" "使用 Ctrl+/ 来对选中的行添加或取消注释。\n"
"<br><br><br>\n" "<br><br><br>\n"
"\n" "\n"
"### Expression functions\n"
"### 表达式函数\n" "### 表达式函数\n"
"\n" "\n"
"函数的参数均支持简单的通配符(`*` 和 `?`)。\n" "函数的参数均支持简单的通配符(`*` 和 `?`)。\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
" A.insideCourtyard('<封装标号>')\n" " A.insideCourtyard('<footprint_refdes>')\n"
"# A.insideCourtyard('<封装位号>')\n"
"若 `A` 的任何部分落在指定封装的主要外框中,则为真。\n" "若 `A` 的任何部分落在指定封装的主要外框中,则为真。\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
@ -28364,14 +28402,15 @@ msgstr ""
"<br><br>\n" "<br><br>\n"
"\n" "\n"
" A.insideArea('<zone_name>')\n" " A.insideArea('<zone_name>')\n"
"若 `A` 的任何部分落在指定区域中,则为真。\n" "若 `A` 的任何部分落在指定敷铜中,则为真。\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
" A.isPlated()\n" " A.isPlated()\n"
"若 `A` 含/是铜孔,则为真。\n" "若 `A` 含/是铜孔,则为真。\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
" A.inDiffPair('<网络名>')\n" " A.inDiffPair('<net_name>')\n"
"# A.inDiffPair('<网络名>')\n"
"若 `A` 含有指定差分对的网络,则为真。\n" "若 `A` 含有指定差分对的网络,则为真。\n"
"`<网络名>` 是指定差分对的基础名称。例如, `inDiffPair('CLK')`\n" "`<网络名>` 是指定差分对的基础名称。例如, `inDiffPair('CLK')`\n"
"matches items in the `CLK_P` and `CLK_N` nets.\n" "matches items in the `CLK_P` and `CLK_N` nets.\n"
@ -28381,11 +28420,13 @@ msgstr ""
"若 `A` 和 `B` 分别具有同一差分对的两个网络,则为真。\n" "若 `A` 和 `B` 分别具有同一差分对的两个网络,则为真。\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
" A.memberOf('<组名>')\n" " A.memberOf('<group_name>')\n"
"# A.memberOf('<组名>')\n"
"若 `A` 是指定组中的成员,则为真。组内嵌套的组也包括在内。\n" "若 `A` 是指定组中的成员,则为真。组内嵌套的组也包括在内。\n"
"<br><br>\n" "<br><br>\n"
"\n" "\n"
" A.existsOnLayer('<层名>')\n" " A.existsOnLayer('<layer_name>')\n"
"# A.existsOnLayer('<层名>')\n"
"若 `A` 在指定的层中,则为真。层名可以是“电路板设置 >\n" "若 `A` 在指定的层中,则为真。层名可以是“电路板设置 >\n"
"电路板编辑图层”菜单中指定的名称,也可以是内部最简名称\n" "电路板编辑图层”菜单中指定的名称,也可以是内部最简名称\n"
"(如 `F.Cu`)。\n" "(如 `F.Cu`)。\n"
@ -28398,62 +28439,76 @@ msgstr ""
"\n" "\n"
"### 更多的范例\n" "### 更多的范例\n"
"\n" "\n"
" (rule \"禁止铜区\"\n" " (rule \"copper keepout\"\n"
"# (rule \"禁止铜区\"\n"
" (constraint disallow track via zone)\n" " (constraint disallow track via zone)\n"
" (condition \"A.insideArea('zone3')\"))\n" " (condition \"A.insideArea('zone3')\"))\n"
"\n" "\n"
"\n" "\n"
" (rule \"BGA 加粗\"\n" " (rule \"BGA neckdown\"\n"
"# (rule \"BGA 加粗\"\n"
" (constraint track_width (min 0.2mm) (opt 0.25mm))\n" " (constraint track_width (min 0.2mm) (opt 0.25mm))\n"
" (constraint clearance (min 0.05mm) (opt 0.08mm))\n" " (constraint clearance (min 0.05mm) (opt 0.08mm))\n"
" (condition \"A.insideCourtyard('U3')\"))\n" " (condition \"A.insideCourtyard('U3')\"))\n"
"\n" "\n"
"\n" "\n"
" # prevent silk over tented vias\n"
" # 禁止盖油过孔上印字\n" " # 禁止盖油过孔上印字\n"
" (rule silk_over_via\n" " (rule silk_over_via\n"
" (constraint silk_clearance (min 0.2mm))\n" " (constraint silk_clearance (min 0.2mm))\n"
" (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n" " (condition \"A.Type == '*Text' && B.Type == 'Via'\"))\n"
"\n" "\n"
"\n" "\n"
" (rule \"不同网络的过孔的间距\" \n" " (rule \"Distance between Vias of Different Nets\" \n"
"# (rule \"不同网络的过孔的间距\" \n"
" (constraint hole_to_hole (min 0.254mm))\n" " (constraint hole_to_hole (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n" " (condition \"A.Type =='Via' && B.Type =='Via' && A.Net != B.Net\"))\n"
"\n" "\n"
" (rule \"不同网络的焊盘的间距\" \n" " (rule \"Clearance between Pads of Different Nets\" \n"
"# (rule \"不同网络的焊盘的间距\" \n"
" (constraint clearance (min 3.0mm))\n" " (constraint clearance (min 3.0mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n" " (condition \"A.Type =='Pad' && B.Type =='Pad' && A.Net != B.Net\"))\n"
"\n" "\n"
"\n" "\n"
" (rule \"过孔到焊盘的间距\" \n" " (rule \"Via Hole to Track Clearance\" \n"
"# (rule \"过孔到焊盘的间距\" \n"
" (constraint hole_clearance (min 0.254mm))\n" " (constraint hole_clearance (min 0.254mm))\n"
" (condition \"A.Type =='Via' && B.Type =='Track'\"))\n" " (condition \"A.Type =='Via' && B.Type =='Track'\"))\n"
" \n" " \n"
" (rule \"焊盘到导线的间距\" \n" " (rule \"Pad to Track Clearance\" \n"
"# (rule \"焊盘到导线的间距\" \n"
" (constraint clearance (min 0.2mm))\n" " (constraint clearance (min 0.2mm))\n"
" (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n" " (condition \"A.Type =='Pad' && B.Type =='Track'\"))\n"
"\n" "\n"
"\n" "\n"
" (rule \"1mm宽开槽周围的间距\"\n" " (rule \"clearance-to-1mm-cutout\"\n"
"# (rule \"1mm宽开槽周围的间距\"\n"
" (constraint clearance (min 0.8mm))\n" " (constraint clearance (min 0.8mm))\n"
" (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n" " (condition \"A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm\"))\n"
"\n" "\n"
"\n" "\n"
" (rule \"最大机械孔孔径\" \n" " (rule \"Max Drill Hole Size Mechanical\" \n"
"# (rule \"最大机械孔孔径\" \n"
" (constraint hole (max 6.3mm))\n" " (constraint hole (max 6.3mm))\n"
" (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n" " (condition \"A.Pad_Type == 'NPTH, mechanical'\"))\n"
" \n" " \n"
" (rule \"最大铜孔孔径\" \n" " (rule \"Max Drill Hole Size PTH\" \n"
"# (rule \"最大铜孔孔径\" \n"
" (constraint hole (max 6.35mm))\n" " (constraint hole (max 6.35mm))\n"
" (condition \"A.Pad_Type == 'Through-hole'\"))\n" " (condition \"A.Pad_Type == 'Through-hole'\"))\n"
"\n" "\n"
"\n" "\n"
" # Specify an optimal gap for a particular diff-pair\n"
" # 给单独的差分对设置最优opt间距\n" " # 给单独的差分对设置最优opt间距\n"
" (rule \"CLK信号间距\"\n" " (rule \"dp clock gap\"\n"
"# (rule \"差分对信号间距\"\n"
" (constraint diff_pair_gap (opt \"0.8mm\"))\n" " (constraint diff_pair_gap (opt \"0.8mm\"))\n"
" (condition \"A.inDiffPair('CLK') && AB.isCoupledDiffPair()\"))\n" " (condition \"A.inDiffPair('CLK') && AB.isCoupledDiffPair()\"))\n"
"\n" "\n"
" # Specify a larger clearance around any diff-pair\n"
" # 给任意差分对周围扩大间距\n" " # 给任意差分对周围扩大间距\n"
" (rule \"差分对外间距\"\n" " (rule \"dp clearance\"\n"
"# (rule \"差分对外间距\"\n"
" (constraint clearance (min \"1.5mm\"))\n" " (constraint clearance (min \"1.5mm\"))\n"
" (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n" " (condition \"A.inDiffPair('*') && !AB.isCoupledDiffPair()\"))\n"
@ -28580,7 +28635,7 @@ msgstr "添加禁布区 '%s'"
#: pcbnew/drc/drc_engine.cpp:694 #: pcbnew/drc/drc_engine.cpp:694
msgid "Tessellating copper zones..." msgid "Tessellating copper zones..."
msgstr "细分铜区..." msgstr "细分铜区..."
#: pcbnew/drc/drc_engine.cpp:795 pcbnew/drc/drc_engine.cpp:810 #: pcbnew/drc/drc_engine.cpp:795 pcbnew/drc/drc_engine.cpp:810
#, c-format #, c-format
@ -28738,11 +28793,11 @@ msgstr "电路板边缘间隙违规"
#: pcbnew/drc/drc_item.cpp:78 #: pcbnew/drc/drc_item.cpp:78
msgid "Copper areas intersect" msgid "Copper areas intersect"
msgstr "铜区交叉" msgstr "铜区交叉"
#: pcbnew/drc/drc_item.cpp:82 #: pcbnew/drc/drc_item.cpp:82
msgid "Copper zone net has no pads" msgid "Copper zone net has no pads"
msgstr "铜区没有焊盘连接" msgstr "铜区没有焊盘连接"
#: pcbnew/drc/drc_item.cpp:86 #: pcbnew/drc/drc_item.cpp:86
msgid "Via is not connected or connected on only one layer" msgid "Via is not connected or connected on only one layer"
@ -29004,7 +29059,7 @@ msgstr "(%s 最大环形宽度 %s实际 %s)"
#: pcbnew/drc/drc_test_provider_connectivity.cpp:75 #: pcbnew/drc/drc_test_provider_connectivity.cpp:75
msgid "Checking pad, via and zone connections..." msgid "Checking pad, via and zone connections..."
msgstr "正在检查焊盘、过孔和铜连接..." msgstr "正在检查焊盘、过孔和铜连接..."
#: pcbnew/drc/drc_test_provider_connectivity.cpp:149 #: pcbnew/drc/drc_test_provider_connectivity.cpp:149
msgid "Checking net connections..." msgid "Checking net connections..."
@ -29032,11 +29087,11 @@ msgstr "正在检查焊盘..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:241 #: pcbnew/drc/drc_test_provider_copper_clearance.cpp:241
msgid "Checking copper zone clearances..." msgid "Checking copper zone clearances..."
msgstr "正在检查铜区间隙..." msgstr "正在检查铜区间隙..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:248 #: pcbnew/drc/drc_test_provider_copper_clearance.cpp:248
msgid "Checking zones..." msgid "Checking zones..."
msgstr "正在检查铜..." msgstr "正在检查铜..."
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:311 #: pcbnew/drc/drc_test_provider_copper_clearance.cpp:311
#: pcbnew/drc/drc_test_provider_copper_clearance.cpp:358 #: pcbnew/drc/drc_test_provider_copper_clearance.cpp:358
@ -29263,12 +29318,12 @@ msgstr "(%s 最大直径 %s; 实际 %s)"
#: pcbnew/edit_zone_helpers.cpp:86 pcbnew/edit_zone_helpers.cpp:152 #: pcbnew/edit_zone_helpers.cpp:86 pcbnew/edit_zone_helpers.cpp:152
msgid "Modify zone properties" msgid "Modify zone properties"
msgstr "修改铜属性" msgstr "修改铜属性"
#: pcbnew/edit_zone_helpers.cpp:137 #: pcbnew/edit_zone_helpers.cpp:137
#, c-format #, c-format
msgid "Refill %d Zones" msgid "Refill %d Zones"
msgstr "重新填充 %d 铜" msgstr "重新填充 %d 铜"
#: pcbnew/exporters/export_d356.cpp:376 #: pcbnew/exporters/export_d356.cpp:376
msgid "Export D-356 Test File" msgid "Export D-356 Test File"
@ -29438,10 +29493,8 @@ msgid ""
"This may result in different fills from previous KiCad versions which used " "This may result in different fills from previous KiCad versions which used "
"the line thicknesses of the board boundary on the Edge Cuts layer." "the line thicknesses of the board boundary on the Edge Cuts layer."
msgstr "" msgstr ""
"如果此电路板上的覆铜被重新填充,将应用铜边缘间隙设置 (见电路板配置 > 设计规" "如果此电路板上的敷铜被重新填充,将应用铜边缘间隙设置 (见电路板配置 > 设计规则 >限制)。\n"
"则 >限制)。\n" "这可能导致来自先前 KiCad 版本的不同填充,这些版本会将电路板边缘的线粗细用于 Edge Cuts 层。"
"这可能导致来自先前 KiCad 版本的不同填充,这些版本会将电路板边缘的线粗细用于 "
"Edge Cuts 层。"
#: pcbnew/files.cpp:549 #: pcbnew/files.cpp:549
msgid "Edge Clearance Warning" msgid "Edge Clearance Warning"
@ -29675,7 +29728,7 @@ msgstr "封装图像文件名称"
#: pcbnew/footprint_editor_utils.cpp:220 #: pcbnew/footprint_editor_utils.cpp:220
msgid "Edit Zone" msgid "Edit Zone"
msgstr "编辑铜" msgstr "编辑铜"
#: pcbnew/footprint_editor_utils.cpp:294 #: pcbnew/footprint_editor_utils.cpp:294
#, c-format #, c-format
@ -30520,32 +30573,32 @@ msgstr "过孔连接到未知网络 (%s)。"
#: pcbnew/netlist_reader/board_netlist_updater.cpp:704 #: pcbnew/netlist_reader/board_netlist_updater.cpp:704
#, c-format #, c-format
msgid "Reconnect copper zone '%s' from %s to %s." msgid "Reconnect copper zone '%s' from %s to %s."
msgstr "将铜区 '%s' 从 %s 重新连接到 %s。" msgstr "将铜区 '%s' 从 %s 重新连接到 %s。"
#: pcbnew/netlist_reader/board_netlist_updater.cpp:711 #: pcbnew/netlist_reader/board_netlist_updater.cpp:711
#, c-format #, c-format
msgid "Reconnect copper zone from %s to %s." msgid "Reconnect copper zone from %s to %s."
msgstr "将铜区 %s 重新连接到 %s。" msgstr "将铜区 %s 重新连接到 %s。"
#: pcbnew/netlist_reader/board_netlist_updater.cpp:732 #: pcbnew/netlist_reader/board_netlist_updater.cpp:732
#, c-format #, c-format
msgid "Reconnected copper zone '%s' from %s to %s." msgid "Reconnected copper zone '%s' from %s to %s."
msgstr "将铜区 '%s' 从 %s 重新连接到了 %s。" msgstr "将铜区 '%s' 从 %s 重新连接到了 %s。"
#: pcbnew/netlist_reader/board_netlist_updater.cpp:739 #: pcbnew/netlist_reader/board_netlist_updater.cpp:739
#, c-format #, c-format
msgid "Reconnected copper zone from %s to %s." msgid "Reconnected copper zone from %s to %s."
msgstr "将铜区从 %s 重新连接到了 %s。" msgstr "将铜区从 %s 重新连接到了 %s。"
#: pcbnew/netlist_reader/board_netlist_updater.cpp:752 #: pcbnew/netlist_reader/board_netlist_updater.cpp:752
#, c-format #, c-format
msgid "Copper zone '%s' has no pads connected." msgid "Copper zone '%s' has no pads connected."
msgstr "铜区 '%s' 没有与之连接的焊盘。" msgstr "铜区 '%s' 没有与之连接的焊盘。"
#: pcbnew/netlist_reader/board_netlist_updater.cpp:760 #: pcbnew/netlist_reader/board_netlist_updater.cpp:760
#, c-format #, c-format
msgid "Copper zone on layer %s at (%s, %s) has no pads connected." msgid "Copper zone on layer %s at (%s, %s) has no pads connected."
msgstr "坐标 (%s, %s) 层 %s 上的铜区没有与之相连的焊盘。" msgstr "坐标 (%s, %s) 层 %s 上的铜区没有与之相连的焊盘。"
#: pcbnew/netlist_reader/board_netlist_updater.cpp:802 #: pcbnew/netlist_reader/board_netlist_updater.cpp:802
#, c-format #, c-format
@ -31631,9 +31684,8 @@ msgid ""
"between these two settings. The setting for disjoint copper has been applied " "between these two settings. The setting for disjoint copper has been applied "
"as the minimum island area of the KiCad Zone." "as the minimum island area of the KiCad Zone."
msgstr "" msgstr ""
"CADSTAR 模板 '%s' 具有不同的设置,用于\"保留覆铜 - 不相交\"和\"保留覆铜 - 隔" "CADSTAR 模板 '%s' 具有不同的设置,用于\"保留敷铜 - 不相交\"和\"保留敷铜 - 隔离\"。KiCad 不区分这两个设置。"
"离\"。KiCad 不区分这两个设置。不相交覆铜的设置已作为 KiCad 覆铜的最小覆铜面积" "不相交敷铜的设置已作为 KiCad 敷铜的最小敷铜面积应用。"
"应用。"
#: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:1916 #: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:1916
#, c-format #, c-format
@ -31664,9 +31716,7 @@ msgid ""
"The CADSTAR layer '%s' is defined as a power plane layer. However no net " "The CADSTAR layer '%s' is defined as a power plane layer. However no net "
"with such name exists. The layer has been loaded but no copper zone was " "with such name exists. The layer has been loaded but no copper zone was "
"created." "created."
msgstr "" msgstr "CADSTAR 层 '%s' 被定义为电源层。然而,不存在具有该名称的网络。已加载层,但未创建敷铜区。"
"CADSTAR 层 '%s' 被定义为电源层。然而,不存在具有该名称的网络。已加载层,但未"
"创建覆铜区。"
#: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:2085 #: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:2085
msgid "" msgid ""
@ -31675,9 +31725,8 @@ msgid ""
"filled, or as a KiCad Track if the shape was an unfilled outline (open or " "filled, or as a KiCad Track if the shape was an unfilled outline (open or "
"closed)." "closed)."
msgstr "" msgstr ""
"CADSTAR 设计包含没有直接 KiCad 等价物的铜元素。如果填充的是实体或图案填充,则" "CADSTAR 设计包含没有直接 KiCad 等价物的铜元素。如果填充的是实体或图案填充,则它们已导入为 KiCad "
"它们已导入为 KiCad 覆铜;如果形状是未填充的轮廓(开放或闭合),则它们将导入为 " "敷铜;如果形状是未填充的轮廓(开放或闭合),则它们将导入为 KiCad 布线。"
"KiCad 布线。"
#: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:2190 #: pcbnew/plugins/cadstar/cadstar_pcb_archive_loader.cpp:2190
#, c-format #, c-format
@ -31913,7 +31962,7 @@ msgstr "无效的令牌计数。预期为8但找到了%zu。"
#: pcbnew/plugins/fabmaster/import_fabmaster.cpp:1445 #: pcbnew/plugins/fabmaster/import_fabmaster.cpp:1445
#, c-format #, c-format
msgid "Invalid format for record_tag string '%s' in row %zu." msgid "Invalid format for record_tag string '%s' in row %zu."
msgstr "record_tag 字符串 \"%s\" 的无效格式,位于行 %zu。" msgstr "record_tag 字符串 '%s' 的无效格式位于行 %zu。"
#: pcbnew/plugins/fabmaster/import_fabmaster.cpp:1416 #: pcbnew/plugins/fabmaster/import_fabmaster.cpp:1416
#, c-format #, c-format
@ -32048,7 +32097,7 @@ msgstr "未知过孔类型 %d"
#: pcbnew/plugins/kicad/kicad_plugin.cpp:2080 #: pcbnew/plugins/kicad/kicad_plugin.cpp:2080
#, c-format #, c-format
msgid "unknown zone corner smoothing type %d" msgid "unknown zone corner smoothing type %d"
msgstr "未知铜角平滑类型 %d" msgstr "未知铜角平滑类型 %d"
#: pcbnew/plugins/kicad/kicad_plugin.cpp:2301 #: pcbnew/plugins/kicad/kicad_plugin.cpp:2301
msgid "Open cancelled by user." msgid "Open cancelled by user."
@ -32241,12 +32290,12 @@ msgid ""
"Convert zones to polygon fills?" "Convert zones to polygon fills?"
msgstr "" msgstr ""
"不再支持旧段填充模式。\n" "不再支持旧段填充模式。\n"
"是否将铜转换为多边形填充?" "是否将铜转换为多边形填充?"
#: pcbnew/plugins/kicad/pcb_parser.cpp:5078 #: pcbnew/plugins/kicad/pcb_parser.cpp:5078
#: pcbnew/plugins/legacy/legacy_plugin.cpp:2486 #: pcbnew/plugins/legacy/legacy_plugin.cpp:2486
msgid "Legacy Zone Warning" msgid "Legacy Zone Warning"
msgstr "旧铜警告" msgstr "旧铜警告"
#: pcbnew/plugins/legacy/legacy_plugin.cpp:596 #: pcbnew/plugins/legacy/legacy_plugin.cpp:596
#, c-format #, c-format
@ -33084,7 +33133,7 @@ msgstr "解锁"
#: pcbnew/tools/board_editor_control.cpp:1457 #: pcbnew/tools/board_editor_control.cpp:1457
msgid "Duplicate zone" msgid "Duplicate zone"
msgstr "复制铜" msgstr "复制铜"
#: pcbnew/tools/board_inspection_tool.cpp:59 #: pcbnew/tools/board_inspection_tool.cpp:59
msgid "Net Tools" msgid "Net Tools"
@ -33140,13 +33189,13 @@ msgstr "区域连接解像度,用于:"
#: pcbnew/tools/board_inspection_tool.cpp:397 #: pcbnew/tools/board_inspection_tool.cpp:397
#, c-format #, c-format
msgid "Zone thermal relief: %s." msgid "Zone thermal relief: %s."
msgstr "铜防散热 (花焊盘)%s。" msgstr "铜防散热 (花焊盘)%s。"
#: pcbnew/tools/board_inspection_tool.cpp:402 #: pcbnew/tools/board_inspection_tool.cpp:402
#: pcbnew/tools/board_inspection_tool.cpp:421 pcbnew/zone.cpp:341 #: pcbnew/tools/board_inspection_tool.cpp:421 pcbnew/zone.cpp:341
#: pcbnew/zone.cpp:356 pcbnew/zone.cpp:504 pcbnew/zone.cpp:793 #: pcbnew/zone.cpp:356 pcbnew/zone.cpp:504 pcbnew/zone.cpp:793
msgid "zone" msgid "zone"
msgstr "铜" msgstr "铜"
#: pcbnew/tools/board_inspection_tool.cpp:404 #: pcbnew/tools/board_inspection_tool.cpp:404
#, c-format #, c-format
@ -33156,7 +33205,7 @@ msgstr "被 %s 覆盖;防散热:%s。"
#: pcbnew/tools/board_inspection_tool.cpp:414 #: pcbnew/tools/board_inspection_tool.cpp:414
#, c-format #, c-format
msgid "Zone clearance: %s." msgid "Zone clearance: %s."
msgstr "铜间隙:%s。" msgstr "铜间隙:%s。"
#: pcbnew/tools/board_inspection_tool.cpp:423 #: pcbnew/tools/board_inspection_tool.cpp:423
#, c-format #, c-format
@ -33279,7 +33328,7 @@ msgstr "将形状转换为多边形"
#: pcbnew/tools/convert_tool.cpp:246 #: pcbnew/tools/convert_tool.cpp:246
msgid "Convert shapes to zone" msgid "Convert shapes to zone"
msgstr "将形状转换为铜" msgstr "将形状转换为铜"
#: pcbnew/tools/convert_tool.cpp:748 #: pcbnew/tools/convert_tool.cpp:748
msgid "Convert polygons to lines" msgid "Convert polygons to lines"
@ -33423,7 +33472,7 @@ msgstr "放置过孔"
#: pcbnew/tools/drc_tool.cpp:151 #: pcbnew/tools/drc_tool.cpp:151
msgid "Refilling all zones..." msgid "Refilling all zones..."
msgstr "重新填充所有铜..." msgstr "重新填充所有铜..."
#: pcbnew/tools/drc_tool.cpp:160 #: pcbnew/tools/drc_tool.cpp:160
msgid "Schematic parity tests require a fully annotated schematic." msgid "Schematic parity tests require a fully annotated schematic."
@ -33589,7 +33638,7 @@ msgstr "从所选创建区域"
#: pcbnew/tools/pcb_actions.cpp:53 #: pcbnew/tools/pcb_actions.cpp:53
msgid "Creates a copper zone from the selection" msgid "Creates a copper zone from the selection"
msgstr "从所选内容创建铜区" msgstr "从所选内容创建铜区"
#: pcbnew/tools/pcb_actions.cpp:58 #: pcbnew/tools/pcb_actions.cpp:58
msgid "Create Rule Area from Selection" msgid "Create Rule Area from Selection"
@ -33701,11 +33750,11 @@ msgstr "添加引线标注"
#: pcbnew/tools/pcb_actions.cpp:155 #: pcbnew/tools/pcb_actions.cpp:155
msgid "Add Filled Zone" msgid "Add Filled Zone"
msgstr "添加填充铜" msgstr "添加填充铜"
#: pcbnew/tools/pcb_actions.cpp:155 #: pcbnew/tools/pcb_actions.cpp:155
msgid "Add a filled zone" msgid "Add a filled zone"
msgstr "添加填充铜" msgstr "添加填充铜"
#: pcbnew/tools/pcb_actions.cpp:161 #: pcbnew/tools/pcb_actions.cpp:161
msgid "Add Vias" msgid "Add Vias"
@ -33725,19 +33774,19 @@ msgstr "添加规则区域(禁布区)"
#: pcbnew/tools/pcb_actions.cpp:173 #: pcbnew/tools/pcb_actions.cpp:173
msgid "Add a Zone Cutout" msgid "Add a Zone Cutout"
msgstr "添加挖空铜" msgstr "添加挖空铜"
#: pcbnew/tools/pcb_actions.cpp:173 #: pcbnew/tools/pcb_actions.cpp:173
msgid "Add a cutout area of an existing zone" msgid "Add a cutout area of an existing zone"
msgstr "添加挖空铜" msgstr "添加挖空铜"
#: pcbnew/tools/pcb_actions.cpp:179 #: pcbnew/tools/pcb_actions.cpp:179
msgid "Add a Similar Zone" msgid "Add a Similar Zone"
msgstr "添加相似铜" msgstr "添加相似铜"
#: pcbnew/tools/pcb_actions.cpp:179 #: pcbnew/tools/pcb_actions.cpp:179
msgid "Add a zone with the same settings as an existing zone" msgid "Add a zone with the same settings as an existing zone"
msgstr "添加与现有覆铜具有相同设置的覆铜" msgstr "添加与现有敷铜具有相同设置的敷铜"
#: pcbnew/tools/pcb_actions.cpp:185 #: pcbnew/tools/pcb_actions.cpp:185
msgid "Import Graphics..." msgid "Import Graphics..."
@ -34280,19 +34329,19 @@ msgstr "将过孔尺寸更改为上一个预定义尺寸"
#: pcbnew/tools/pcb_actions.cpp:642 #: pcbnew/tools/pcb_actions.cpp:642
msgid "Merge Zones" msgid "Merge Zones"
msgstr "合并铜" msgstr "合并铜"
#: pcbnew/tools/pcb_actions.cpp:642 #: pcbnew/tools/pcb_actions.cpp:642
msgid "Merge zones" msgid "Merge zones"
msgstr "合并铜" msgstr "合并铜"
#: pcbnew/tools/pcb_actions.cpp:646 #: pcbnew/tools/pcb_actions.cpp:646
msgid "Duplicate Zone onto Layer..." msgid "Duplicate Zone onto Layer..."
msgstr "重复铜到层..." msgstr "重复铜到层..."
#: pcbnew/tools/pcb_actions.cpp:646 #: pcbnew/tools/pcb_actions.cpp:646
msgid "Duplicate zone outline onto a different layer" msgid "Duplicate zone outline onto a different layer"
msgstr "复制铜轮廓到不同的层上" msgstr "复制铜轮廓到不同的层上"
#: pcbnew/tools/pcb_actions.cpp:651 #: pcbnew/tools/pcb_actions.cpp:651
msgid "Add Layer Alignment Target" msgid "Add Layer Alignment Target"
@ -34539,7 +34588,7 @@ msgstr "绘制区域填充"
#: pcbnew/tools/pcb_actions.cpp:853 #: pcbnew/tools/pcb_actions.cpp:853
msgid "Show filled areas of zones" msgid "Show filled areas of zones"
msgstr "显示铜的填充区域" msgstr "显示铜的填充区域"
#: pcbnew/tools/pcb_actions.cpp:858 #: pcbnew/tools/pcb_actions.cpp:858
msgid "Draw Zone Outlines" msgid "Draw Zone Outlines"
@ -34547,7 +34596,7 @@ msgstr "绘制区域轮廓"
#: pcbnew/tools/pcb_actions.cpp:858 #: pcbnew/tools/pcb_actions.cpp:858
msgid "Show only zone boundaries" msgid "Show only zone boundaries"
msgstr "仅显示铜边界" msgstr "仅显示铜边界"
#: pcbnew/tools/pcb_actions.cpp:863 #: pcbnew/tools/pcb_actions.cpp:863
msgid "Draw Zone Fill Fracture Borders" msgid "Draw Zone Fill Fracture Borders"
@ -34559,7 +34608,7 @@ msgstr "绘制区域填充三角剖分"
#: pcbnew/tools/pcb_actions.cpp:874 #: pcbnew/tools/pcb_actions.cpp:874
msgid "Toggle Zone Display" msgid "Toggle Zone Display"
msgstr "切换铜显示" msgstr "切换铜显示"
#: pcbnew/tools/pcb_actions.cpp:875 #: pcbnew/tools/pcb_actions.cpp:875
msgid "Cycle between showing zone fills and just their outlines" msgid "Cycle between showing zone fills and just their outlines"
@ -34894,7 +34943,7 @@ msgstr "按类型从选区删除项目"
#: pcbnew/tools/pcb_actions.cpp:1270 pcbnew/tools/zone_filler_tool.cpp:211 #: pcbnew/tools/pcb_actions.cpp:1270 pcbnew/tools/zone_filler_tool.cpp:211
msgid "Fill Zone" msgid "Fill Zone"
msgstr "填充铜" msgstr "填充铜"
#: pcbnew/tools/pcb_actions.cpp:1270 #: pcbnew/tools/pcb_actions.cpp:1270
msgid "Update copper fill of selected zone(s)" msgid "Update copper fill of selected zone(s)"
@ -34902,15 +34951,15 @@ msgstr "更新所选区域的铜填充"
#: pcbnew/tools/pcb_actions.cpp:1276 pcbnew/tools/zone_filler_tool.cpp:154 #: pcbnew/tools/pcb_actions.cpp:1276 pcbnew/tools/zone_filler_tool.cpp:154
msgid "Fill All Zones" msgid "Fill All Zones"
msgstr "填充所有铜" msgstr "填充所有铜"
#: pcbnew/tools/pcb_actions.cpp:1276 #: pcbnew/tools/pcb_actions.cpp:1276
msgid "Update copper fill of all zones" msgid "Update copper fill of all zones"
msgstr "取消所有区域的铜" msgstr "取消所有区域的铜"
#: pcbnew/tools/pcb_actions.cpp:1281 pcbnew/tools/zone_filler_tool.cpp:249 #: pcbnew/tools/pcb_actions.cpp:1281 pcbnew/tools/zone_filler_tool.cpp:249
msgid "Unfill Zone" msgid "Unfill Zone"
msgstr "取消填充铜" msgstr "取消填充铜"
#: pcbnew/tools/pcb_actions.cpp:1281 #: pcbnew/tools/pcb_actions.cpp:1281
msgid "Remove copper fill from selected zone(s)" msgid "Remove copper fill from selected zone(s)"
@ -34922,7 +34971,7 @@ msgstr "取消填充所有区域"
#: pcbnew/tools/pcb_actions.cpp:1287 #: pcbnew/tools/pcb_actions.cpp:1287
msgid "Remove copper fill from all zones" msgid "Remove copper fill from all zones"
msgstr "从所有区域移除铜" msgstr "从所有区域移除铜"
#: pcbnew/tools/pcb_actions.cpp:1295 #: pcbnew/tools/pcb_actions.cpp:1295
msgid "Place Selected Footprints" msgid "Place Selected Footprints"
@ -35093,7 +35142,7 @@ msgstr "拖动拐角"
#: pcbnew/tools/pcb_point_editor.cpp:2051 #: pcbnew/tools/pcb_point_editor.cpp:2051
msgid "Add a zone corner" msgid "Add a zone corner"
msgstr "添加铜拐角" msgstr "添加铜拐角"
#: pcbnew/tools/pcb_point_editor.cpp:2088 #: pcbnew/tools/pcb_point_editor.cpp:2088
msgid "Split segment" msgid "Split segment"
@ -35101,7 +35150,7 @@ msgstr "分割线段"
#: pcbnew/tools/pcb_point_editor.cpp:2159 #: pcbnew/tools/pcb_point_editor.cpp:2159
msgid "Remove a zone/polygon corner" msgid "Remove a zone/polygon corner"
msgstr "删除铜或多边形的拐角" msgstr "删除铜或多边形的拐角"
#: pcbnew/tools/pcb_selection_tool.cpp:73 #: pcbnew/tools/pcb_selection_tool.cpp:73
msgid "Select" msgid "Select"
@ -35153,11 +35202,11 @@ msgstr "单击位号项..."
#: pcbnew/tools/zone_create_helper.cpp:176 #: pcbnew/tools/zone_create_helper.cpp:176
msgid "Add a zone cutout" msgid "Add a zone cutout"
msgstr "添加挖空铜" msgstr "添加挖空铜"
#: pcbnew/tools/zone_create_helper.cpp:215 #: pcbnew/tools/zone_create_helper.cpp:215
msgid "Add a zone" msgid "Add a zone"
msgstr "添加铜" msgstr "添加铜"
#: pcbnew/tools/zone_create_helper.cpp:246 #: pcbnew/tools/zone_create_helper.cpp:246
msgid "Add a graphical polygon" msgid "Add a graphical polygon"
@ -35165,12 +35214,12 @@ msgstr "添加多边形图形"
#: pcbnew/tools/zone_filler_tool.cpp:81 #: pcbnew/tools/zone_filler_tool.cpp:81
msgid "Checking Zones" msgid "Checking Zones"
msgstr "检查铜" msgstr "检查铜"
#: pcbnew/tools/zone_filler_tool.cpp:89 pcbnew/tools/zone_filler_tool.cpp:162 #: pcbnew/tools/zone_filler_tool.cpp:89 pcbnew/tools/zone_filler_tool.cpp:162
#: pcbnew/tools/zone_filler_tool.cpp:217 #: pcbnew/tools/zone_filler_tool.cpp:217
msgid "Fill Zone(s)" msgid "Fill Zone(s)"
msgstr "填充铜" msgstr "填充铜"
#: pcbnew/tools/zone_filler_tool.cpp:131 #: pcbnew/tools/zone_filler_tool.cpp:131
msgid "Show DRC rules" msgid "Show DRC rules"
@ -35182,7 +35231,7 @@ msgstr "规则"
#: pcbnew/tools/zone_filler_tool.cpp:144 #: pcbnew/tools/zone_filler_tool.cpp:144
msgid "Zone fills may be inaccurate. DRC rules contain errors." msgid "Zone fills may be inaccurate. DRC rules contain errors."
msgstr "铜填充可能不准确。DRC 规则包含错误。" msgstr "铜填充可能不准确。DRC 规则包含错误。"
#: pcbnew/undo_redo.cpp:537 #: pcbnew/undo_redo.cpp:537
msgid "Incomplete undo/redo operation: some items not found" msgid "Incomplete undo/redo operation: some items not found"
@ -35202,7 +35251,7 @@ msgstr "显示所有焊盘"
#: pcbnew/widgets/appearance_controls.cpp:338 #: pcbnew/widgets/appearance_controls.cpp:338
msgid "Show copper zones" msgid "Show copper zones"
msgstr "显示铜区" msgstr "显示铜区"
#: pcbnew/widgets/appearance_controls.cpp:340 #: pcbnew/widgets/appearance_controls.cpp:340
msgid "Footprints Front" msgid "Footprints Front"
@ -35758,11 +35807,11 @@ msgstr "规则区域"
#: pcbnew/zone.cpp:558 #: pcbnew/zone.cpp:558
msgid "Copper Zone" msgid "Copper Zone"
msgstr "铜区" msgstr "铜区"
#: pcbnew/zone.cpp:560 #: pcbnew/zone.cpp:560
msgid "Non-copper Zone" msgid "Non-copper Zone"
msgstr "非铜区" msgstr "非铜区"
#: pcbnew/zone.cpp:565 #: pcbnew/zone.cpp:565
msgid "Cutout" msgid "Cutout"
@ -35782,7 +35831,7 @@ msgstr "无焊盘"
#: pcbnew/zone.cpp:583 #: pcbnew/zone.cpp:583
msgid "No copper zones" msgid "No copper zones"
msgstr "无铜区" msgstr "无铜区"
#: pcbnew/zone.cpp:586 #: pcbnew/zone.cpp:586
msgid "No footprints" msgid "No footprints"
@ -35825,7 +35874,7 @@ msgstr "%s 上的规则区域挖空"
#: pcbnew/zone.cpp:892 #: pcbnew/zone.cpp:892
#, c-format #, c-format
msgid "Zone Cutout on %s" msgid "Zone Cutout on %s"
msgstr "%s 上的铜挖空" msgstr "%s 上的铜挖空"
#: pcbnew/zone.cpp:897 #: pcbnew/zone.cpp:897
#, c-format #, c-format
@ -35835,7 +35884,7 @@ msgstr "%s上的规则区域"
#: pcbnew/zone.cpp:899 #: pcbnew/zone.cpp:899
#, c-format #, c-format
msgid "Zone %s on %s" msgid "Zone %s on %s"
msgstr "%s 上的铜%s" msgstr "%s 上的铜%s"
#: pcbnew/zone.cpp:1464 #: pcbnew/zone.cpp:1464
msgid "Inherited" msgid "Inherited"
@ -35851,7 +35900,7 @@ msgstr "焊盘连接"
#: pcbnew/zone_filler.cpp:96 #: pcbnew/zone_filler.cpp:96
msgid "Building zone fills..." msgid "Building zone fills..."
msgstr "构造铜填充..." msgstr "构造铜填充..."
#: pcbnew/zone_filler.cpp:302 #: pcbnew/zone_filler.cpp:302
msgid "Removing isolated copper islands..." msgid "Removing isolated copper islands..."
@ -35859,15 +35908,15 @@ msgstr "正在移除孤立的铜岛..."
#: pcbnew/zone_filler.cpp:415 #: pcbnew/zone_filler.cpp:415
msgid "Zone fills are out-of-date. Refill?" msgid "Zone fills are out-of-date. Refill?"
msgstr "铜填充已失效,重新填充?" msgstr "铜填充已失效,重新填充?"
#: pcbnew/zone_filler.cpp:417 #: pcbnew/zone_filler.cpp:417
msgid "Refill" msgid "Refill"
msgstr "重新铜" msgstr "重新铜"
#: pcbnew/zone_filler.cpp:417 #: pcbnew/zone_filler.cpp:417
msgid "Continue without Refill" msgid "Continue without Refill"
msgstr "取消铜" msgstr "取消铜"
#: pcbnew/zone_filler.cpp:428 #: pcbnew/zone_filler.cpp:428
msgid "Performing polygon fills..." msgid "Performing polygon fills..."