haskal
/
kicad
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Naming cleanup.

This commit is contained in:
Jeff Young 2020-10-28 12:24:10 +00:00
parent ae77dfc455
commit cd93dbd324
3 changed files with 16 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
pcbnew/drc/drc_test_provider_copper_clearance.cpp
View File

@ -81,11 +81,12 @@ public:
int GetNumPhases() const override; int GetNumPhases() const override;
private: private:
bool testTrackAgainst( TRACK* track, SHAPE* trackShape, PCB_LAYER_ID layer, BOARD_ITEM* other ); bool testTrackAgainstItem( TRACK* track, SHAPE* trackShape, PCB_LAYER_ID layer,
BOARD_ITEM* other );
void testTrackClearances(); void testTrackClearances();
bool testPadAgainst( D_PAD* pad, SHAPE* padShape, PCB_LAYER_ID layer, BOARD_ITEM* other ); bool testPadAgainstItem( D_PAD* pad, SHAPE* padShape, PCB_LAYER_ID layer, BOARD_ITEM* other );
void testPadClearances(); void testPadClearances();
@ -204,8 +205,9 @@ static std::shared_ptr<SHAPE> getShape( BOARD_ITEM* aItem, PCB_LAYER_ID aLayer )
} }
bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainst( TRACK* track, SHAPE* trackShape, bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackAgainstItem( TRACK* track, SHAPE* trackShape,
PCB_LAYER_ID layer, BOARD_ITEM* other ) PCB_LAYER_ID layer,
BOARD_ITEM* other )
{ {
if( m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE ) ) if( m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE ) )
return false; return false;
@ -404,7 +406,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances()
}, },
[&]( BOARD_ITEM* other, int ) -> bool [&]( BOARD_ITEM* other, int ) -> bool
{ {
return testTrackAgainst( track, trackShape.get(), layer, other ); return testTrackAgainstItem( track, trackShape.get(), layer, other );
}, },
m_largestClearance ); m_largestClearance );
@ -417,8 +419,9 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testTrackClearances()
} }
bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainst( D_PAD* pad, SHAPE* padShape, bool DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadAgainstItem( D_PAD* pad, SHAPE* padShape,
PCB_LAYER_ID layer, BOARD_ITEM* other ) PCB_LAYER_ID layer,
BOARD_ITEM* other )
{ {
bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE ); bool testClearance = !m_drcEngine->IsErrorLimitExceeded( DRCE_CLEARANCE );
bool testShorting = !m_drcEngine->IsErrorLimitExceeded( DRCE_SHORTING_ITEMS ); bool testShorting = !m_drcEngine->IsErrorLimitExceeded( DRCE_SHORTING_ITEMS );
@ -561,7 +564,7 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testPadClearances( )
}, },
[&]( BOARD_ITEM* other, int ) -> bool [&]( BOARD_ITEM* other, int ) -> bool
{ {
return testPadAgainst( pad, padShape.get(), layer, other ); return testPadAgainstItem( pad, padShape.get(), layer, other );
}, },
m_largestClearance ); m_largestClearance );
} }
@ -582,8 +585,6 @@ void DRC_TEST_PROVIDER_COPPER_CLEARANCE::testZones()
if( m_board->GetBoardPolygonOutlines( buffer ) ) if( m_board->GetBoardPolygonOutlines( buffer ) )
boardOutline = &buffer; boardOutline = &buffer;
// Test copper areas for valid netcodes -> fixme, goes to connectivity checks
for( int layer_id = F_Cu; layer_id <= B_Cu; ++layer_id ) for( int layer_id = F_Cu; layer_id <= B_Cu; ++layer_id )
{ {
PCB_LAYER_ID layer = static_cast<PCB_LAYER_ID>( layer_id ); PCB_LAYER_ID layer = static_cast<PCB_LAYER_ID>( layer_id );

8
pcbnew/drc/drc_test_provider_hole_clearance.cpp
View File

@ -70,7 +70,7 @@ public:
int GetNumPhases() const override; int GetNumPhases() const override;
private: private:
bool testHoleAgainst( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, BOARD_ITEM* aOther ); bool testHoleAgainstHole( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, BOARD_ITEM* aOther );
BOARD* m_board; BOARD* m_board;
DRC_RTREE m_holeTree; DRC_RTREE m_holeTree;
@ -187,7 +187,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run()
}, },
[&]( BOARD_ITEM* other, int ) -> bool [&]( BOARD_ITEM* other, int ) -> bool
{ {
return testHoleAgainst( via, holeShape.get(), other ); return testHoleAgainstHole( via, holeShape.get(), other );
}, },
m_largestClearance ); m_largestClearance );
@ -213,7 +213,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run()
}, },
[&]( BOARD_ITEM* other, int ) -> bool [&]( BOARD_ITEM* other, int ) -> bool
{ {
return testHoleAgainst( pad, holeShape.get(), other ); return testHoleAgainstHole( pad, holeShape.get(), other );
}, },
m_largestClearance ); m_largestClearance );
@ -227,7 +227,7 @@ bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::Run()
} }
bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::testHoleAgainst( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole, bool DRC_TEST_PROVIDER_HOLE_CLEARANCE::testHoleAgainstHole( BOARD_ITEM* aItem, SHAPE_CIRCLE* aHole,
BOARD_ITEM* aOther ) BOARD_ITEM* aOther )
{ {
if( m_drcEngine->IsErrorLimitExceeded( DRCE_DRILLED_HOLES_TOO_CLOSE ) ) if( m_drcEngine->IsErrorLimitExceeded( DRCE_DRILLED_HOLES_TOO_CLOSE ) )

2
pcbnew/tools/drc_tool.cpp
View File

@ -220,8 +220,6 @@ void DRC_TOOL::RunTests( PROGRESS_REPORTER* aProgressReporter, bool aTestTracksA
} }
commit.Push( _( "DRC" ), false ); commit.Push( _( "DRC" ), false );
aProgressReporter->AdvancePhase( _( "Formatting results..." ) );
wxSafeYield();
m_drcRunning = false; m_drcRunning = false;