Clean up some TODOs.
This commit is contained in:
parent
da11574a19
commit
ed79f6e511
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@ -26,7 +26,6 @@
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#include <executable_names.h>
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#include <executable_names.h>
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// TODO Executable names TODO
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#ifdef __WINDOWS__
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#ifdef __WINDOWS__
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const wxString CVPCB_EXE ( "cvpcb.exe" );
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const wxString CVPCB_EXE ( "cvpcb.exe" );
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const wxString PCBNEW_EXE ( "pcbnew.exe" );
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const wxString PCBNEW_EXE ( "pcbnew.exe" );
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@ -38,9 +38,6 @@
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- DRCE_MALFORMED_COURTYARD
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- DRCE_MALFORMED_COURTYARD
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- DRCE_PTH_IN_COURTYARD,
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- DRCE_PTH_IN_COURTYARD,
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- DRCE_NPTH_IN_COURTYARD,
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- DRCE_NPTH_IN_COURTYARD,
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TODO: do an actual clearance check instead of polygon intersection. Treat closed outlines
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as filled and allow open curves in the courtyard.
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*/
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*/
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class DRC_TEST_PROVIDER_COURTYARD_CLEARANCE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
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class DRC_TEST_PROVIDER_COURTYARD_CLEARANCE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
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@ -39,8 +39,6 @@
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Generated errors:
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Generated errors:
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- DRCE_DRILLED_HOLES_TOO_CLOSE
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- DRCE_DRILLED_HOLES_TOO_CLOSE
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- DRCE_DRILLED_HOLES_COLOCATED
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- DRCE_DRILLED_HOLES_COLOCATED
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TODO: vias-in-smd-pads check
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*/
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*/
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class DRC_TEST_PROVIDER_HOLE_TO_HOLE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
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class DRC_TEST_PROVIDER_HOLE_TO_HOLE : public DRC_TEST_PROVIDER_CLEARANCE_BASE
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@ -295,8 +295,6 @@ public:
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// @copydoc BOARD_ITEM::GetEffectiveShape
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// @copydoc BOARD_ITEM::GetEffectiveShape
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virtual std::shared_ptr<SHAPE> GetEffectiveShape( PCB_LAYER_ID aLayer = UNDEFINED_LAYER ) const override;
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virtual std::shared_ptr<SHAPE> GetEffectiveShape( PCB_LAYER_ID aLayer = UNDEFINED_LAYER ) const override;
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//TODO(snh): Add GetSelectMenuText() and GetMsgPanelInfoBase()
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/**
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/**
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* Function GetLength
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* Function GetLength
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* returns the length of the arc track
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* returns the length of the arc track
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@ -302,7 +302,6 @@ int KIGFX::PCB_PRINT_PAINTER::getDrillShape( const PAD* aPad ) const
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VECTOR2D KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PAD* aPad ) const
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VECTOR2D KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PAD* aPad ) const
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{
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{
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// TODO should it depend on the pad size?
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return m_drillMarkReal ? KIGFX::PCB_PAINTER::getDrillSize( aPad ) :
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return m_drillMarkReal ? KIGFX::PCB_PAINTER::getDrillSize( aPad ) :
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VECTOR2D( m_drillMarkSize, m_drillMarkSize );
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VECTOR2D( m_drillMarkSize, m_drillMarkSize );
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}
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}
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@ -310,6 +309,5 @@ VECTOR2D KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PAD* aPad ) const
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int KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PCB_VIA* aVia ) const
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int KIGFX::PCB_PRINT_PAINTER::getDrillSize( const PCB_VIA* aVia ) const
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{
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{
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// TODO should it depend on the via size?
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return m_drillMarkReal ? KIGFX::PCB_PAINTER::getDrillSize( aVia ) : m_drillMarkSize;
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return m_drillMarkReal ? KIGFX::PCB_PAINTER::getDrillSize( aVia ) : m_drillMarkSize;
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}
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}
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@ -33,6 +33,9 @@
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#include <layer_ids.h>
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#include <layer_ids.h>
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#include <geometry/convex_hull.h>
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#include <geometry/convex_hull.h>
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#include <confirm.h>
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#include <confirm.h>
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#include <tools/pcb_tool_base.h>
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#include <tool/tool_manager.h>
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#include <settings/app_settings.h>
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#include <pcb_painter.h>
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#include <pcb_painter.h>
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@ -1046,7 +1049,6 @@ bool PNS_KICAD_IFACE_BASE::syncZone( PNS::NODE* aWorld, ZONE* aZone, SHAPE_POLY_
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return false;
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return false;
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LSET layers = aZone->GetLayerSet();
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LSET layers = aZone->GetLayerSet();
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EDA_UNITS units = EDA_UNITS::MILLIMETRES; // TODO: get real units
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poly = aZone->Outline();
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poly = aZone->Outline();
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poly->CacheTriangulation( false );
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poly->CacheTriangulation( false );
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@ -1054,7 +1056,7 @@ bool PNS_KICAD_IFACE_BASE::syncZone( PNS::NODE* aWorld, ZONE* aZone, SHAPE_POLY_
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if( !poly->IsTriangulationUpToDate() )
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if( !poly->IsTriangulationUpToDate() )
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{
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{
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KIDIALOG dlg( nullptr, wxString::Format( _( "%s is malformed." ),
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KIDIALOG dlg( nullptr, wxString::Format( _( "%s is malformed." ),
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aZone->GetSelectMenuText( units ) ),
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aZone->GetSelectMenuText( GetUnits() ) ),
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KIDIALOG::KD_WARNING );
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KIDIALOG::KD_WARNING );
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dlg.ShowDetailedText( wxString::Format( _( "This zone cannot be handled by the router.\n"
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dlg.ShowDetailedText( wxString::Format( _( "This zone cannot be handled by the router.\n"
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"Please verify it is not a self-intersecting "
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"Please verify it is not a self-intersecting "
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@ -1672,6 +1674,12 @@ void PNS_KICAD_IFACE::Commit()
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}
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}
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EDA_UNITS PNS_KICAD_IFACE::GetUnits() const
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{
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return static_cast<EDA_UNITS>( m_tool->GetManager()->GetSettings()->m_System.units );
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}
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void PNS_KICAD_IFACE::SetView( KIGFX::VIEW* aView )
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void PNS_KICAD_IFACE::SetView( KIGFX::VIEW* aView )
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{
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{
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wxLogTrace( "PNS", "SetView %p", aView );
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wxLogTrace( "PNS", "SetView %p", aView );
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@ -1704,7 +1712,6 @@ void PNS_KICAD_IFACE::SetView( KIGFX::VIEW* aView )
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void PNS_KICAD_IFACE::UpdateNet( int aNetCode )
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void PNS_KICAD_IFACE::UpdateNet( int aNetCode )
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{
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{
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wxLogTrace( "PNS", "Update-net %d", aNetCode );
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wxLogTrace( "PNS", "Update-net %d", aNetCode );
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}
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}
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@ -74,15 +74,11 @@ public:
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void SetStartLayer( int aLayer ) { m_startLayer = aLayer; }
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void SetStartLayer( int aLayer ) { m_startLayer = aLayer; }
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virtual PNS::NODE* GetWorld() const override
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virtual PNS::NODE* GetWorld() const override { return m_world; };
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{
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return m_world;
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};
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BOARD* GetBoard() const
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BOARD* GetBoard() const { return m_board; }
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{
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return m_board;
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virtual EDA_UNITS GetUnits() const { return EDA_UNITS::MILLIMETRES; };
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}
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PNS::RULE_RESOLVER* GetRuleResolver() override;
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PNS::RULE_RESOLVER* GetRuleResolver() override;
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PNS::DEBUG_DECORATOR* GetDebugDecorator() override;
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PNS::DEBUG_DECORATOR* GetDebugDecorator() override;
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@ -130,6 +126,7 @@ public:
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void UpdateNet( int aNetCode ) override;
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void UpdateNet( int aNetCode ) override;
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EDA_UNITS GetUnits() const override;
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private:
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private:
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struct OFFSET
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struct OFFSET
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@ -611,8 +611,6 @@ int DRAWING_TOOL::PlaceText( const TOOL_EVENT& aEvent )
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else
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else
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{
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{
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PCB_TEXT* pcbText = new PCB_TEXT( m_frame->GetModel() );
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PCB_TEXT* pcbText = new PCB_TEXT( m_frame->GetModel() );
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// TODO we have to set IS_NEW, otherwise InstallTextPCB.. creates an
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// undo entry :| LEGACY_CLEANUP
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pcbText->SetFlags( IS_NEW );
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pcbText->SetFlags( IS_NEW );
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pcbText->SetLayer( layer );
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pcbText->SetLayer( layer );
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PCB_LAYER_ID layer = m_layer;
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PCB_LAYER_ID layer = m_layer;
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// NOTE: This brings in dependence on PCB_EDIT_FRAME to the qa tests, which isn't ideal.
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if( dynamic_cast<PCB_SCREEN*>( aFrame->GetScreen() ) )
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// TODO: Figure out a way for items to know the active layer without the whole edit frame?
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layer = dynamic_cast<PCB_SCREEN*>( aFrame->GetScreen() )->m_Active_Layer;
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#if 0
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if( PCB_EDIT_FRAME* pcbframe = dynamic_cast<PCB_EDIT_FRAME*>( aFrame ) )
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{
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if( m_FilledPolysList.count( pcbframe->GetActiveLayer() ) )
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layer = pcbframe->GetActiveLayer();
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}
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#endif
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if( !GetIsRuleArea() )
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if( !GetIsRuleArea() )
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{
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{
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