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kicad2step: fix a bug when the board has no hole. 

kicad2step was trying to remove an empty hole list, generating a OCC error.

Fixes #4242
https://gitlab.com/kicad/code/kicad/issues/x4242
This commit is contained in:
jean-pierre charras 2020-04-22 10:43:28 +02:00
parent b22ff26688
commit fd6c9c7685
3 changed files with 11 additions and 7 deletions
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2
utils/kicad2step/pcb/kicadmodule.cpp
View File

@ -312,7 +312,7 @@ bool KICADMODULE::ComposePCB( class PCBMODEL* aPCB, S3D_RESOLVER* resolver,
double posX = m_position.x - aOrigin.x;
double posY = m_position.y - aOrigin.y;
for( auto i : m_curves )
for( KICADCURVE* i : m_curves )
{
if( i->m_layer != LAYER_EDGE || CURVE_NONE == i->m_form )
continue;

13
utils/kicad2step/pcb/kicadpcb.cpp
View File

@ -320,7 +320,8 @@ bool KICADPCB::parseSetup( SEXPR::SEXPR* data )
if( !child->IsList() )
{
ReportMessage( wxString::Format( "corrupt PCB file (line %d)\n", child->GetLineNumber() ) );
ReportMessage( wxString::Format(
"corrupt PCB file (line %d)\n", child->GetLineNumber() ) );
return false;
}
@ -330,8 +331,9 @@ bool KICADPCB::parseSetup( SEXPR::SEXPR* data )
{
if( child->GetNumberOfChildren() != 3 )
{
ReportMessage( wxString::Format( "corrupt PCB file (line %d): grid_origin has %d children (expected: 3)\n",
child->GetLineNumber(), child->GetNumberOfChildren() ) );
ReportMessage( wxString::Format(
"corrupt PCB file (line %d): grid_origin has %d children (expected: 3)\n",
child->GetLineNumber(), child->GetNumberOfChildren() ) );
return false;
}
@ -343,8 +345,9 @@ bool KICADPCB::parseSetup( SEXPR::SEXPR* data )
{
if( child->GetNumberOfChildren() != 3 )
{
ReportMessage( wxString::Format( "corrupt PCB file (line %d)m: aux_axis_origin has %d children (expected: 3)\n",
child->GetLineNumber(), child->GetNumberOfChildren() ) );
ReportMessage( wxString::Format(
"corrupt PCB file (line %d)m: aux_axis_origin has %d children (expected: 3)\n",
child->GetLineNumber(), child->GetNumberOfChildren() ) );
return false;
}

3
utils/kicad2step/pcb/oce_utils.cpp
View File

@ -260,7 +260,6 @@ bool PCBMODEL::AddOutlineSegment( KICADCURVE* aCurve )
ReportMessage( msg );
return false;
}
}
else
{
@ -778,6 +777,7 @@ bool PCBMODEL::CreatePCB()
}
}
#else // Much faster than first version: group all holes and cut only once
if( m_cutouts.size() )
{
BRepAlgoAPI_Cut Cut;
TopTools_ListOfShape mainbrd;
@ -794,6 +794,7 @@ bool PCBMODEL::CreatePCB()
board = Cut.Shape();
}
#endif
// push the board to the data structure
ReportMessage( "\nGenerate board full shape\n" );
m_pcb_label = m_assy->AddComponent( m_assy_label, board );