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404 Commits

Author SHA1 Message Date
Jeff Young 09bfb76545 Make sure dissallow constraints get added to rule. 
Also improves some error reporting.

Fixes https://gitlab.com/kicad/code/kicad/issues/6566
 2020-12-03 23:08:51 +00:00
Jeff Young dadfe03804 Reinstate 5.1 net-tie hack since "real" net-ties got pushed to 7.0. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6556
 2020-11-30 16:11:15 +00:00
Jeff Young 3a9a6e22bc Fix issues in reporting netclasses. 
1) make sure we get the default netclass when we want it
2) escape for HTML (particularly important for "<invalid>", but also
for reporting user rule names, netclass names, etc.)
 2020-11-30 14:38:06 +00:00
Jeff Young 3989c19c41 Don't test pad:track clearances in pad tester. 
They've already been tested in the track tester.

Fixes https://gitlab.com/kicad/code/kicad/issues/6554
 2020-11-30 14:38:06 +00:00
Jeff Young e09271ca0e Fixes for hole clearance and hole-to-hole tests. 
1) Separate out CONSTRAINT types
2) Filter both source and dest pads/vias for drilled holes when doing
   hole-to-hole checks.  We were checking the items being put into the
   DRC RTree, but not the items we were scanning.
3) Add hole clearance to Board Setup Constraints panel.

Fixes https://gitlab.com/kicad/code/kicad/issues/6546

Fixes https://gitlab.com/kicad/code/kicad/issues/4683
 2020-11-29 23:35:23 +00:00
Jeff Young e4d0ffd607 Retire old SKIP_STRUCT filtering. 
We already added the checkedPairs stuff which deals with a:b vs b:a
better, and the SKIP_STRUCT version had side-effects between the two
tests.

Fixes https://gitlab.com/kicad/code/kicad/issues/6539
 2020-11-29 00:08:23 +00:00
Jeff Young 1cae0b6c08 Make sure board edges have 0 width. 
When we divide up a rectangle or polygon (for better RTree usage)
we need to make sure the individual segments also have their widths
zeroed out.

Fixes https://gitlab.com/kicad/code/kicad/issues/6482
 2020-11-24 23:49:28 +00:00
Jeff Young 9c7c05c161 Mostly formatting cleanup but a few type-casting cleanups too. 2020-11-24 22:16:41 +00:00
Jeff Young 2f3f4c209e Make sure DRC reports a missing board outline. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6481
 2020-11-24 14:22:27 +00:00
Jeff Young 1391774f64 Re-factor boundary/courtyard checker error handling. 
ADDED Footprint Checker dialog to display the results in.

Fixes https://gitlab.com/kicad/code/kicad/issues/6446
 2020-11-21 20:57:35 +00:00
Jeff Young ff3bd7e72a Fix a crash bug in DRC, and equate Margin to Edge.Cuts. 2020-11-20 21:22:27 +00:00
Jeff Young b123318cf6 Encourage use of full DRC for board & footprint malformed outlines. 
It shows much more detail.  Removes some nag dialogs and places
hypertext links in others.

Also fixes the auto-layer-showing to correctly show Edge.Cuts or
F.CrtYd or B.CrtYd for errors relating to them.

Fixes https://gitlab.com/kicad/code/kicad/issues/6446
 2020-11-20 17:24:52 +00:00
Jeff Young 533d344e3f Honour pad falshing when colliding with DRC RTree. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6443
 2020-11-19 23:55:14 +00:00
Jeff Young 0d850f98cd Cleanup. 2020-11-19 22:48:18 +00:00
Jeff Young 6e0c58adec Include local clearances even if no implicit rule was found. 
The real test should be to apply it any time an explicit rule is
*not* found.

Fixes https://gitlab.com/kicad/code/kicad/issues/6426
 2020-11-19 22:48:18 +00:00
Jeff Young bfc4afc506 Restore the 5.1 NetTie hack. 
We really need to do first-class net ties....

Fixes https://gitlab.com/kicad/code/kicad/issues/6416
 2020-11-17 20:07:21 +00:00
Jeff Young 795e45836d Fix assert in DRC. 2020-11-17 17:41:57 +00:00
Jeff Young b2d86ec7c9 Don't double-check DRC clearances (a:b and b:a). 
Fixes https://gitlab.com/kicad/code/kicad/issues/6417
 2020-11-17 16:58:39 +00:00
Ian McInerney 8c08b861ab Cleanup some compiler and Coverity warnings 2020-11-15 21:41:38 +00:00
Jeff Young 1ce1e493d6 A rule zone is not really a BOARD_CONNECTED_ITEM. 
Or at least it shouldn't always be treated as one.

Fixes https://gitlab.com/kicad/code/kicad/issues/6382
 2020-11-15 20:23:15 +00:00
Jeff Young 7bd31d5237 Naming conventions. 2020-11-14 18:26:03 +00:00
Jeff Young 2eb71447e4 DRC RTree fixes. 
1) Don't collide against hidden text
2) Don't collide in both directions (a:b & b:a)
 2020-11-14 16:59:34 +00:00
Jeff Young bdbb68f813 MODULE -> FOOTPRINT. 2020-11-13 16:04:03 +00:00
Jeff Young 3451ac3088 PCB_MODULE_T -> PCB_FOOTPRINT_T 2020-11-13 15:16:24 +00:00
Jeff Young 63a54d003e More module -> footprint. 2020-11-13 15:16:24 +00:00
Jeff Young 9106cc19bf Yet another tranche of module -> footprint. 2020-11-13 15:16:24 +00:00
Jeff Young 52a46341db More module -> footprint. 2020-11-13 15:16:24 +00:00
Jeff Young f5443de7f9 D_PAD -> PAD. 2020-11-13 15:16:24 +00:00
Jeff Young 84dd5108ba Remove some "class_" prefixes from files. 2020-11-13 15:16:23 +00:00
Jeff Young f7333ad64a Update some classnames including archaic zone names. 2020-11-12 10:31:25 +00:00
Ian McInerney d88eaaf477 Fix various compiler and Coverity warnings 2020-11-11 00:41:02 +00:00
Jeff Young 81ea71fb80 More safety when fetching via sizes. 2020-11-07 18:50:30 +00:00
Jeff Young ae9afdd169 SNR. (Mostly for progammers, but a little for user messages.) 2020-11-02 16:20:00 +00:00
Jeff Young c351b3c31f Naming conventions. 2020-11-01 14:12:35 +00:00
Jeff Young f600450ee6 DRC_TEST_PROVIDER_COPPER_CLEARANCES is for copper only. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6248
 2020-11-01 14:12:35 +00:00
Jeff Young d2befca5af Clear subshapes before using again on a different layer. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6248
 2020-11-01 14:12:35 +00:00
Jeff Young 7676ba6f5d Coverity warning. 2020-11-01 14:12:35 +00:00
Jeff Young a9bf4bc6a6 Fix freed-memory crasher. 
While the DRC_ENGINE is not long-lived, it's test providers are,
and must be cleared for each use.
 2020-10-31 15:45:41 +00:00
Jeff Young 115fd1d7f3 Move track-to-zone testing to RTrees. 
Also implemente pad-to-zone testing and removes the control in the
GUI (now that it's fast).
 2020-10-31 15:45:41 +00:00
Jeff Young 1a1aef756e Reporting "actual" incompatible with exiting after first hit. 
But we're currently using this only as a rough collision check
anyway as it doesn't know the specific item-to-item clearance.
 2020-10-31 15:45:41 +00:00
Jeff Young 788a1e3bce Handle footprint zones in zone collision checks. 
Also fixes issue with progress reporter.
 2020-10-31 15:45:41 +00:00
Jeff Young cd93dbd324 Naming cleanup. 2020-10-31 15:45:41 +00:00
Jeff Young 8d4c9aeaac Fix Mac-style include. 2020-10-31 15:45:41 +00:00
Jeff Young d5addb692c Move a bunch of DRC tests to RTrees. 2020-10-31 15:45:41 +00:00
Jeff Young 776ea35040 Fix copy/paste error and some formatting issues. 2020-10-27 22:46:19 +00:00
Werni a7d5d1f091 Add more consts all over the place 2020-10-27 11:03:35 +00:00
Jeff Young 2e94be0855 Move geometric parts of Cleanup Tracks and Vias to RTree. 
Removes two separate O(n^2) traverses over the tracks.

Fixes https://gitlab.com/kicad/code/kicad/issues/6077
 2020-10-26 18:37:59 +00:00
jean-pierre charras c092e3f8b7 Fix a few minor Coverity warnings 2020-10-26 10:46:08 +01:00
Marek Roszko 1984581c46 Remove common.h from more headers 2020-10-25 22:29:53 -04:00
Jeff Young 45113f983b Fix test case. 
Silk tests were processing MODULE_Ts when they shouldn't have been.
 2020-10-25 23:19:39 +00:00
Jeff Young 2ee61f52ca Implement correct layer handling for keepout constraints. 2020-10-25 22:47:47 +00:00
Jeff Young 8c93fc76ae Don't require keepout zones to be named. 
insideArea() now takes A, B, a UUID or a zone name.  (Only the UUID
is new.)
 2020-10-25 21:08:09 +00:00
Jeff Young 5b1e1075a9 Allow an easy way for DRC tests to specify compound objects or not. 2020-10-25 20:24:47 +00:00
Jeff Young 386cefbe84 Do footprint keepouts by courtyard. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6162
 2020-10-25 18:17:58 +00:00
jean-pierre charras d6f91c810f Fix a few compil and Coverity warnings. 2020-10-25 10:02:07 +01:00
Marek Roszko e928b2d8fd Split EDA_UNITS out from common. 2020-10-25 00:02:52 -04:00
Jeff Young 7674d2ba91 Free allocated DRC structures when re-initializing. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6147
 2020-10-24 22:39:53 +01:00
David Shah 66bcfb3ffc drc_engine: Fix via type names 
There was a mismatch between the via type names used in the DRC engine
and the via type names defined in the class_track.cpp ENUM_MAP for
VIATYPE.

This fixes the discrepancy; which was breaking microvias altogether as
the route tool also uses the DRC code to determine the correct
diameter/drill (without this patch it was incorrectly using regular
dimensions for microvias.)
 2020-10-24 15:46:47 +00:00
Jeff Young 59f3fefd17 When polygonizing arcs don't use synthesized center and angle. 
Start, mid and end are the "real" properties and come with less
error.

Also collapses two arc polygonization routines into one.

Also fixes DRC checks to be cognizant of arc approximation error.

Fixes https://gitlab.com/kicad/code/kicad/issues/6039
 2020-10-23 23:55:45 +01:00
Seth Hillbrand 19bf594aa0 Remove unused point in polygon test 
There can be only one.
 2020-10-23 12:13:09 -07:00
Jeff Young 01ce881340 Honour NOT_IN_SCHEMATIC setting. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6137
 2020-10-23 17:27:18 +01:00
Jeff Young cce557b9ad Redo the board-edge-building logic to return better error reports. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6119
 2020-10-22 21:29:04 +01:00
Jeff Young 41fd8293e8 Don't apply clearance to keepout zones. 
Also improves the clearance and keepout reporting.

Fixes https://gitlab.com/kicad/code/kicad/issues/6118
 2020-10-22 21:29:04 +01:00
Jeff Young 9ff49277e1 Add implicit rule generation for keepout areas. 
Also implements collision detection for SHAPE_POLY_SET.

Fixes https://gitlab.com/kicad/code/kicad/issues/6105
 2020-10-22 10:41:21 +01:00
Seth Hillbrand 4085757aeb Remove beginning/ending spaces in translations 
Adding space padding makes translations more difficult by increasing
string counts
 2020-10-20 12:08:04 -07:00
Jeff Young 18f9f3cf0b Add curved track support to track-to-zone DRC. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6039
 2020-10-20 13:38:09 +01:00
Wayne Stambaugh 8ff51d8899 Eeschema: add schematic sheet page number. 
The groundwork has now been laid for per sheet instance data.  Initially
this only supports sheet page numbers but could be expanded to include
other per sheet instance information.

ADDED: Support for user defined schematic page numbers.
 2020-10-19 14:05:45 -04:00
Jeff Young c5d45f8a78 Move DRC dialog to same DRC rule reporting mechanism as inspectors. 2020-10-17 20:40:05 +01:00
Jeff Young 6e54856e67 Don't halt other tests when one test's max is reached. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6035
 2020-10-17 12:13:04 +01:00
Jeff Young 1b2168af1e Don't throw implicit rules out after failing to compile user rules. 2020-10-16 12:44:20 +01:00
Jeff Young eea7957e16 Inform user of bad DRC rules when filling zones. 
ADDED: facility for hypertext links in infobar.

Also made use of this for via constraint errors when routing.

Fixes https://gitlab.com/kicad/code/kicad/issues/5800
 2020-10-16 12:44:20 +01:00
Jeff Young 6b7749658e Report all implicit rules for resolution reports. 2020-10-15 20:53:27 +01:00
Jeff Young ebd5dc81cc Fix some more cases of malformed syntax crashing the compiler. 
Fixes https://gitlab.com/kicad/code/kicad/issues/6016
 2020-10-15 18:32:52 +01:00
Jeff Young 5ac17288a9 Work around missing copy constructor for PCB_SHAPE. 
Also introduces performance enhancements so that single closed shapes
for board edges don't eliminate the effectiveness of the RTree.

Fixes https://gitlab.com/kicad/code/kicad/issues/5990
 2020-10-15 11:38:18 +01:00
Jeff Young 1d93effa14 Don't build RTrees if test results will be ignored. 2020-10-14 15:56:32 +01:00
Jeff Young f220e83de6 Board edges have no width. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5990
 2020-10-14 15:56:32 +01:00
Marek Roszko 2c86363aa0 Relocate the page_layout includes to a page_layout folder 2020-10-13 20:33:33 -04:00
Jon Evans cb1d416e5a Use settings keys, not error codes, for ERC/DRC reports 
Error codes can shift around if the enum ordering is
not maintained, which is more fragile than the settings
key which should never be changed after a new code is
created.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/6001
 2020-10-13 18:03:07 -04:00
Jeff Young 3fc1a0c314 Fix faulty copper-checking logic. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5978
 2020-10-13 16:32:54 +01:00
Jeff Young 2e6968e7eb Board edges tester also needs to check silk text for visibility. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5989
 2020-10-13 00:58:38 +01:00
Marek Roszko 83d231cd49 Fix test under msvc 2020-10-12 19:47:36 -04:00
Jeff Young 8c4197db2a Netclass track widths and via sizes are opts, not mins. 2020-10-13 00:34:10 +01:00
Jeff Young cd1a5ed6fb Implement progress reporting for DRC RTree. 
Also fixes a bug in silk-to-mask checking which wasn't checking
zones on the mask layer.

Also a perfomance fix for the DRC RTree to use a hash table (std::map)
instead of a std::set for keeping track of known collisions.

Fixes https://gitlab.com/kicad/code/kicad/issues/5851
 2020-10-13 00:03:58 +01:00
Jeff Young 5afae757ff Remove silk_clearance == 0 hack now that we have implied rules. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5977
 2020-10-12 21:13:26 +01:00
Jeff Young af90642440 Hook board edge clearance constraints up to zone filling. 
Also hooks them up to the clearance resolution reporter, and makes
some general improvements to reporting.

Fixes https://gitlab.com/kicad/code/kicad/issues/5947
 2020-10-12 18:31:00 +01:00
Jeff Young 32dffd27ab Add silk clearance to board setup constraints. 2020-10-12 18:31:00 +01:00
Jeff Young 1bcefe420a Move compound graphics tests back out to the shared path. 2020-10-12 11:46:08 +01:00
Jeff Young 72f6127e53 Clean up terminology so it matches the user message better. 2020-10-12 00:14:32 +01:00
Jeff Young 8e70381be3 Don't try and infer optimum widths for board minimums. 
It doesn't work well with sorting the implicit rules by clearance.

Fixes https://gitlab.com/kicad/code/kicad/issues/5951
 2020-10-11 17:17:21 +01:00
Jeff Young af28ef9d56 Add silk clearance checking to Resolve Clearances... 
Also fixes a bug in order of RTrees in silk collision checker.
 2020-10-11 14:18:11 +01:00
Jeff Young 42eecdfd3a Collapse silk constraints down to one. 
Also updates the rule syntax help and code-completion with a bunch
of diff-pair and other stuff that hadn't been updated yet.
 2020-10-11 13:19:23 +01:00
Jeff Young bcebb19665 Add implied diffpair netclass rules. 2020-10-11 13:19:23 +01:00
Jeff Young 22cde88ba9 Allow chamfering/filleting of zone/board edge intersections. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5947
 2020-10-10 23:09:43 +01:00
Jeff Young 04c4012ee6 Make track/via sizes UI more predictable and compatible with DRC. 
Two main changes: netclass values need to go through the DRC engine
so they can interact with other rules.  They're also now dependent
on the layer being routed as well as the start object.

Also make the controls adjust to each other better.  For instance,
copy-track-width needs to turn off when you select a particular
track width, and a particular track width needs to zero out when
you choose copy-track-width.

Fixes https://gitlab.com/kicad/code/kicad/issues/5951
 2020-10-10 19:32:30 +01:00
Jeff Young fdeb340d21 Defensive code against missing nets. 
Also adds net re-parenting code to Repair Board.

Fixes https://gitlab.com/kicad/code/kicad/issues/5935
 2020-10-10 16:54:19 +01:00
Jeff Young 90baed7e82 Fix typo of transposed semi-colon and comma. 
Also eases translation of strings while we're here.

Fixes https://gitlab.com/kicad/code/kicad/issues/5933
 2020-10-10 12:25:22 +01:00
Jeff Young 1fc94c7a2d Fix printf arg mismatch. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5933
 2020-10-09 13:57:49 +01:00
Jeff Young 0c7630f8b4 Get rid of wxWidgets assert. 2020-10-09 00:31:29 +01:00
Jeff Young 4f2e574f4b Move IsADiffPair to drc_engine.cpp for now. 
Otherwise we have to include drc_test_provider_diff_pair_coupling.cpp
in CVPCB, which isn't ideal either.

I'll let Tom figure out the best plan going forward, but this should
at least get things compiling/linking again.
 2020-10-09 00:05:22 +01:00
Jeff Young 6550e01318 Sort synthetic netclass rules by min clearance. 
This way when 'A' and 'B' have different netclasses the largest will
fire (rather than just a random one of the two).

Fixes https://gitlab.com/kicad/code/kicad/issues/5926
 2020-10-08 23:41:27 +01:00