The DRC annular ring width test failed to take into account that a pad
could be contained inside another pad having the same number (thermal
vias for example) which changes the effective annular width of the pad
contained within another pad. A test was added to calculate the effective
annular ring width in this case.
Added some PNS log viewer helper and test code to the PNS playground QA
utility for testing the effective pad annular width code.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17485
(cherry picked from commit a508f2e716)
The connectivity routine would consider symbols, overwriting unused
subgraphs for pins that were not in the change list. This is resolved
by updating the full connectivity to only use pins in the graph since
symbols are not connected independently.
In the process of adding QA tests for this change, additional issues
with the schematic QA were discovered. Specifically, we were not
properly setting the root sheet UUID. This was partially masked by a
const_cast setting of the RefDes in sch_symbol when called the RefDes
getter. This exposed the fact that our QA ERC numbers did not match the
schematic editor stand alone ERC numbers. So the test value for one
check needed to be updated
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17528
(cherry picked from commit a9f35ba42e)
Even if there are no other segments in the line chain, we still should
check for arc connections in cases of individual arcs on a line chain
(cherry picked from commit 6b915049d1)
The clearance between two zones could be rather slow. This was in part
to trying to do triangle-triangle collisions between zones when we only
need outline collision and in part to the shape_line_chain collision
routine. The shape_line_chain collisions don't need to recreate
segments on each iteration and should instead create them once and using
this to check all collisions
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17327
(cherry picked from commit 3cc1617f5a)
When we add vertices to the tesselation routines, we cannot reuse these
without the original vertex points.
It may be possible to copy and modify the vertices from the hint data so
that they are properly positioned but naive attempts (moving based on
first point) did not work, so for now, we disable the hint cache when
the vertex sizes do not match as this prevents OOB access
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17621
(cherry picked from commit 06b199fd41)
Polygon intersections happen against the original outline, not against
the currently remaining polygon. This avoids pathalogical cases
Adds new simplification system to avoid duplicated points
Adds new edge-splitting algorithm to provide additional fall-back
Verifies that polygon cuts do not swap holes for outlines (negative
area)
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17559
(cherry picked from commit c3f6a84d66)
These need to be re-done in a way that is more
tolerant of the inherent instability/noise in
the simulated circuits (or more ideally, changed
to test a particular thing that can be more
well-defined rather than just simulating a circuit
and seeing if the numbers come out a certain way)
The IO_RELEASER is a thin-wrapper around a std::unique_ptr, but done
this way to allow easier addition of a custom deleter in the future if
something needs to call back into the IO_MGR.
Jon Evans
Wayne Stambaugh
Alex Shvartzkop
Seth Hillbrand
Mike Williams
Roberto Fernandez Bautista
Jeff Young
Marek Roszko
jean-pierre charras
John Beard
Ian McInerney