This adds a check for contiguous board outlines to the DRC. It also
uses the calculated outline to ensure that traces are not crossing the
outlines.
Fixes: lp:1648055
* https://bugs.launchpad.net/kicad/+bug/1648055
... and GetMsgPanelInfo.
Step 4 in the g_UserUnit eradication effort.
Also removes a couple of conversion routines that were close
enough to extinction.
(cherry picked from commit c75da51)
The old item pointers (which aren't safe to keep around) were
removed in favour of opaque references (void*) which are then
compared against existing items when needed.
Also improves brightening by brightening the whole footprint
(ie: its pads, drawings, reference and value) rather than just
its target cross.
(cherry picked from commit 30e90b0)
Pads count all pads/pins on the board including unconnected and NPTH.
Nodes count only the pads that can connect to a net and are therefore
routable. These were being calculated as the same number (displayed in
the info bar at the bottom of the screen)
m_Zone is a fully deprecated list of SEG_ZONE items (similar to TRACK), used to fill copper zones in *very old* boards.
it is even unlikely there are still boards that use them.
So it should be removed one day.
Moved a DRC function (BOARD::Test_Drc_Areas_Outlines_To_Areas_Outlines)
from BOARD class to DRC (DRC::TestZoneToZoneOutline). Added BOARD_COMMITs
to handle marker visibility updates.
Fixes: lp:1619124
* https://bugs.launchpad.net/kicad/+bug/1619124
Now the heirarchical sheet selection feature includes tracks that belong
to a net spanning multiple sheets, but only by doing a logical connection
from the pads of the modules. This is to be able to select connections
between components on the same sheet. For example if the sheet contains a
star power connection or something similar, then most of the sheet local
connections will now also be included.
- support for background color setting
- removed several global config settings (such as g_Drc_On)
- wrapped most of global config settings in PCB_GENERAL_SETTINGS class
- reorganized PCB general options dialog to clearly mark which options concern only the legacy canvas
- new GAL feature for legacy users: double-click (or E) to change track width available as an option.
Fixes: lp:1530543
* https://bugs.launchpad.net/kicad/+bug/1530543
Fixes: lp:1707145
* https://bugs.launchpad.net/kicad/+bug/1707145
Fixes: lp:1698697
https://bugs.launchpad.net/kicad/+bug/1698697
The incorrect method ZONE_CONTAINER::AppendCorner() is also fixed:
It was expecting the corner must be added to the main outline, but this is a false expectation:
it can be added to a hole inside the zone outline.
BOARD::GetBoundingBox() now directly calls BOARD::ComputeBoundingBox()
and there is a new method BOARD::GetBoardEdgesBoundingBox() used for
call sites that needed to use ComputeBoundingBox( true ) in the past.
This allows COMMON_TOOLS to implement ZoomFitScreen without knowledge
of the BOARD class.
eeschema now supports arbitrary colors for all object types, and
pcbnew does in GAL canvas. When switching from GAL to legacy canvas,
pcbnew will convert colors to the nearest legacy color.
Add some consts to "getters" in this class.
Remove const from return type of static return-by-value getter - this
has no effect on the caller except disabling move operations and forcing
copy operations.
fix incorrect calculation when a small segment at the end of the track was inside a pad: it was not taken in account.
Fix also the len die values not always taken in account (references to pads at end of track not always stored)
This is a partial fix of bug 1628585.
*) Extend SWIG support deeper into the BOARD class.
*) Move swig *.i files into a directory identified for SWIG, in preparation
for a parallel universe involving Phoenix's SIP.
*) Move swig files which will be common to both eeschema and pcbnew into
common/swig.
*) Sketch out a "common" python module, and plan on dovetailing that into a
libkicad_shared.{dll,so}
*) Add common/swig/ki_exceptions.i and define a macro HANDLE_EXCEPTIONS()
which is to be applied to any function which needs C++ to python
exception translation.
*) Move the test for SWIG tool into top level CMakeLists.txt file for use
in all python modules beyond pcbnew, i.e. eeschema and common.
*) Add SWIG_MODULE_pcbnew_EXTRA_DEPS which generates a better Makefile, one
which rebuilds the swig generated *.cxx file when one of its dependencies
change.
*) Re-architect the board.i file so that it can be split into multiple *.i
files easily.
*) Make some KIWAY from python progress, in preparation for Modular KiCad
phase III.
Seth Hillbrand
jean-pierre charras
Tomasz Włostowski
Jeff Young
Maciej Suminski
Kristoffer Ödmark
Wayne Stambaugh
Jon Evans
John Beard
Simon Richter
Dick Hollenbeck