Commit Graph

59 Commits

Author SHA1 Message Date
Jeff Young eae85742cc Don't report reasonable solder mask bridges in a net-tie footprint. 2024-06-15 15:57:13 +01:00
Jeff Young 8cddd40fc9 Check mask apertures on the mask layer.
(Otherwise testing A:B and B:A will add items to the
m_maskApertureNetMap cache on different layers.)
2024-06-14 22:55:40 +01:00
Jon Evans 5fc0f1f51e ADDED: Independent control of front/back via tenting 2024-06-11 21:50:25 -04:00
Seth Hillbrand 02cdb0c6b9 Mask aperture pads can have multiple layers
But as long as they don't have copper, we should treat them as mask
apertures
2024-03-03 20:56:39 +00:00
jean-pierre charras 57efde1bbb Pcbnew: rename ZONE* m_SolderMask to m_SolderMaskBridges
(It is a container to build bridges on solder mask layers by DRC, not real zone)
Disable also this special zone selection by adding it in
PCB_SELECTION_TOOL::itemPassesFilter
2023-10-13 09:57:21 +02:00
Alex Shvartzkop d7863b09c5 Move CORNER_STRATEGY out of SHAPE_POLY_SET. 2023-10-06 15:42:50 +03:00
Mike Williams 37837dc392 PCB: introduce PCB_FIELD_T 2023-06-20 18:34:52 +00:00
Jeff Young f5791f5dc6 Left some fixes out of previous commit. 2023-05-29 16:22:24 +01:00
Jeff Young c71cf21e2f Use rendered text to generate bounding box for knockout text.
Don't open-code knockout text shape generation in several different
places.

Make sure triangulated knockout text gets clearance added when
specified.

Collapse duplicated footprint text item plot routine (they're no
longer any different from plotting pcb text items).
2023-05-28 17:20:11 +01:00
Jeff Young bbd6c80507 Collapse FP_* down into their PCB_* equivalents. 2023-03-31 22:57:46 +01:00
Jeff Young 9976b9ce8c Only report on clearances where there was one defined.
If it's 0, it's just a straight-up collision.
2023-03-26 20:46:59 +01:00
Jeff Young 0266d03f79 Run SILK_CLEARANCE rules on mask layer when testing silk-to-mask clearance.
This allows custom rules to be authored without firing the auto-generated
rule from Board Setup > Silk Item Clearance (which should be only for silk-
to-silk clearances).

Fixes https://gitlab.com/kicad/code/kicad/issues/14417
2023-03-26 20:42:41 +01:00
Jeff Young 04f6f04bed Test silk/mask collisions on the correct layer.
Fixes https://gitlab.com/kicad/code/kicad/issues/14417
2023-03-26 16:27:05 +01:00
Jeff Young c5e66361db Allow solder mask bridges between net-tie-group pads.
Fixes https://gitlab.com/kicad/code/kicad/issues/14412
2023-03-25 16:11:07 +00:00
Jeff Young 5427100539 Handle plotting of text on solder mask layer.
Admittedly this is an odd thing to do, but we should still be internally
consistent, and it has come up in customers' files.

Fixes https://gitlab.com/kicad/code/kicad/issues/14226
2023-03-12 21:21:15 +00:00
Seth Hillbrand 90a388571e Fix copy-pasta
testing 'othervia' for dynamic_cast success needs to use `othervia`
rather than `via` which might still be null

Fixes Sentry issue KICAD-5K
2023-02-10 13:33:21 -08:00
Jeff Young 50e9685490 Check for tented vias before expanding solder mask.
Fixes https://gitlab.com/kicad/code/kicad/issues/13705
2023-01-30 17:56:35 +00:00
Jeff Young 00e2bbac5a Special-case net-ties for solder mask bridging.
Fixes https://gitlab.com/kicad/code/kicad/issues/13646
2023-01-24 11:33:08 +00:00
Jeff Young 492e6548ff If item is on mask layer then we won't call it again on copper layer.
Fixes https://gitlab.com/kicad/code/kicad/issues/13075
2022-12-10 13:51:00 +00:00
Wayne Stambaugh 6a0db3e7e2 Fix Coverity warnings. 2022-10-26 14:39:44 -04:00
Jeff Young d16b23d16e Name shortening and line-break reduction. 2022-10-21 18:41:39 +01:00
Jeff Young 098e96f1c7 Use more precise formatting in DRC messages when less precise values are identical.
Fixes https://gitlab.com/kicad/code/kicad/issues/12587
2022-10-06 22:18:53 +01:00
Jeff Young e49de68a59 Implement a more durable zone bounding box caching strategy.
Fixes https://gitlab.com/kicad/code/kicad/issues/10821
2022-10-01 22:10:43 +01:00
Jeff Young 503385f52e Don't use FindNamedPad for net-tie logic. It only reutrns the *first*
pad of a given number.

Also improves other DRC logic to tighten up the net-tie rules now that
we know which pads are allowed to short with which other pads.

Also removes the "Overlapping pads" DRC violation now that we know
whether or not overlapping pads in a net-tie footprint constitute a
short.

Fixes https://gitlab.com/kicad/code/kicad/issues/12506
2022-09-25 17:38:31 +01:00
Jeff Young 64a6fc0fd4 Push UNITS_PROVIDER down into a low-level mixin.
This allows us to also construct cheap UNIT_PROVIDERs for specific
tasks when necessary.
2022-09-19 17:10:59 +01:00
Mark Roszko b00178adb3 Nuke base_units from orbit 2022-09-16 04:38:10 +00:00
Jeff Young 3534cfbba8 Allow a single net collision with a free pad. 2022-09-06 13:59:52 +01:00
Jeff Young b4492e0bd2 More EDA_RECE yeetage. 2022-08-31 17:19:50 +01:00
Jeff Young 2dc6300501 Move EDA_ITEM bounding boxes to BOX2I. 2022-08-31 10:16:55 +01:00
Jeff Young 1a672aba56 Fix a couple of DRC bugs where the bbox wasn't inflated for largestClearance.
Also removes a case of double-testing a pad with a non-plated hole.
2022-08-26 13:22:57 +01:00
Jeff Young 909358e643 Make sure pair caches are layer-specific where they need to be. 2022-08-26 13:22:57 +01:00
Jeff Young 86944c4f9f Marginal performance improvements. 2022-08-26 13:22:57 +01:00
Jeff Young 792d7babe3 Performance (std::map -> std::unordered_map) and commenting. 2022-08-22 12:43:57 +01:00
Jeff Young 46df421064 ADDED defined pad groups for net-tie footprints
Each pad group is allowed to short nets with other pads in its group.

Legacy footprints with the "net tie" keyword hack will get a single
group auto-created with all the footprint's pads in it.

DRC and the router now allow a track to collide with copper graphic items
while entering a net-tie pad as long as the closest point in the collision
is within the pad.

DRC (and the footprint checker) now check for copper items in the
footprint shorting pads which are not in the same pad group.

Fixes https://gitlab.com/kicad/code/kicad/issues/2265
2022-08-19 18:54:20 +01:00
Jeff Young 86938aa425 Read, write and process the board-wide Allow soldermask bridges in FPs. 2022-08-14 22:56:29 +01:00
Jeff Young 96f01d33c8 Performance improvements.
1) Move a bunch of std::map's to std::unordered_map to get constant-time
look-ups
2) Lengthen progress-reporting intervals to spend more time doing work
and less time talking about it
3) Reverse order of SHAPE_LINE_CHAINs in thermal intersection checks to
make (much) better use of bbox caches
4) Don't re-generate bboxes we already have
5) Fix some autos that weren't by reference (and were therefore copying
large datasets)
6) Rename delta progressDelta so it's easier to search for in future
7) Get rid of a few more autos (because I don't like them)
8) Pass large items to lambdas by reference

Fixes https://gitlab.com/kicad/code/kicad/issues/12130
2022-08-03 11:59:42 +01:00
Jeff Young bf5e649e44 Fix log errors in new solder masking checking code. 2022-07-23 09:26:04 +01:00
Jeff Young a2c002e1da Improve solder mask aperture testing.
1) For solder mask apertures report both the aperture and both
exposed items.

2) Don't process solder mask apertures in footprints with the
"bridging allowed" flag set.

Fixes https://gitlab.com/kicad/code/kicad/issues/12064
2022-07-22 23:06:07 +01:00
Jeff Young 82ebc247b8 More performance enhancements for DRC. 2022-06-18 19:47:11 +01:00
Jeff Young 97b0005780 More caching for DRC.
Also fixes a bug where some physical clearance tests would be run even
if the clearance was 0 (or if the rule was set to IGNORE).
2022-06-17 23:58:31 +01:00
Seth Hillbrand 5327b10064 Remove shared wxString instance in DRC
Threaded DRC access will write to this string, re-allocating the memory
without any synchronization between threads using the string.  Comment
adding this listed performance as a reason for using shared strings.
Measured performance does not seem noticeably different in either case,
even with high-error count boards.  If there is a case where the
performance is limiting, we can replace these wxStrings with
std::wstring and utilize fmt

Fixes https://gitlab.com/kicad/code/kicad/issues/9888
2022-06-15 16:46:03 -07:00
Jeff Young dfdedfa605 Fix some issue with NPTH pads with holes same size as pad. 2022-05-06 00:06:00 +01:00
Jeff Young db0b733be5 Clear DRC caches before running soldermask tests again.
Fixes https://gitlab.com/kicad/code/kicad/issues/10922
2022-03-12 19:44:34 +00:00
Jeff Young 89e61ff73b More performance enhancements for DRC. 2022-03-12 14:17:52 +00:00
Jeff Young 6f555b6258 wxT() and some cleanup in DRC. 2022-03-11 23:19:16 +00:00
Jeff Young ae307e1b34 Parallelize DRC triangulation, keepout processing, and sliver checking.
Also fixes issue with adding fractured polygons in sliver checking which
slowed the board from hell down to less than a crawl.
2022-03-11 20:52:11 +00:00
Jeff Young 79c7859052 Apply a19d9105f0 to zone case as well.
Also improves on the previous comments.

Fixes https://gitlab.com/kicad/code/kicad/issues/10922
2022-02-21 13:48:34 +00:00
Seth Hillbrand a19d9105f0 Fix SolderBridge check to only check across multiple
We should not generate an error when overlapping a single copper element
with a soldermask that is not associated with copper.

Fixes https://gitlab.com/kicad/code/kicad/issues/10906
2022-02-18 11:47:28 -08:00
Jeff Young 2172810600 Performance: better sharing of zone fills. 2022-02-15 19:19:03 +00:00
Jeff Young 5ce559176d Overhaul the font metrics calcs for overbar, italics and bboxes. 2022-02-07 17:36:40 +00:00