8420fcc33b
Cleanup.
2020-09-13 17:08:24 +01:00
ce2937a399
Move rest of DRC tests to kicad.
2020-09-11 23:14:12 +01:00
5424d6fa09
Move new clearance tests into kicad.
2020-09-11 21:26:57 +01:00
cc86630f11
Start pulling new DRC engine into Kicad.
2020-09-11 16:04:11 +01:00
3b3af5327f
CADSTAR PCB Archive Importer: Move code into common/plugins and pcbnew/plugins folders
2020-09-08 21:21:20 +00:00
4c2f38f1ad
CADSTAR PCB Archive Importer: Parse LIBRARY section + code refactoring
...
code refactoring:
- Renamed CADSTAR_COMMON to CADSTAR_ARCHIVE_COMMON
- Renamed CPA_FILE to CADSTAR_PCB_ARCHIVE_PARSER
- Made CADSTAR_PCB_ARCHIVE_PARSER a derived class of CADSTAR_ARCHIVE_COMMON
- Moved all structures in cadstar_pcb_archive_parser.h/.cpp to be defined inside CADSTAR_PCB_ARCHIVE_PARSER class
2020-09-08 21:21:20 +00:00
adbd94553d
drc_proto: all tests now supported in drc_proto. Not tested yet!
2020-09-08 01:31:42 +02:00
a03fb7a9a8
Altium: Refactor and add initial structure for schematic importer
...
altium: move pcbnew/altium2kicadpcb_plugin -> pcbnew/plugins/altium
See: https://gitlab.com/kicad/code/kicad/-/issues/4412
2020-08-23 19:01:08 +00:00
35e45c5917
drc_proto: edge clearance wip
2020-08-13 14:50:59 +02:00
7c455f2357
First pass at DRC RTree functionality
...
This implements a copper-layer RTree with functions for iterating over
the elements in a copper layer and providing Nearest Neighbor returns
for BOARD_CONNECTED_ITEMS
2020-08-11 16:52:29 -07:00
128ae8b49e
drc_proto: working on hole size/track width checker
2020-07-29 23:14:34 +02:00
e9d37dd7ce
drc_proto: implement QueryWorstConstraint
2020-07-05 22:44:38 +02:00
1cabc1bc0f
qa/drc_proto: rework common clearance code into base class, start working on hole clearance test refactor
2020-07-05 22:44:38 +02:00
085698d17c
drc_proto: wip
2020-07-05 22:44:38 +02:00
Jeff Young
Roberto Fernandez Bautista
Tomasz Wlostowski
Thomas Pointhuber
Seth Hillbrand