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37 Commits

Author SHA1 Message Date
Jeff Young 1ec70d30af Cherry-pick some 7.0 Clearance Resolution improvements. 
6.0 will be in the field for a long time, and the better the debugging
tools we have available the less costly it will be to maintain.

Fixes https://gitlab.com/kicad/code/kicad/issues/8961
 2021-08-15 19:03:58 +01:00
Jeff Young faa1ff4ec6 Add false-negative DRC tests (and fix first bug found by them). 2021-07-31 16:41:44 +01:00
Jeff Young 0fb864d596 Pull some name changes back from 7.0 to ease merging. 2021-07-21 20:58:59 +01:00
Jeff Young 00ed75b891 Fix DRC performance with multi-layer keepout zones. 
The main issue was a parameter mismatch which caused On^2 behaviour
for zone layers.

But there are several other performance optimizations here, along
with status bar updating for zones while running the dissallow test.

Fixes https://gitlab.com/kicad/code/kicad/issues/8521
 2021-06-02 14:11:43 +01:00
Marek Roszko 21fde9b629 enum class PCB_SHAPE_TYPE_T 2021-04-30 22:36:12 -04:00
Jeff Young e5d029af6b Margin layer missing from some edge clearance tests. 
Fixes bug reported on KiCad Forums.
 2021-04-21 21:58:47 +01:00
Jeff Young 6d6765cdaf Improve DRC status reporting. 
1) Don't report on tests not run.
2) Don't cancel subsequent tests because the current test didn't
have any constraints
3) Exit a little bit quicker when cancelled

Fixes https://gitlab.com/kicad/code/kicad/issues/7724
 2021-02-27 13:44:45 +00:00
Jeff Young 6272b48481 Make sure layer gets passed in to rules evaluation. 2021-02-08 14:53:49 +00:00
Jeff Young 09eb4b35c6 Make sure footprint edges get checked. 
Fixes https://gitlab.com/kicad/code/kicad/issues/7267
 2021-01-25 13:20:16 +00:00
Jeff Young 2d8cac658e Allow negative clearances to signal supression of DRC test. 2021-01-23 00:10:01 +00:00
Jeff Young 018c17399d SNR. 2021-01-01 23:17:49 +00:00
Jeff Young 1cae0b6c08 Make sure board edges have 0 width. 
When we divide up a rectangle or polygon (for better RTree usage)
we need to make sure the individual segments also have their widths
zeroed out.

Fixes https://gitlab.com/kicad/code/kicad/issues/6482
 2020-11-24 23:49:28 +00:00
Jeff Young ff3bd7e72a Fix a crash bug in DRC, and equate Margin to Edge.Cuts. 2020-11-20 21:22:27 +00:00
Jeff Young ae9afdd169 SNR. (Mostly for progammers, but a little for user messages.) 2020-11-02 16:20:00 +00:00
Jeff Young c351b3c31f Naming conventions. 2020-11-01 14:12:35 +00:00
Jeff Young 1a1aef756e Reporting "actual" incompatible with exiting after first hit. 
But we're currently using this only as a rough collision check
anyway as it doesn't know the specific item-to-item clearance.
 2020-10-31 15:45:41 +00:00
Jeff Young d5addb692c Move a bunch of DRC tests to RTrees. 2020-10-31 15:45:41 +00:00
Jeff Young 5b1e1075a9 Allow an easy way for DRC tests to specify compound objects or not. 2020-10-25 20:24:47 +00:00
Seth Hillbrand 4085757aeb Remove beginning/ending spaces in translations 
Adding space padding makes translations more difficult by increasing
string counts
 2020-10-20 12:08:04 -07:00
Jeff Young 5ac17288a9 Work around missing copy constructor for PCB_SHAPE. 
Also introduces performance enhancements so that single closed shapes
for board edges don't eliminate the effectiveness of the RTree.

Fixes https://gitlab.com/kicad/code/kicad/issues/5990
 2020-10-15 11:38:18 +01:00
Jeff Young f220e83de6 Board edges have no width. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5990
 2020-10-14 15:56:32 +01:00
Jeff Young 2e6968e7eb Board edges tester also needs to check silk text for visibility. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5989
 2020-10-13 00:58:38 +01:00
Jeff Young 42eecdfd3a Collapse silk constraints down to one. 
Also updates the rule syntax help and code-completion with a bunch
of diff-pair and other stuff that hadn't been updated yet.
 2020-10-11 13:19:23 +01:00
Jeff Young f620f8bdd3 Report silk/edge collisions. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5854
 2020-10-06 13:20:52 +01:00
Jeff Young 37906511f5 Class renaming. 
DRAWSEGMENT  -> PCB_SHAPE
EDGE_MODULE  -> FP_SHAPE
TEXTE_PCB    -> PCB_TEXT
TEXTE_MODULE -> FP_TEXT
 2020-10-05 11:55:33 +01:00
Jeff Young 7a4900b8dc PCB_LINE_T -> PCB_SHAPE_T and PCB_MODULE_EDGE_T -> PCB_FP_SHAPE_T 
Also updated footprint text and zone types for consistencey.
 2020-10-04 16:49:04 +01:00
Mikolaj Wielgus 400c15b8eb Add mils to units, remove useMils variables 2020-10-03 20:06:56 +00:00
Jeff Young bf67648562 Support optional location reporting in SHAPE collisions. 
Also fixes a few bugs in the collision routines.
 2020-09-28 23:28:33 +01:00
Tomasz Wlostowski 2bacfe8202 drc: use R-Tree intersection for silk clearance tests 2020-09-27 16:45:46 +02:00
Jeff Young 67b5d24995 Support ESC & Cancel for DRC. 
Fixes https://gitlab.com/kicad/code/kicad/issues/5698
 2020-09-18 22:14:00 +01:00
Jeff Young a3d65a2b43 Smoother progress reporting for DRC checks. 
Also moves Messages tab out to an overlay, and restores the longer
messages now that messages are no longer a textbox in the upper right.
 2020-09-17 20:13:39 +01:00
Jeff Young e2e229da96 Finish exorcising the old DRC system. 
This moves the various BOARD_ITEM calls to the new system, and make
the DRC_ENGINE long-lived so that it can field those queries.
 2020-09-15 20:15:46 +01:00
Jeff Young 665212341d Cleanup (consistent naming, 100-char line width, message precision). 2020-09-15 12:07:31 +01:00
Jeff Young 514da2f886 Move DRC dialog to new DRC engine. 2020-09-14 22:39:36 +01:00
Jeff Young 748bee1bc7 Hook up netclasses and board minimums to new DRC engine. 
Improves implicit rule reporting.
Makes some internal names more consistent.
Moves DRC_REPORT to the test framework.
Removes priority (which isn't supported in the grammar)
 2020-09-13 17:08:24 +01:00
Jeff Young 5d9301d394 Adjust isErrorLimitExceeded so it can be used for severity==IGNORE. 2020-09-13 17:08:24 +01:00
Jeff Young 5424d6fa09 Move new clearance tests into kicad. 2020-09-11 21:26:57 +01:00
Renamed from qa/drc_proto/drc_test_provider_edge_clearance.cpp (Browse further)