Commit Graph

26 Commits

Author SHA1 Message Date
Tomasz Włostowski 6008abaad9 DRC connectivity check 2017-06-23 11:12:37 +02:00
jean-pierre charras 12b65cf56b Fix typo 2017-03-21 16:45:35 +01:00
jean-pierre charras 2637835a1e First version of courtyard overlap detection 2017-03-19 20:27:45 +01:00
jean-pierre charras b365f17e9f First draft of courtyard overlap detection. 2017-03-19 20:27:44 +01:00
Simon Richter 3a92db4312 DRC: Add test for via drill size
This test is only run when the via size itself is acceptable, to avoid
bigger changes to the codebase.
2016-08-24 22:17:21 -04:00
jean-pierre charras ebb967c46f Pcbnew: fix issues and potential issues when reading board files and mainly old board files, and enhance the DRC tests and Delete Single Pad Net option when reading a netlist:
* Delete Single Pad Net option does not delete the net if a zone use this net (i.e. is attached to this pad).
* pcb_parser accept now negative netcodes in zones (can happen with old files, which previously could crash Pcbnew)
* pcb_parser accept now files with incorrect or missing net count  (can happen with old files, which previously could crash Pcbnew)
* if a zone has a non-existent net name it now keep this net name, and DRC detect it (previously, the net name was lost, and the DRC did not tected this issue).
* Drc test: now detect a "dead" net, i.e. a net with 0 pads, but still used by a zone. It happens easily after a schematic modification, when a net disappears or is renamed.
2015-01-22 13:06:34 +01:00
Wayne Stambaugh c63459653a CvPcb: fix broken event ID for configuration button on toolbar.
* Remap configuration button on toolbar to launch footprint library table
  editor.
* Remove legacy footprint library path dialog from CVPCB_MAINFRAME.
* Remove unused event ID ID_CVPCB_CREATE_CONFIGWINDOW.
* Minor coding policy fixes.
2014-08-13 15:26:31 -04:00
unknown c8d69f19c8 Pcbnew: add drc test for texts on copper layer (only in full drc test, not in on line drc), from a patch sent by Simon Schumann
Add EDA_TEXT::TransformTextShapeToSegmentList function to export a list of segments used to draw/plot the text.
2014-08-13 17:47:02 +02:00
Dick Hollenbeck 6617ce58f3 Use factored SelectLibrary() from base class. Spelling and comments. 2014-01-27 00:41:40 -06:00
jean-pierre charras c029dc398b Eeschema: fix compatibility with old schematic files, which can contain markers.
Pcbnew: better test for allowed layers when creating/editing Dimensions and some other Graphic items
Drc: fix comments and messages for some drc tests.
To do: fix issues in active layer selection when creating a track and layer pair selection dialog
2013-09-11 17:30:21 +02:00
jean-pierre charras 018b080001 Pcbnew: Add keepout areas (Copper zones without tracks or/and vias).
This is *a work in progress*, so some features are missing, and/or could be modified.
Mainly keepout zones are not yet exported to autorouters, and pads are not taken in account.
Some code cleanup in polygon.*
2012-07-13 20:55:29 +02:00
jean-pierre charras e96f1aeb3d Remove valeur_param(), that does not work in Kicad Nanometer 2012-04-27 16:15:11 +02:00
Dick Hollenbeck b8a0ab4c52 switch to <> for includes from "" per conversation with Jean-Pierre and Wayne, adjust search paths 2012-01-22 22:33:36 -06:00
Wayne Stambaugh 4b853dedb4 Application name capitalization fixes.
* Correct all user strings and comments for the correct capitalization of
  application names according to JP.  They are KiCad, Pcbnew, CvPcb,
  Eeschema, and GerbView.
* Add a note the the user interface policy about the correct capitalization.
2011-09-30 14:15:37 -04:00
Wayne Stambaugh edd35b4e90 PCB common library header rationalization.
* All header files used to create the PCB common library now compile as
  stand alone code.  This prevents the need to define them in a specific
  order to make source code compile properly.  It should also now be
  possible to relocate the source code to build the common PCB library
  to a separate folder.
2011-09-23 09:57:12 -04:00
jean-pierre charras 5738d2960d removed in drawpanel an erroneous change (was made only for a test). drc code cleaning. cmakelist.txt changes in minizip. 2010-09-18 10:29:40 +02:00
dickelbeck 362b6b53f6 NETCLASS work, see CHANGELOG.txt 2009-09-10 15:22:26 +00:00
charras 92266a1986 Pcbnew: Added: in DRC tests: tests for vias min size and tracks min width.
Eeschema: code cleaning
2009-06-18 13:30:52 +00:00
charras 0f725ee2fc DRC: added test pads to holes (pcbnew). Others minor changes 2009-03-23 19:54:15 +00:00
dickelbeck 23785a1166 factored out ShowCoord() to use common operator << (wxString, wxPoint) 2008-05-05 19:54:21 +00:00
CHARRAS e9b3322fc0 On line DRC when creating a zone outline 2008-01-20 19:55:22 +00:00
CHARRAS e3a3d16af8 small bugs fixed. Added: Support for microvias (see changelog) 2008-01-12 20:31:56 +00:00
CHARRAS 6c3235c112 first DRC control about zone outlines. Needs improvements, but works 2008-01-10 20:53:41 +00:00
dickelbeck be015fdf24 copyright notice 2007-12-10 05:42:42 +00:00
raburton fe284db095 set eol-style native on new files 2007-12-09 12:59:06 +00:00
CHARRAS bffa0689f0 changes in file organisation and classes to prepare zone redesign 2007-12-09 12:55:53 +00:00