Various architecture upgrades to support this.
Creating a BOARD now requires a valid PROJECT, which caused
some (mostly transparent) changes to the Python API internals.
ADDED: Project local settings file
CHANGED: Board design settings are no longer stored in PCB file
CHANGED: Net classes are no longer stored in PCB file
CHANGED: Importing board settings now reads boards, not just projects
Fixes https://gitlab.com/kicad/code/kicad/-/issues/2578
Fixes https://gitlab.com/kicad/code/kicad/-/issues/4070
Fix Board.GetAllNetClasses() so it no longer creates a duplicate of the Default netclass in the design rules net classes list.
Fixes: lp:1803623
* https://bugs.launchpad.net/kicad/+bug/1803623
* Remove infinite recursion calls in footprint.i
* Extend DRAWINGS deque iterator to auto cast contained BOARD_ITEMS,
similar to what dlist implementation did.
Added new file connectivity.i to expose CONNECTIVITY_DATA to
python. enables access to d_pads from nets.
Added typemap to board_connected_item.i. since board_connected_item
doesn't use virtual inheritance, when returning a std::list of these
items, the typemap populates the return list with the child
types. This enables python scripts to use the full interface of those
classes (pad, track, zone)
Added typeinfo.i to enable passing a list of KICAD_T values to methods
GetNetItems. This list acts as a query filter. typeinfo.i is included
from pcbnew.i right after kicad.i (instead of in board.i like the
others) typeinfo.h is already being included kicad.i so to ensure the
typemap(s) are properly applied I put them next to each other.
The two new files (typeinfo.i and connectivity.i) were added to
pcbnew's CMakeLists.txt as dependencies.
*) Extend SWIG support deeper into the BOARD class.
*) Move swig *.i files into a directory identified for SWIG, in preparation
for a parallel universe involving Phoenix's SIP.
*) Move swig files which will be common to both eeschema and pcbnew into
common/swig.
*) Sketch out a "common" python module, and plan on dovetailing that into a
libkicad_shared.{dll,so}
*) Add common/swig/ki_exceptions.i and define a macro HANDLE_EXCEPTIONS()
which is to be applied to any function which needs C++ to python
exception translation.
*) Move the test for SWIG tool into top level CMakeLists.txt file for use
in all python modules beyond pcbnew, i.e. eeschema and common.
*) Add SWIG_MODULE_pcbnew_EXTRA_DEPS which generates a better Makefile, one
which rebuilds the swig generated *.cxx file when one of its dependencies
change.
*) Re-architect the board.i file so that it can be split into multiple *.i
files easily.
*) Make some KIWAY from python progress, in preparation for Modular KiCad
phase III.