Jeff Young
|
e5b50d90a7
|
Update DRC rules to new layer and disallow grammars.
Also adds support for hooking rules up to named zones.
Fixes https://gitlab.com/kicad/code/kicad/issues/2041
|
2020-08-07 21:49:36 +01:00 |
Qbort
|
9977299340
|
Fix compile errors in drc_engine.cpp and panel_setup_rules.cpp
|
2020-07-31 21:47:01 +00:00 |
|
Jeff Young
|
577c1be391
|
Report all DRC rule errors, not just the first.
|
2020-07-30 14:27:42 +01:00 |
Tomasz Wlostowski
|
128ae8b49e
|
drc_proto: working on hole size/track width checker
|
2020-07-29 23:14:34 +02:00 |
|
Tomasz Wlostowski
|
a504bd0795
|
drc_proto: don't launch DRC providers with empty/incomplete rule sets
|
2020-07-29 23:14:03 +02:00 |
|
Tomasz Wlostowski
|
8d9d3ff795
|
qa/drc_proto: debug level settable by env var
|
2020-07-29 23:14:03 +02:00 |
|
Tomasz Wlostowski
|
91b68e4578
|
drc_proto: follow up Jeff's changes in legacy DRC/board model
|
2020-07-29 23:14:03 +02:00 |
|
Tomasz Wlostowski
|
e9d37dd7ce
|
drc_proto: implement QueryWorstConstraint
|
2020-07-05 22:44:38 +02:00 |
|
Tomasz Wlostowski
|
1cabc1bc0f
|
qa/drc_proto: rework common clearance code into base class, start working on hole clearance test refactor
|
2020-07-05 22:44:38 +02:00 |
|
Tomasz Wlostowski
|
d57d5d73b2
|
qa: clearance test works and reports. about to do board outline clearance test
|
2020-07-05 22:44:38 +02:00 |
|
Tomasz Wlostowski
|
bd19892cd0
|
qa/drc_proto: clearance test seems to work with conditional rules, need to clean up & add reporting
|
2020-07-05 22:44:38 +02:00 |
|
Tomasz Wlostowski
|
085698d17c
|
drc_proto: wip
|
2020-07-05 22:44:38 +02:00 |