Commit Graph

177 Commits

Author SHA1 Message Date
jean-pierre charras ab58dbfced Pcbnew: Rework on Gerber ouput: allows choice between format 4.5 and 4.6. Fix a minor issue in Gerber layers attributes.
fix print issue when printing each layer on a separate page.
2014-07-04 16:22:38 +02:00
Dick Hollenbeck 1e7495e634 merge 2014-06-30 00:46:18 -05:00
Dick Hollenbeck 06bf0821b9 fix LSET() constructors, formatting 2014-06-29 15:33:29 -05:00
Dick Hollenbeck 4578ea8b9e 1) Add 32 Cu Layers.
2) Change from legacy Cu stack to counting down from top=(F_Cu or 0).
   The old Cu stack required knowing the count of Cu layers to make
   sense of the layer number when converting to many exported file types.
   The new Cu stack is more commonly used, although ours still gives
   B_Cu a fixed number.
3) Introduce class LSET and enum LAYER_ID.
4) Change *.kicad_pcb file format version to 4 from 3.
5) Change fixed names Inner1_Cu-Inner14_Cu to In1_Cu-In30_Cu and their
   meanings are typically flipped.
6) Moved the #define LAYER_N_* stuff into legacy_plugin.cpp where they
   can die a quiet death, and switch to enum LAYER_ID symbols throughout.
7) Removed the LEGACY_PLUGIN::Save() and FootprintSave() functions.
   You will need to convert to the format immediately, *.kicad_pcb and
   *.kicad_mod (=pretty) since legacy format was never going to know
   about 32 Cu layers and additional technical layers and the reversed Cu
   stack.
2014-06-24 11:17:18 -05:00
jean-pierre charras 9ee8dac056 Pcbnew, python console: make it not dockable (workaround to avoid the fact accelerator keys which are used in the main menu are not sent to the console, in docked mode).
Minor cosmetic enhancement.
2014-06-19 08:26:53 +02:00
Tomasz Wlostowski 4121c27269 Clang-alike lightweight RTTI for pcbnew + type casting cleanup. 2014-06-06 11:44:21 +02:00
jean-pierre charras d54ade9403 Rework on DXF export. 2014-05-17 21:29:15 +02:00
Lorenzo Marcantonio 3f2c0e1a8d TRACK/SEGVIA cleanup
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
2014-04-25 08:00:04 +02:00
jean-pierre charras 4374e25219 Plot functions: some enhancements in mirror mode (Pcbnew specific): boards are mirrored horizontally, and the page layout is no more mirrored, and therefore is always readable. 2013-12-06 19:31:15 +01:00
jean-pierre charras bb39956057 Fix minor bugs in cleanup dialog options and plot solder mask function (thanks to Lorenzo to locate these bugs) 2013-09-18 21:21:11 +02:00
jean-pierre charras 9af4ea4014 Add pl_editor_doc.icns, from Orson. Fix Bug #1217504 (bad look of Module Properties Dialog, 3D fields).
Add Dick's workaround in plot_board_layers.cpp to try to avoid crash in solder mask calculations, due to a bug in boost::polygon, in resize function.
2013-08-28 09:23:14 +02:00
Dick Hollenbeck efb34166ea *) retain grid origin in the BOARD and save it in legacy and kicad board files.
*) add hotkey for setting the grid origin as 'S', in board editor, module editor.
*) re-position the function interface for cursor movement from BASE_SCREEN into
   class EDA_DRAW_FRAME.  This is a prelude to getting rid of BASE_SCREEN or
   splitting it up.
2013-08-03 00:15:23 -05:00
jean-pierre charras 2e6969fe96 More work on CPOLYGONS_LIST class. 2013-05-08 20:20:58 +02:00
jean-pierre charras b2a76062c7 All: use CPOLYGONS_LIST, a typedef of std::vector<CPolyPt> to handle a Corners Polygons List.
This is a starting point of some code enhancements relative to polygons in Pcbew and 3D viewer.
2013-05-03 19:51:10 +02:00
Lorenzo Marcantonio 78e41187b3 Moved utilities for angles in trigo.h
New conversion routines and sin/cos implementation for angles in decidegrees
2013-05-02 20:06:58 +02:00
jean-pierre charras 4ac7dd5845 3D viewer: Modify yhe way board items shapes are built:
* All items shapes  are converted to polygons.
* Polygons are merged layer by layer (for calculation time reasons,zones are not merged)
* for copper layers, vias and pads holes are substracted from polygons (but, for calculation time reasons,  not inside zones areas).
* the look is better, mainly when displaying the copper thickness
* solder and paste layers are now shown in 3D viewer.
* the code was seriously cleaned (but still needs to be enhanced).
* Note this is a work in progress which needs refinements.
2013-05-01 21:01:14 +02:00
Lorenzo Marcantonio 9fd79dfa91 Implemented the LAYER_NUM typedef (LAYER was already taken as a class name...) to represent a layer number. 2013-03-31 15:27:46 +02:00
Lorenzo Marcantonio e0303a4558 - New typedef LAYER_MSK to encapsulate a layer bitmap
- Renamed ReturnMaskLayer to GetLayerMask (since it's a plain getter)
2013-03-30 18:24:04 +01:00
Wayne Stambaugh 7d0ec1a138 More encapsulation work.
* Complete encapsulation of the MODULE class.
* Complete encapsulation of the EDA_TEXT class.
* Encapsulate most of the ZONE_CONTAINER class.
* Add pcbcommon library as a dependency for reSWIGging the scripting
  support.  This should cover most dependency cases.
2013-03-18 15:36:07 -04:00
Dick Hollenbeck eed97c549d plotter output file being left open fix. 2013-02-06 09:21:37 -06:00
Heikki Pulkkinen 3e18fa422c protect data in class_track.h, switch to using member accessors 2013-01-12 18:04:00 -06:00
jean-pierre charras ac41e7009e Pcbnew: plot solder mask layer with min width value specified: algorithm modified to reduce artifacts. 2012-12-03 15:27:34 +01:00
jean-pierre charras 703293fa30 Add a min width parameter to plot solder mask layers. 2012-11-05 21:20:34 +01:00
Marco Mattila efa0286f26 Do not force vias to be substracted from silkscreen in pcbnew gerber plot 2012-10-28 22:51:47 +02:00
jean-pierre charras 621a43c4ad Eeschema: always stores sheet filename in unix-like notation, and fix a bug when editing sheet file name.
Pcbnew: add PDF format  for drill map generation.
Plotter classes: tweaking code.
2012-10-13 20:54:33 +02:00
jean-pierre charras 5fa61ecd25 Finishing code cleaning in plot functions. 2012-09-25 09:49:29 +02:00
jean-pierre charras 2d49ced742 Pcbnew: fix compil warning and a minor bug in plot negative (frame fer plotted in white therefore not visible).
minor code cleaning
2012-09-24 18:03:03 +02:00
Renamed from pcbnew/plot_rtn.cpp (Browse further)