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11 Commits

Author SHA1 Message Date
Jeff Young 463100d67f Remove a long-standing hack to keep divots out of adjacent zones. 
The new algorithm unions any adjacent zones before doing the
chamfer/fillet and then subtracts the other zones back out afterwards.

Fixes https://gitlab.com/kicad/code/kicad/issues/3812
 2020-08-12 22:20:08 +01:00
Seth Hillbrand 7c455f2357 First pass at DRC RTree functionality 
This implements a copper-layer RTree with functions for iterating over
the elements in a copper layer and providing Nearest Neighbor returns
for BOARD_CONNECTED_ITEMS
 2020-08-11 16:52:29 -07:00
Jeff Young fdb23d1a2d Add DRC check for items (pads for now) shorting two nets. 
Fixes https://gitlab.com/kicad/code/kicad/issues/4955
 2020-07-30 21:42:23 +01:00
Tomasz Wlostowski 128ae8b49e drc_proto: working on hole size/track width checker 2020-07-29 23:14:34 +02:00
Tomasz Wlostowski cf0bb60fbb drc_proto: migrated GetEffectiveShape(s) to SHAPE_COMPOUND 2020-07-29 23:14:03 +02:00
Tomasz Wlostowski 91b68e4578 drc_proto: follow up Jeff's changes in legacy DRC/board model 2020-07-29 23:14:03 +02:00
Jeff Young bf445c1a95 Performance enhancements. 
1) cache pad polygon outlines
   huge improvement in connectivity performance and a decent
   improvement in DRC performance
2) don't pre-allocate CONTEXT stack
   significant improvement in DRC rule performance
2) don't keep re-encoding strings
   decent improvement in DRC rule performance
 2020-07-25 13:03:33 +01:00
Tomasz Wlostowski 0a4c8cd45c drc_proto: import latest Jeff & Jon's changes + update copyright headers 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski 0e0cf5dff8 drc_proto: moving to GetEffectiveShapes() 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski 1cabc1bc0f qa/drc_proto: rework common clearance code into base class, start working on hole clearance test refactor 2020-07-05 22:44:38 +02:00
Tomasz Wlostowski b3ce23f0e2 PCB_EXPR_EVALUATOR: implement isPlated virtual property 2020-07-05 22:44:38 +02:00
Renamed from qa/drc_proto/drc_clearance_test.cpp (Browse further)