Don't open-code knockout text shape generation in several different
places.
Make sure triangulated knockout text gets clearance added when
specified.
Collapse duplicated footprint text item plot routine (they're no
longer any different from plotting pcb text items).
Change teardrop generation to rely more heavily on BOARD_CONNECTIVITY
for improved performance.
Add updating of teardrops on BOARD_COMMIT::Push().
Also converts m_CopperItemRTreeCache to std::shared_ptr.
We don't copy it around anyway, and having to create a new set
of std::unique_ptr's for each operation is likely to be more
expensive than std::shared_ptr's overhead.
A sheetpath is required to correctly resolve text variables.
Depending on currentSheet is rife with bugs.
There are many places where we do *not* want to be prepending
field names to the field values, such as netlisting,
building PDF hypertext menus, etc.
Also, Find/Replace needs to work on unresolved text, as
that's what we're going to display (and if replace nuked
your variable references you wouldn't be happy).
Adds QA checks to copper sliver tests. Adds the following checks:
- Dot product between two arms (quickly avoids checks for >90°)
- Checks the sliver is convex (area test)
- Eliminates minor slivers with angles that are approximately 0 and ones
with the opposite side width beneath a configurable level
- Updates Clipper2 to fix a couple of jagged edges on inflate
- Adds simplify during zone fill inflation to limit jaggies
Fixes https://gitlab.com/kicad/code/kicad/issues/14549
After last changes in PCB_SHAPES, there were issues when comparing coordinates
of shapes.
Use now a footprint not flipped, not rotated and at position 0,0 for comparisons.
Fixes#14496https://gitlab.com/kicad/code/kicad/issues/14496
This allows custom rules to be authored without firing the auto-generated
rule from Board Setup > Silk Item Clearance (which should be only for silk-
to-silk clearances).
Fixes https://gitlab.com/kicad/code/kicad/issues/14417
Substantial elements following a divot should be at least as far in each
cardinal direction from the origin point in order to be considered
substantial. This catches cases where the "substantial" element is
actually a straight segment away from the divot
Fixes https://gitlab.com/kicad/code/kicad/issues/14130
Also removes a bunch of "wxEmptyString" where it was degrading readability.
Also fixes a bug where footprint zones were getting sorted incorrectly
due to rotation of coordinates.
Fixes https://gitlab.com/kicad/code/kicad/issues/14322
Vias should only be placed on the layers through which they pass. if
they pass through front or back copper, then they also pass through the
tech layers on that side
This is an update to 9d3f4bef6a
Fractured polygons are always fractured along the x-axis, so when
checking to see if a segment is a fracture point, we check if the y
coordinate is equal. This avoids situations where there are multiple
fracture points between two inflection points
Additionally, we add a second check to ensure we don't hit spurious
blobs (all kinks should be symmetric and therefore be substantial in
each direction)
Fixes https://gitlab.com/kicad/code/kicad/issues/14130
hole_to_hole clearance should account for all holes in the board.
Previously, we had excluded non through holes from this test but that
omits via holes that can still foul a future drill hit.
Designers wanting the old behavior can explicitly set the hole_to_hole
clearance to 0mm for specific ViaType pairs
Footprints now modify their parent container when destroyed due to
26542796, and a temporary footprint is created during DRC
in some situations. This can lead to board caches being messed
with during DRC which can cause unpredictable bad effects due to
multithreading.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/13844
When checking the physical clearance on a layer, it is critical to check
that the via hole exists on that layer. Blind/buried and micro vias may
not overlap, so should be excluded from this check when they don't exist
on a particular layer
Similarly, we should only be reporting a single physical clearance error
for each item pair even though they may have multiple errors across
multiple layers in the case of via-via clearance
Nominally, the zcode of a vertex is unique. This is not 100% true,
however, as we must interlace two 32-bit numbers into a single 32-bit
number. Sorting needs to account for the possibility that the zcode
will be the same while other elements of the vertex are different. This
commit fixes the broken boolean logic to more clearly handle these cases
Fixes https://gitlab.com/kicad/code/kicad/issues/13867
1) Special case doesn't work for polygons with holes
2) Fix special case to handle intersecting lines where neither end is
in the polygon.
Note that only (1) is required for the bug below. (2) was just
discovered while implementing (1).
Fixes https://gitlab.com/kicad/code/kicad/issues/13779
When we have objects spanning multiple layers, the user doesn't need to
see every layer/hole combination violation if they do not request it
(cherry picked from commit c07043e762)
The hard coded value was too small for certain calculations. Better to
have a configurable value that is initially set to our error level to
allow for deviations that don't meet the visibility test for spikes.
These have become more apparent with Clipper2
The connection width checker uses morton codes to order elements. The
sort should be primarily morton-based but needs to be stable in order to
ensure that nextZ/prevZ elements are properly placed as the actual
next/prev elements in the list. Otherwise, hitting a fracture point
might make us skip in the wrong direction
Fixes https://gitlab.com/kicad/code/kicad/issues/12831
This is done under the same conditions as track-to-copper-graphic --
the pad or track must also collide with a net-tie pad, and the pad or
track to copper-graphic collision must be within the boundary of said
pad.
Fixes https://gitlab.com/kicad/code/kicad/issues/13008
pad of a given number.
Also improves other DRC logic to tighten up the net-tie rules now that
we know which pads are allowed to short with which other pads.
Also removes the "Overlapping pads" DRC violation now that we know
whether or not overlapping pads in a net-tie footprint constitute a
short.
Fixes https://gitlab.com/kicad/code/kicad/issues/12506
When the via is first and not second in our ordering, the hole-copper
clearance was not checked as the track did not have a hole.
We also calculated the NPTH-via clearance incorrectly in the inspector
Jeff Young
Seth Hillbrand
jean-pierre charras
Marek Roszko
qu1ck
Wayne Stambaugh
Jon Evans
Alex