Tomasz Wlostowski
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bc86ea7682
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drc_proto: use separate lexer for rule file from current pcbnew DRC
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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0e0cf5dff8
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drc_proto: moving to GetEffectiveShapes()
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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1cabc1bc0f
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qa/drc_proto: rework common clearance code into base class, start working on hole clearance test refactor
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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b3ce23f0e2
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PCB_EXPR_EVALUATOR: implement isPlated virtual property
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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d57d5d73b2
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qa: clearance test works and reports. about to do board outline clearance test
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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bd19892cd0
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qa/drc_proto: clearance test seems to work with conditional rules, need to clean up & add reporting
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2020-07-05 22:44:38 +02:00 |
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Tomasz Wlostowski
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085698d17c
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drc_proto: wip
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2020-07-05 22:44:38 +02:00 |