rp2040 CMSIS-DAP alternative to picoprobe and raspberrypi-swd.cfg
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@ -4,9 +4,13 @@ This unearths the name of a weekend project that I did in 2014. Both then and n
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Whereas the original code used ST's STM32 USB drivers, this new iteration uses [TinyUSB](https://github.com/hathach/tinyusb), an open source cross-platform USB stack for embedded systems.
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Whereas the original code used ST's STM32 USB drivers, this new iteration uses [TinyUSB](https://github.com/hathach/tinyusb), an open source cross-platform USB stack for embedded systems.
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## Special Variants
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## Variants
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A variant tailored especially for the RP2040 “Raspberry Pi Pico” is [available here](https://github.com/majbthrd/pico-debug).
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For BOARD=raspberry_pi_pico, this project results in a standards-based CMSIS-DAP alternative to the approaches suggested in Chapter 5 and Appendix A of [Getting Started with Raspberry Pi Pico](https://datasheets.raspberrypi.org/pico/getting-started-with-pico.pdf). This uses two RP2040 boards (see wiring loom shown in Figure 34 of Appendix A) where one RP2040 is the debugger and the other RP2040 is being debugged. The instructions in Chapter 5 apply, except no Raspberry Pi is needed.
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Alternatively, a special one RP2040 “Raspberry Pi Pico” variant is [available here](https://github.com/majbthrd/pico-debug).
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For BOARD=stm32f072disco, the inexpensive [32F072BDISCOVERY evaluation board](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html) can be used as a CMSIS-DAP SWD debugger.
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## Building
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## Building
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@ -23,15 +23,7 @@
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*/
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*/
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/*
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/*
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This DAP_config provides for core0 of a Raspberry Pi Pico RP2040 to debug core1.
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This DAP_config provides a CMSIS-DAP alternative to picoprobe and raspberrypi-swd.cfg
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At the time of writing, host software that supports "multi-drop" SWD
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(particularly with CMSIS-DAP) is hard to come by. As a result, your favorite
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software may not function with this target, even though it works with other
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ARM targets.
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As a stopgap measure, PORT_SWD_SETUP() below has been enhanced to perform some
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of the "multi-drop" initialization that would normally be done by host software.
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*/
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*/
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#ifndef __DAP_CONFIG_H__
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#ifndef __DAP_CONFIG_H__
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@ -58,8 +50,18 @@ This information includes:
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#include <stdint.h>
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#include <stdint.h>
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#include <hardware/regs/resets.h>
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#include <hardware/regs/resets.h>
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#include <hardware/structs/resets.h>
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#include <hardware/structs/resets.h>
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#include <hardware/regs/syscfg.h>
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#include <hardware/regs/sio.h>
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#include <hardware/structs/syscfg.h>
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#include <hardware/structs/sio.h>
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#include <hardware/regs/pads_bank0.h>
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#include <hardware/structs/padsbank0.h>
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#include <hardware/regs/io_bank0.h>
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#include <hardware/structs/iobank0.h>
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#include <hardware/gpio.h>
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#include "picoprobe_config.h"
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#define PROBE_PIN_SWCLK_MASK (1UL << (PROBE_PIN_SWCLK))
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#define PROBE_PIN_SWDIO_MASK (1UL << (PROBE_PIN_SWDIO))
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/// Processor Clock of the Cortex-M MCU used in the Debug Unit.
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/// Processor Clock of the Cortex-M MCU used in the Debug Unit.
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/// This value is used to calculate the SWD/JTAG clock speed.
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/// This value is used to calculate the SWD/JTAG clock speed.
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@ -130,7 +132,7 @@ This information includes:
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/// The Debug Unit may be part of an evaluation board and always connected to a fixed
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/// The Debug Unit may be part of an evaluation board and always connected to a fixed
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/// known device. In this case a Device Vendor and Device Name string is stored which
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/// known device. In this case a Device Vendor and Device Name string is stored which
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/// may be used by the debugger or IDE to configure device parameters.
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/// may be used by the debugger or IDE to configure device parameters.
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#define TARGET_DEVICE_FIXED 1 ///< Target Device: 1 = known, 0 = unknown;
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#define TARGET_DEVICE_FIXED 0 ///< Target Device: 1 = known, 0 = unknown;
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#if TARGET_DEVICE_FIXED
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#if TARGET_DEVICE_FIXED
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#define TARGET_DEVICE_VENDOR "Raspberry Pi" ///< String indicating the Silicon Vendor
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#define TARGET_DEVICE_VENDOR "Raspberry Pi" ///< String indicating the Silicon Vendor
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@ -223,27 +225,16 @@ Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode:
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*/
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*/
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__STATIC_INLINE void PORT_SWD_SETUP (void) {
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__STATIC_INLINE void PORT_SWD_SETUP (void) {
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/* enable the peripheral and enable local control of core1's SWD interface */
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resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS);
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resets_hw->reset &= ~RESETS_RESET_SYSCFG_BITS;
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syscfg_hw->dbgforce = SYSCFG_DBGFORCE_PROC1_ATTACH_BITS;
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#if 1
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/* this #if block is a temporary measure to perform target selection even if the host IDE doesn't know how */
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static const uint8_t sequence_alert[] = {
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0xff, 0x92, 0xf3, 0x09, 0x62, 0x95, 0x2d, 0x85, 0x86, 0xe9, 0xaf, 0xdd, 0xe3, 0xa2, 0x0e, 0xbc,
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0x19, 0xa0, 0xf1, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0x00,
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};
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SWJ_Sequence(8*sizeof(sequence_alert), sequence_alert);
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/* it is possible to do this with SWJ_Sequence on the rp2040 since data input and output are distinct */
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static const uint8_t write_targetsel[] = { 0x99, 0xff, 0x24, 0x05, 0x20, 0x22, 0x00, };
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SWJ_Sequence(8*sizeof(write_targetsel), write_targetsel);
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#endif
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/* set to default high level */
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/* set to default high level */
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syscfg_hw->dbgforce |= SYSCFG_DBGFORCE_PROC1_SWCLK_BITS | SYSCFG_DBGFORCE_PROC1_SWDI_BITS;
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sio_hw->gpio_oe_set = PROBE_PIN_SWCLK_MASK | PROBE_PIN_SWDIO_MASK;
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sio_hw->gpio_set = PROBE_PIN_SWCLK_MASK | PROBE_PIN_SWDIO_MASK;
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hw_write_masked(&padsbank0_hw->io[PROBE_PIN_SWCLK], PADS_BANK0_GPIO0_IE_BITS, PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
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hw_write_masked(&padsbank0_hw->io[PROBE_PIN_SWDIO], PADS_BANK0_GPIO0_IE_BITS, PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
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iobank0_hw->io[PROBE_PIN_SWCLK].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
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iobank0_hw->io[PROBE_PIN_SWDIO].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
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}
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}
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/** Disable JTAG/SWD I/O Pins.
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/** Disable JTAG/SWD I/O Pins.
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@ -251,7 +242,7 @@ Disables the DAP Hardware I/O pins which configures:
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- TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode.
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- TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode.
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*/
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*/
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__STATIC_INLINE void PORT_OFF (void) {
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__STATIC_INLINE void PORT_OFF (void) {
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syscfg_hw->dbgforce = 0;
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sio_hw->gpio_oe_clr = PROBE_PIN_SWCLK_MASK | PROBE_PIN_SWDIO_MASK;
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}
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}
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@ -268,14 +259,14 @@ __STATIC_FORCEINLINE uint32_t PIN_SWCLK_TCK_IN (void) {
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Set the SWCLK/TCK DAP hardware I/O pin to high level.
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Set the SWCLK/TCK DAP hardware I/O pin to high level.
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*/
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*/
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__STATIC_FORCEINLINE void PIN_SWCLK_TCK_SET (void) {
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__STATIC_FORCEINLINE void PIN_SWCLK_TCK_SET (void) {
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syscfg_hw->dbgforce |= SYSCFG_DBGFORCE_PROC1_SWCLK_BITS;
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sio_hw->gpio_set = PROBE_PIN_SWCLK_MASK;
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}
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}
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/** SWCLK/TCK I/O pin: Set Output to Low.
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/** SWCLK/TCK I/O pin: Set Output to Low.
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Set the SWCLK/TCK DAP hardware I/O pin to low level.
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Set the SWCLK/TCK DAP hardware I/O pin to low level.
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*/
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*/
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__STATIC_FORCEINLINE void PIN_SWCLK_TCK_CLR (void) {
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__STATIC_FORCEINLINE void PIN_SWCLK_TCK_CLR (void) {
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syscfg_hw->dbgforce &= ~SYSCFG_DBGFORCE_PROC1_SWCLK_BITS;
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sio_hw->gpio_clr = PROBE_PIN_SWCLK_MASK;
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}
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}
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@ -294,21 +285,21 @@ __STATIC_FORCEINLINE uint32_t PIN_SWDIO_TMS_IN (void) {
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Set the SWDIO/TMS DAP hardware I/O pin to high level.
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Set the SWDIO/TMS DAP hardware I/O pin to high level.
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*/
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*/
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__STATIC_FORCEINLINE void PIN_SWDIO_TMS_SET (void) {
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__STATIC_FORCEINLINE void PIN_SWDIO_TMS_SET (void) {
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syscfg_hw->dbgforce |= SYSCFG_DBGFORCE_PROC1_SWDI_BITS;
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sio_hw->gpio_set = PROBE_PIN_SWDIO_MASK;
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}
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}
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/** SWDIO/TMS I/O pin: Set Output to Low.
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/** SWDIO/TMS I/O pin: Set Output to Low.
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Set the SWDIO/TMS DAP hardware I/O pin to low level.
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Set the SWDIO/TMS DAP hardware I/O pin to low level.
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*/
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*/
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__STATIC_FORCEINLINE void PIN_SWDIO_TMS_CLR (void) {
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__STATIC_FORCEINLINE void PIN_SWDIO_TMS_CLR (void) {
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syscfg_hw->dbgforce &= ~SYSCFG_DBGFORCE_PROC1_SWDI_BITS;
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sio_hw->gpio_clr = PROBE_PIN_SWDIO_MASK;
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}
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}
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/** SWDIO I/O pin: Get Input (used in SWD mode only).
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/** SWDIO I/O pin: Get Input (used in SWD mode only).
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\return Current status of the SWDIO DAP hardware I/O pin.
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\return Current status of the SWDIO DAP hardware I/O pin.
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*/
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*/
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__STATIC_FORCEINLINE uint32_t PIN_SWDIO_IN (void) {
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__STATIC_FORCEINLINE uint32_t PIN_SWDIO_IN (void) {
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return (syscfg_hw->dbgforce & SYSCFG_DBGFORCE_PROC1_SWDO_BITS) ? 1U : 0U;
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return (sio_hw->gpio_in & PROBE_PIN_SWDIO_MASK) ? 1U : 0U;
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}
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}
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/** SWDIO I/O pin: Set Output (used in SWD mode only).
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/** SWDIO I/O pin: Set Output (used in SWD mode only).
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*/
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*/
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__STATIC_FORCEINLINE void PIN_SWDIO_OUT (uint32_t bit) {
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__STATIC_FORCEINLINE void PIN_SWDIO_OUT (uint32_t bit) {
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if (bit & 1)
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if (bit & 1)
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syscfg_hw->dbgforce |= SYSCFG_DBGFORCE_PROC1_SWDI_BITS;
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sio_hw->gpio_set = PROBE_PIN_SWDIO_MASK;
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else
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else
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syscfg_hw->dbgforce &= ~SYSCFG_DBGFORCE_PROC1_SWDI_BITS;
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sio_hw->gpio_clr = PROBE_PIN_SWDIO_MASK;
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}
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}
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/** SWDIO I/O pin: Switch to Output mode (used in SWD mode only).
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/** SWDIO I/O pin: Switch to Output mode (used in SWD mode only).
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called prior \ref PIN_SWDIO_OUT function calls.
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called prior \ref PIN_SWDIO_OUT function calls.
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*/
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*/
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__STATIC_FORCEINLINE void PIN_SWDIO_OUT_ENABLE (void) {
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__STATIC_FORCEINLINE void PIN_SWDIO_OUT_ENABLE (void) {
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;
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sio_hw->gpio_oe_set = PROBE_PIN_SWDIO_MASK;
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}
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}
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/** SWDIO I/O pin: Switch to Input mode (used in SWD mode only).
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/** SWDIO I/O pin: Switch to Input mode (used in SWD mode only).
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called prior \ref PIN_SWDIO_IN function calls.
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called prior \ref PIN_SWDIO_IN function calls.
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*/
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*/
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__STATIC_FORCEINLINE void PIN_SWDIO_OUT_DISABLE (void) {
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__STATIC_FORCEINLINE void PIN_SWDIO_OUT_DISABLE (void) {
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syscfg_hw->dbgforce |= SYSCFG_DBGFORCE_PROC1_SWDI_BITS;
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sio_hw->gpio_oe_clr = PROBE_PIN_SWDIO_MASK;
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}
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}
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@ -0,0 +1,74 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#ifndef PICOPROBE_H_
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#define PICOPROBE_H_
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#if false
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#define picoprobe_info(format,args...) printf(format, ## args)
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#else
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#define picoprobe_info(format,...) ((void)0)
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#endif
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#if false
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#define picoprobe_debug(format,args...) printf(format, ## args)
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#else
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#define picoprobe_debug(format,...) ((void)0)
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#endif
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#if false
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#define picoprobe_dump(format,args...) printf(format, ## args)
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#else
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#define picoprobe_dump(format,...) ((void)0)
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#endif
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// PIO config
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#define PROBE_SM 0
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#define PROBE_PIN_OFFSET 2
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#define PROBE_PIN_SWCLK PROBE_PIN_OFFSET + 0 // 2
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#define PROBE_PIN_SWDIO PROBE_PIN_OFFSET + 1 // 3
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// UART config
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#define PICOPROBE_UART_TX 4
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#define PICOPROBE_UART_RX 5
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#define PICOPROBE_UART_INTERFACE uart1
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#define PICOPROBE_UART_BAUDRATE 115200
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// LED config
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#ifndef PICOPROBE_LED
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#ifndef PICO_DEFAULT_LED_PIN
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#error PICO_DEFAULT_LED_PIN is not defined, run PICOPROBE_LED=<led_pin> cmake
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#elif PICO_DEFAULT_LED_PIN == -1
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#error PICO_DEFAULT_LED_PIN is defined as -1, run PICOPROBE_LED=<led_pin> cmake
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#else
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#define PICOPROBE_LED PICO_DEFAULT_LED_PIN
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#endif
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#endif
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#endif
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