I2C properly works, finally
This commit is contained in:
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1cadae03df
commit
6cc617fe1f
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@ -185,6 +185,7 @@ libco is licensed under the [ISC license](https://opensource.org/licenses/ISC)
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- https://github.com/derekmulcahy/xvcpi
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- OpenOCD as XVC client??
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- [ ] Maybe use the ADCs for something?
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- [ ] General generic manual GPIO mode
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- [ ] SD/MMC/SDIO (will be a pain)
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- [ ] SUMP logic analyzer?????
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- see also [this](https://github.com/perexg/picoprobe-sump)
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@ -10,224 +10,349 @@
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#include "pinout.h"
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#include "i2ctinyusb.h"
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// replicating/rewriting some SDK functions because they don't do what I want
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// except better this time
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static int i2cex_probe_address(uint16_t addr, bool a10bit) {
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// TODO: bitbang the whole thing because the synopsys stuff sucks
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return PICO_ERROR_GENERIC;
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}
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static void i2cex_abort_xfer(void) {
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// now do the abort
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i2c->hw->enable = 1 /*| (1<<2)*/ | (1<<1);
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// wait for M_TX_ABRT irq
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do {
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/*if (timeout_check) {
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timeout = timeout_check(ts);
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abort |= timeout;
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}*/
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tight_loop_contents();
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} while (/*!timeout &&*/ !(i2c->hw->raw_intr_stat & I2C_IC_RAW_INTR_STAT_TX_ABRT_BITS));
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// reset irq
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//if (!timeout)
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(void)i2c->hw->clr_tx_abrt;
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}
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static int i2cex_write_blocking_until(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
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const uint8_t* src, size_t len, bool nostop, absolute_time_t until) {
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timeout_state_t ts_;
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struct timeout_state* ts = &ts_;
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check_timeout_fn timeout_check = init_single_timeout_until(&ts_, until);
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if ((int)len < 0) return PICO_ERROR_GENERIC;
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if (a10bit) { // addr too high
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if (addr & ~(uint16_t)((1<<10)-1)) return PICO_ERROR_GENERIC;
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} else if (addr & 0x80)
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return PICO_ERROR_GENERIC;
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if (len == 0) return i2cex_probe_address(addr, a10bit);
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bool abort = false, timeout = false;
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uint32_t abort_reason = 0;
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int byte_ctr;
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i2c->hw->enable = 0;
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// enable 10bit mode if requested
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hw_write_masked(&i2c->hw->con, I2C_IC_CON_IC_10BITADDR_MASTER_BITS, (a10bit
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? I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_10BITS
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: I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_7BITS ) << I2C_IC_CON_IC_10BITADDR_MASTER_LSB);
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i2c->hw->tar = addr;
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i2c->hw->enable = 1;
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for (byte_ctr = 0; byte_ctr < (int)len; ++byte_ctr) {
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bool first = byte_ctr == 0,
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last = byte_ctr == (int)len - 1;
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i2c->hw->data_cmd =
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bool_to_bit(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
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bool_to_bit(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
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*src++;
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do {
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if (timeout_check) {
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timeout = timeout_check(ts);
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abort |= timeout;
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}
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tight_loop_contents();
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} while (!timeout && !(i2c->hw->raw_intr_stat & I2C_IC_RAW_INTR_STAT_TX_EMPTY_BITS));
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if (!timeout) {
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abort_reason = i2c->hw->tx_abrt_source;
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if (abort_reason) {
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(void)i2c->hw->clr_tx_abrt;
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abort = true;
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}
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if (abort || (last && !nostop)) {
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do {
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if (timeout_check) {
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timeout = timeout_check(ts);
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abort |= timeout;
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}
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tight_loop_contents();
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} while (!timeout && !(i2c->hw->raw_intr_stat & I2C_IC_RAW_INTR_STAT_STOP_DET_BITS));
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if (!timeout) (void)i2c->hw->clr_stop_det;
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} else {
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// if we had a timeout, send an abort request to the hardware,
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// so that the bus gets released
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i2cex_abort_xfer();
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}
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}
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if (abort) break;
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}
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int rval;
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if (abort) {
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const int addr_noack = I2C_IC_TX_ABRT_SOURCE_ABRT_7B_ADDR_NOACK_BITS
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| I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR1_NOACK_BITS
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| I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR2_NOACK_BITS;
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if (timeout) rval = PICO_ERROR_TIMEOUT;
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else if (!abort_reason || (abort_reason & addr_noack))
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rval = PICO_ERROR_GENERIC;
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else if (abort_reason & I2C_IC_TX_ABRT_SOURCE_ABRT_TXDATA_NOACK_BITS)
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rval = byte_ctr;
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else rval = PICO_ERROR_GENERIC;
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} else rval = byte_ctr;
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i2c->restart_on_next = nostop;
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return rval;
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}
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static int i2cex_read_blocking_until(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
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uint8_t* dst, size_t len, bool nostop, absolute_time_t until) {
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timeout_state_t ts_;
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struct timeout_state* ts = &ts_;
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check_timeout_fn timeout_check = init_single_timeout_until(&ts_, until);
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if ((int)len < 0) return PICO_ERROR_GENERIC;
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if (a10bit) { // addr too high
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if (addr & ~(uint16_t)((1<<10)-1)) return PICO_ERROR_GENERIC;
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} else if (addr & 0x80)
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return PICO_ERROR_GENERIC;
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i2c->hw->enable = 0;
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// enable 10bit mode if requested
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hw_write_masked(&i2c->hw->con, I2C_IC_CON_IC_10BITADDR_MASTER_BITS, (a10bit
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? I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_10BITS
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: I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_7BITS ) << I2C_IC_CON_IC_10BITADDR_MASTER_LSB);
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i2c->hw->tar = addr;
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i2c->hw->enable = 1;
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if (len == 0) return i2cex_probe_address(addr, a10bit);
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bool abort = false, timeout = false;
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uint32_t abort_reason = 0;
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int byte_ctr;
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for (byte_ctr = 0; byte_ctr < (int)len; ++byte_ctr) {
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bool first = byte_ctr == 0;
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bool last = byte_ctr == (int)len - 1;
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while (!i2c_get_write_available(i2c) && !abort) {
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tight_loop_contents();
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// ?
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if (timeout_check) {
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timeout = timeout_check(ts);
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abort |= timeout;
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}
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}
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if (timeout) {
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// if we had a timeout, send an abort request to the hardware,
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// so that the bus gets released
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i2cex_abort_xfer();
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}
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if (abort) break;
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i2c->hw->data_cmd =
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bool_to_bit(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
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bool_to_bit(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
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I2C_IC_DATA_CMD_CMD_BITS; // -> 1 for read
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do {
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abort_reason = i2c->hw->tx_abrt_source;
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abort = (bool)i2c->hw->clr_tx_abrt;
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if (timeout_check) {
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timeout = timeout_check(ts);
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abort |= timeout;
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}
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tight_loop_contents(); // ?
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} while (!abort && !i2c_get_read_available(i2c));
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if (timeout) {
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// if we had a timeout, send an abort request to the hardware,
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// so that the bus gets released
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i2cex_abort_xfer();
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}
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if (abort) break;
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*dst++ = (uint8_t)i2c->hw->data_cmd;
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}
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int rval;
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if (abort) {
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const int addr_noack = I2C_IC_TX_ABRT_SOURCE_ABRT_7B_ADDR_NOACK_BITS
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| I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR1_NOACK_BITS
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| I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR2_NOACK_BITS;
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if (timeout) rval = PICO_ERROR_TIMEOUT;
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else if (!abort_reason || (abort_reason & addr_noack))
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rval = PICO_ERROR_GENERIC;
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else rval = PICO_ERROR_GENERIC;
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} else rval = byte_ctr;
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i2c->restart_on_next = nostop;
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return rval;
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}
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static inline int i2cex_write_timeout_us(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
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const uint8_t* src, size_t len, bool nostop, uint32_t timeout_us) {
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absolute_time_t t = make_timeout_time_us(timeout_us);
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return i2cex_write_blocking_until(i2c, addr, a10bit, src, len, nostop, t);
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}
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static inline int i2cex_read_timeout_us(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
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uint8_t* dst, size_t len, bool nostop, uint32_t timeout_us) {
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absolute_time_t t = make_timeout_time_us(timeout_us);
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return i2cex_read_blocking_until(i2c, addr, a10bit, dst, len, nostop, t);
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}
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//static int delay = 10, delay2 = 5;
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//
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//// I2C bitbang reimpl because ugh, synopsys
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//// (mostly inspired by original I2CTinyUSB AVR firmware)
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//__attribute__((__always_inline__)) inline static void i2cio_set_sda(bool hi) {
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// if (hi) {
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// sio_hw->gpio_oe_clr = (1<<PINOUT_I2C_SDA); // SDA is input
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// // => pullup configured, so it'll go high
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// } else {
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// sio_hw->gpio_oe_set = (1<<PINOUT_I2C_SDA); // SDA is output
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// sio_hw->gpio_clr = (1<<PINOUT_I2C_SDA); // and drive it low
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// }
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//}
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//__attribute__((__always_inline__)) inline static bool i2cio_get_sda(void) {
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// return (sio_hw->gpio_in & (1<<PINOUT_I2C_SDA)) != 0;
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//}
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//__attribute__((__always_inline__)) inline static void i2cio_set_scl(bool hi) {
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// busy_wait_us_32(delay2);
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// sio_hw->gpio_oe_set = (1<<PINOUT_I2C_SCL); // SCL is output
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// if (hi)
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// sio_hw->gpio_set = (1<<PINOUT_I2C_SCL); // SCL is high
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// else
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// sio_hw->gpio_clr = (1<<PINOUT_I2C_SCL); // SCL is low
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// busy_wait_us_32(delay2);
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//}
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//
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//__attribute__((__always_inline__)) inline static void i2cio_scl_toggle(void) {
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// i2cio_set_scl(true );
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// i2cio_set_scl(false);
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//}
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//
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//static void __no_inline_not_in_flash_func(i2cio_start)(void) { // start condition
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// i2cio_set_sda(false);
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// i2cio_set_scl(false);
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//}
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//static void __no_inline_not_in_flash_func(i2cio_repstart)(void) { // repstart condition
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// i2cio_set_sda(true);
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// i2cio_set_scl(true);
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//
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// i2cio_set_sda(false);
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// i2cio_set_scl(false);
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//}
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//static void __no_inline_not_in_flash_func(i2cio_stop)(void) { // stop condition
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// i2cio_set_sda(false);
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// i2cio_set_scl(true );
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// i2cio_set_sda(true );
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//}
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//
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//static bool __no_inline_not_in_flash_func(i2cio_write7)(uint8_t v) { // return value: acked? // needed for 10bitaddr xfers
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// for (int i = 6; i >= 0; --i) {
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// i2cio_set_sda((v & (1<<i)) != 0);
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// i2cio_scl_toggle();
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// }
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//
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// i2cio_set_sda(true);
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// i2cio_set_scl(true);
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//
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// bool ack = i2cio_get_sda();
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// i2cio_set_scl(false);
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//
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// return ack;
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//}
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//static bool __no_inline_not_in_flash_func(i2cio_write8)(uint8_t v) { // return value: acked?
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// for (int i = 7; i >= 0; --i) {
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// i2cio_set_sda((v & (1<<i)) != 0);
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// i2cio_scl_toggle();
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// }
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//
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// i2cio_set_sda(true);
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// i2cio_set_scl(true);
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//
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// bool ack = i2cio_get_sda();
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// i2cio_set_scl(false);
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//
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// return ack;
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//}
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//static uint8_t __no_inline_not_in_flash_func(i2cio_read8)(bool last) {
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// i2cio_set_sda(true );
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// i2cio_set_scl(false);
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//
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// uint8_t rv = 0;
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// for (int i = 7; i >= 0; --i) {
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// i2cio_set_scl(true);
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// bool c = i2cio_get_sda();
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// rv <<= 1;
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// if (c) rv |= 1;
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// i2cio_set_scl(false);
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// }
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//
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// if (last) i2cio_set_sda(true);
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// else i2cio_set_sda(false);
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//
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// i2cio_scl_toggle();
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// i2cio_set_sda(true);
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//}
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//
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//// replicating/rewriting some SDK functions because they don't do what I want
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//// so I'm making better ones
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//
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//static int __no_inline_not_in_flash_func(i2cex_probe_address)(uint16_t addr, bool a10bit) {
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// // I2C pins to SIO
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// gpio_set_function(PINOUT_I2C_SCL, GPIO_FUNC_SIO);
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// gpio_set_function(PINOUT_I2C_SDA, GPIO_FUNC_SIO);
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//
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// int rv;
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// i2cio_start();
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//
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// if (a10bit) {
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// // A10 magic higher 2 addr bits r/#w bit
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// uint8_t addr1 = 0x70 | (((addr >> 8) & 3) << 1) | 0,
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// addr2 = addr & 0xff;
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//
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// if (i2cio_write7(addr1)) {
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// if (i2cio_write8(addr2)) rv = 0;
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// else rv = PICO_ERROR_GENERIC;
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// } else rv = PICO_ERROR_GENERIC;
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// } else {
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// if (i2cio_write8((addr << 1) & 0xff)) rv = 0; // acked: ok
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// else rv = PICO_ERROR_GENERIC; // nak :/
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// }
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// i2cio_stop();
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//
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// // I2C back to I2C
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// gpio_set_function(PINOUT_I2C_SCL, GPIO_FUNC_I2C);
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// gpio_set_function(PINOUT_I2C_SDA, GPIO_FUNC_I2C);
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//
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// return rv;
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//}
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//
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//static void i2cex_abort_xfer(i2c_inst_t* i2c) {
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// // now do the abort
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// i2c->hw->enable = 1 /*| (1<<2)*/ | (1<<1);
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// // wait for M_TX_ABRT irq
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// do {
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// /*if (timeout_check) {
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// timeout = timeout_check(ts);
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// abort |= timeout;
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// }*/
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// tight_loop_contents();
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// } while (/*!timeout &&*/ !(i2c->hw->raw_intr_stat & I2C_IC_RAW_INTR_STAT_TX_ABRT_BITS));
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// // reset irq
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// //if (!timeout)
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// (void)i2c->hw->clr_tx_abrt;
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//}
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//
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//static int i2cex_write_blocking_until(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
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// const uint8_t* src, size_t len, bool nostop, absolute_time_t until) {
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// timeout_state_t ts_;
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// struct timeout_state* ts = &ts_;
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// check_timeout_fn timeout_check = init_single_timeout_until(&ts_, until);
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//
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// if ((int)len < 0) return PICO_ERROR_GENERIC;
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// if (a10bit) { // addr too high
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// if (addr & ~(uint16_t)((1<<10)-1)) return PICO_ERROR_GENERIC;
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// } else if (addr & 0x80)
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// return PICO_ERROR_GENERIC;
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//
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// if (len == 0) return i2cex_probe_address(addr, a10bit);
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//
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// bool abort = false, timeout = false;
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// uint32_t abort_reason = 0;
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// int byte_ctr;
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//
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// i2c->hw->enable = 0;
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// // enable 10bit mode if requested
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// hw_write_masked(&i2c->hw->con, I2C_IC_CON_IC_10BITADDR_MASTER_BITS, (a10bit
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// ? I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_10BITS
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// : I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_7BITS ) << I2C_IC_CON_IC_10BITADDR_MASTER_LSB);
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// i2c->hw->tar = addr;
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// i2c->hw->enable = 1;
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//
|
||||
// for (byte_ctr = 0; byte_ctr < (int)len; ++byte_ctr) {
|
||||
// bool first = byte_ctr == 0,
|
||||
// last = byte_ctr == (int)len - 1;
|
||||
//
|
||||
// i2c->hw->data_cmd =
|
||||
// bool_to_bit(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
|
||||
// bool_to_bit(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
|
||||
// *src++;
|
||||
//
|
||||
// do {
|
||||
// if (timeout_check) {
|
||||
// timeout = timeout_check(ts);
|
||||
// abort |= timeout;
|
||||
// }
|
||||
// tight_loop_contents();
|
||||
// } while (!timeout && !(i2c->hw->raw_intr_stat & I2C_IC_RAW_INTR_STAT_TX_EMPTY_BITS));
|
||||
//
|
||||
// if (!timeout) {
|
||||
// abort_reason = i2c->hw->tx_abrt_source;
|
||||
// if (abort_reason) {
|
||||
// (void)i2c->hw->clr_tx_abrt;
|
||||
// abort = true;
|
||||
// }
|
||||
//
|
||||
// if (abort || (last && !nostop)) {
|
||||
// do {
|
||||
// if (timeout_check) {
|
||||
// timeout = timeout_check(ts);
|
||||
// abort |= timeout;
|
||||
// }
|
||||
// tight_loop_contents();
|
||||
// } while (!timeout && !(i2c->hw->raw_intr_stat & I2C_IC_RAW_INTR_STAT_STOP_DET_BITS));
|
||||
//
|
||||
// if (!timeout) (void)i2c->hw->clr_stop_det;
|
||||
// else
|
||||
// // if we had a timeout, send an abort request to the hardware,
|
||||
// // so that the bus gets released
|
||||
// i2cex_abort_xfer(i2c);
|
||||
// }
|
||||
// } else i2cex_abort_xfer(i2c);
|
||||
//
|
||||
// if (abort) break;
|
||||
// }
|
||||
//
|
||||
// int rval;
|
||||
//
|
||||
// if (abort) {
|
||||
// const int addr_noack = I2C_IC_TX_ABRT_SOURCE_ABRT_7B_ADDR_NOACK_BITS
|
||||
// | I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR1_NOACK_BITS
|
||||
// | I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR2_NOACK_BITS;
|
||||
//
|
||||
// if (timeout) rval = PICO_ERROR_TIMEOUT;
|
||||
// else if (!abort_reason || (abort_reason & addr_noack))
|
||||
// rval = PICO_ERROR_GENERIC;
|
||||
// else if (abort_reason & I2C_IC_TX_ABRT_SOURCE_ABRT_TXDATA_NOACK_BITS)
|
||||
// rval = byte_ctr;
|
||||
// else rval = PICO_ERROR_GENERIC;
|
||||
// } else rval = byte_ctr;
|
||||
//
|
||||
// i2c->restart_on_next = nostop;
|
||||
// return rval;
|
||||
//}
|
||||
//static int i2cex_read_blocking_until(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
|
||||
// uint8_t* dst, size_t len, bool nostop, absolute_time_t until) {
|
||||
// timeout_state_t ts_;
|
||||
// struct timeout_state* ts = &ts_;
|
||||
// check_timeout_fn timeout_check = init_single_timeout_until(&ts_, until);
|
||||
//
|
||||
// if ((int)len < 0) return PICO_ERROR_GENERIC;
|
||||
// if (a10bit) { // addr too high
|
||||
// if (addr & ~(uint16_t)((1<<10)-1)) return PICO_ERROR_GENERIC;
|
||||
// } else if (addr & 0x80)
|
||||
// return PICO_ERROR_GENERIC;
|
||||
//
|
||||
// i2c->hw->enable = 0;
|
||||
// // enable 10bit mode if requested
|
||||
// hw_write_masked(&i2c->hw->con, I2C_IC_CON_IC_10BITADDR_MASTER_BITS, (a10bit
|
||||
// ? I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_10BITS
|
||||
// : I2C_IC_CON_IC_10BITADDR_MASTER_VALUE_ADDR_7BITS ) << I2C_IC_CON_IC_10BITADDR_MASTER_LSB);
|
||||
// i2c->hw->tar = addr;
|
||||
// i2c->hw->enable = 1;
|
||||
//
|
||||
// if (len == 0) return i2cex_probe_address(addr, a10bit);
|
||||
//
|
||||
// bool abort = false, timeout = false;
|
||||
// uint32_t abort_reason = 0;
|
||||
// int byte_ctr;
|
||||
//
|
||||
// for (byte_ctr = 0; byte_ctr < (int)len; ++byte_ctr) {
|
||||
// bool first = byte_ctr == 0;
|
||||
// bool last = byte_ctr == (int)len - 1;
|
||||
//
|
||||
// while (!i2c_get_write_available(i2c) && !abort) {
|
||||
// tight_loop_contents();
|
||||
// // ?
|
||||
// if (timeout_check) {
|
||||
// timeout = timeout_check(ts);
|
||||
// abort |= timeout;
|
||||
// }
|
||||
// }
|
||||
//
|
||||
// if (timeout) {
|
||||
// // if we had a timeout, send an abort request to the hardware,
|
||||
// // so that the bus gets released
|
||||
// i2cex_abort_xfer(i2c);
|
||||
// }
|
||||
// if (abort) break;
|
||||
//
|
||||
// i2c->hw->data_cmd =
|
||||
// bool_to_bit(first && i2c->restart_on_next) << I2C_IC_DATA_CMD_RESTART_LSB |
|
||||
// bool_to_bit(last && !nostop) << I2C_IC_DATA_CMD_STOP_LSB |
|
||||
// I2C_IC_DATA_CMD_CMD_BITS; // -> 1 for read
|
||||
//
|
||||
// do {
|
||||
// abort_reason = i2c->hw->tx_abrt_source;
|
||||
// abort = (bool)i2c->hw->clr_tx_abrt;
|
||||
//
|
||||
// if (timeout_check) {
|
||||
// timeout = timeout_check(ts);
|
||||
// abort |= timeout;
|
||||
// }
|
||||
// tight_loop_contents(); // ?
|
||||
// } while (!abort && !i2c_get_read_available(i2c));
|
||||
//
|
||||
// if (timeout) {
|
||||
// // if we had a timeout, send an abort request to the hardware,
|
||||
// // so that the bus gets released
|
||||
// i2cex_abort_xfer(i2c);
|
||||
// }
|
||||
// if (abort) break;
|
||||
//
|
||||
// *dst++ = (uint8_t)i2c->hw->data_cmd;
|
||||
// }
|
||||
//
|
||||
// int rval;
|
||||
//
|
||||
// if (abort) {
|
||||
// const int addr_noack = I2C_IC_TX_ABRT_SOURCE_ABRT_7B_ADDR_NOACK_BITS
|
||||
// | I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR1_NOACK_BITS
|
||||
// | I2C_IC_TX_ABRT_SOURCE_ABRT_10ADDR2_NOACK_BITS;
|
||||
//
|
||||
// if (timeout) rval = PICO_ERROR_TIMEOUT;
|
||||
// else if (!abort_reason || (abort_reason & addr_noack))
|
||||
// rval = PICO_ERROR_GENERIC;
|
||||
// else rval = PICO_ERROR_GENERIC;
|
||||
// } else rval = byte_ctr;
|
||||
//
|
||||
// i2c->restart_on_next = nostop;
|
||||
// return rval;
|
||||
//}
|
||||
//static inline int i2cex_write_timeout_us(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
|
||||
// const uint8_t* src, size_t len, bool nostop, uint32_t timeout_us) {
|
||||
// absolute_time_t t = make_timeout_time_us(timeout_us);
|
||||
// return i2cex_write_blocking_until(i2c, addr, a10bit, src, len, nostop, t);
|
||||
//}
|
||||
//static inline int i2cex_read_timeout_us(i2c_inst_t* i2c, uint16_t addr, bool a10bit,
|
||||
// uint8_t* dst, size_t len, bool nostop, uint32_t timeout_us) {
|
||||
// absolute_time_t t = make_timeout_time_us(timeout_us);
|
||||
// return i2cex_read_blocking_until(i2c, addr, a10bit, dst, len, nostop, t);
|
||||
//}
|
||||
|
||||
__attribute__((__const__))
|
||||
enum ki2c_funcs i2ctu_get_func(void) {
|
||||
// TODO: 10bit addresses
|
||||
// TODO: SMBUS_EMUL_ALL => I2C_M_RECV_LEN
|
||||
// TODO: maybe also PROTOCOL_MANGLING, NOSTART
|
||||
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
|
||||
}
|
||||
|
||||
void i2ctu_init(void) {
|
||||
// default to 100 kHz (SDK example default so should be ok)
|
||||
//delay = 10; delay2 = 5;
|
||||
i2c_init(PINOUT_I2C_DEV, 100*1000);
|
||||
|
||||
gpio_set_function(PINOUT_I2C_SCL, GPIO_FUNC_I2C);
|
||||
|
|
@ -238,22 +363,43 @@ void i2ctu_init(void) {
|
|||
bi_decl(bi_2pins_with_func(PINOUT_I2C_SCL, PINOUT_I2C_SDA, GPIO_FUNC_I2C));
|
||||
}
|
||||
|
||||
uint32_t i2ctu_set_freq(uint32_t freq) {
|
||||
uint32_t i2ctu_set_freq(uint32_t freq, uint32_t us) {
|
||||
//delay = us;
|
||||
//delay2 = us >> 1;
|
||||
//if (!delay2) delay2 = 1;
|
||||
|
||||
return i2c_set_baudrate(PINOUT_I2C_DEV, freq);
|
||||
}
|
||||
|
||||
enum itu_status i2ctu_write(enum ki2c_flags flags, enum itu_command startstopflags,
|
||||
uint16_t addr, const uint8_t* buf, size_t len) {
|
||||
int rv = i2cex_write_timeout_us(PINOUT_I2C_DEV, addr, false, buf, len,
|
||||
if (len == 0) {
|
||||
// do a read, that's less hazardous
|
||||
uint8_t stuff = 0;
|
||||
int rv = i2c_read_timeout_us(PINOUT_I2C_DEV, addr/*&0x7f*/, /*false,*/ &stuff, 1,
|
||||
!(startstopflags & ITU_CMD_I2C_IO_END), 1000*1000);
|
||||
if (rv < 0) return ITU_STATUS_ADDR_NAK;
|
||||
return ITU_STATUS_ADDR_ACK;
|
||||
} else {
|
||||
int rv = i2c_write_timeout_us(PINOUT_I2C_DEV, addr, /*false,*/ buf, len,
|
||||
!(startstopflags & ITU_CMD_I2C_IO_END), 1000*1000);
|
||||
if (rv < 0 || (size_t)rv < len) return ITU_STATUS_ADDR_NAK;
|
||||
return ITU_STATUS_ADDR_ACK;
|
||||
}
|
||||
}
|
||||
enum itu_status i2ctu_read(enum ki2c_flags flags, enum itu_command startstopflags,
|
||||
uint16_t addr, uint8_t* buf, size_t len) {
|
||||
int rv = i2cex_read_timeout_us(PINOUT_I2C_DEV, addr, false, buf, len,
|
||||
if (len == 0) {
|
||||
uint8_t stuff = 0;
|
||||
int rv = i2c_read_timeout_us(PINOUT_I2C_DEV, addr, /*false,*/ &stuff, 1,
|
||||
!(startstopflags & ITU_CMD_I2C_IO_END), 1000*1000);
|
||||
if (rv < 0) return ITU_STATUS_ADDR_NAK;
|
||||
return ITU_STATUS_ADDR_ACK;
|
||||
} else {
|
||||
int rv = i2c_read_timeout_us(PINOUT_I2C_DEV, addr, /*false,*/ buf, len,
|
||||
!(startstopflags & ITU_CMD_I2C_IO_END), 1000*1000);
|
||||
if (rv < 0 || (size_t)rv < len) return ITU_STATUS_ADDR_NAK;
|
||||
return ITU_STATUS_ADDR_ACK;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -136,7 +136,7 @@ static u32 usb_func(struct i2c_adapter *adapter)
|
|||
}
|
||||
|
||||
ret = le32_to_cpup(pfunc);
|
||||
dev_warn(&adapter->dev, "itu func=%08x\n", ret);
|
||||
//dev_warn(&adapter->dev, "itu func=%08x\n", ret);
|
||||
out:
|
||||
kfree(pfunc);
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@ struct itu_cmd {
|
|||
__attribute__((__const__))
|
||||
enum ki2c_funcs i2ctu_get_func(void);
|
||||
void i2ctu_init(void);
|
||||
uint32_t i2ctu_set_freq(uint32_t freq); // returns selected frequency, or 0 on error
|
||||
uint32_t i2ctu_set_freq(uint32_t freq, uint32_t us); // returns selected frequency, or 0 on error
|
||||
enum itu_status i2ctu_write(enum ki2c_flags flags, enum itu_command startstopflags,
|
||||
uint16_t addr, const uint8_t* buf, size_t len);
|
||||
enum itu_status i2ctu_read(enum ki2c_flags flags, enum itu_command startstopflags,
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ static bool iub_ctl_req(uint8_t rhport, uint8_t stage, tusb_control_request_t co
|
|||
uint32_t us = req->wValue ? req->wValue : 1;
|
||||
uint32_t freq = 1000*1000 / us;
|
||||
|
||||
if (i2ctu_set_freq(freq) != 0) // returned an ok frequency
|
||||
if (i2ctu_set_freq(freq, us) != 0) // returned an ok frequency
|
||||
return tud_control_status(rhport, req);
|
||||
else return false;
|
||||
}
|
||||
|
|
@ -128,9 +128,6 @@ static bool iub_ctl_req(uint8_t rhport, uint8_t stage, tusb_control_request_t co
|
|||
} else { // write
|
||||
bool rv = tud_control_xfer(rhport, req, buf, cmd.len);
|
||||
if (rv) {
|
||||
uint8_t val = cmd.cmd;
|
||||
i2c_write_timeout_us(PINOUT_I2C_DEV, cmd.len, &val, 1, false, 1000*1000);
|
||||
|
||||
state = i2ctu_write(cmd.flags, cmd.cmd & ITU_CMD_I2C_IO_DIR_MASK,
|
||||
cmd.addr, buf, sizeof buf);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue