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base: sys64738:main
Branches Tags
sys64738:main
sys64738:sdk130
sys64738:cmsisdap-fixes
sys64738:isp-mehfet
sys64738:ftdiemul
sys64738:storage
sys64738:haskal/1wire
sys64738:haskal/packaging
sys64738:dynexec
..
compare: sys64738:isp-mehfet
Branches Tags
sys64738:main
sys64738:sdk130
sys64738:cmsisdap-fixes
sys64738:isp-mehfet
sys64738:ftdiemul
sys64738:storage
sys64738:haskal/1wire
sys64738:haskal/packaging
sys64738:dynexec

No commits in common. "main" and "isp-mehfet" have entirely different histories.
main ... isp-mehfet

18 changed files with 132 additions and 406 deletions
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3
.gitignore vendored
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@ -1,5 +1,6 @@
cmake-build/ cmake-build/
build*/ build/
build-flash/
ex/ ex/
compile_commands.json compile_commands.json
_old/ _old/

4
CMSIS-DAP/Firmware/Source/DAP.c
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@ -1642,12 +1642,10 @@ uint32_t DAP_ProcessCommand(const uint8_t *request, uint8_t *response) {
*response++ = *request; *response++ = *request;
//printf("dap cmd=%02hhx\n", *request);
switch (*request++) { switch (*request++) {
case ID_DAP_Info: case ID_DAP_Info:
num = DAP_Info(*request, response+1); num = DAP_Info(*request, response+1);
*response = (uint8_t)num; *response = (uint8_t)num;
//printf("cmd info\n");
return ((2U << 16) + 2U + num); return ((2U << 16) + 2U + num);
case ID_DAP_HostStatus: case ID_DAP_HostStatus:
@ -1754,11 +1752,9 @@ uint32_t DAP_ProcessCommand(const uint8_t *request, uint8_t *response) {
default: default:
*(response-1) = ID_DAP_Invalid; *(response-1) = ID_DAP_Invalid;
//printf("cmd invalid\n");
return ((1U << 16) | 1U); return ((1U << 16) | 1U);
} }
//printf("cmd end\n");
return ((1U << 16) + 1U + num); return ((1U << 16) + 1U + num);
} }

22
CMakeLists.txt
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@ -21,18 +21,21 @@ if(FAMILY STREQUAL "rp2040")
option(PICO_NO_FLASH "Disable writing the compiled program to flash, and only load it to RAM. Useful for testing, but not much else (OFF by default)." OFF) option(PICO_NO_FLASH "Disable writing the compiled program to flash, and only load it to RAM. Useful for testing, but not much else (OFF by default)." OFF)
option(PICO_COPY_TO_RAM "Run all code in RAM, while the program is also stored on flash. On bootup, everything will be copied to RAM (OFF by default)." OFF) option(PICO_COPY_TO_RAM "Run all code in RAM, while the program is also stored on flash. On bootup, everything will be copied to RAM (OFF by default)." OFF)
include(pico_sdk_import.cmake) if (USE_SYSTEMWIDE_PICOSDK)
set(TOP "${PICO_SDK_PATH}/lib/tinyusb") set(TOP "$ENV{PICO_SDK_PATH}/lib/tinyusb")
get_filename_component(TOP "${TOP}" REALPATH) get_filename_component(TOP "${TOP}" REALPATH)
include(cmake/pico_sdk_import.cmake)
else()
set(PICO_SDK_PATH ${TOP}/hw/mcu/raspberrypi/pico-sdk)
include(${PICO_SDK_PATH}/pico_sdk_init.cmake)
endif()
include(${TOP}/hw/bsp/${FAMILY}/family.cmake) # tinyusb stuff include(${TOP}/hw/bsp/${FAMILY}/family.cmake) # tinyusb stuff
include(${TOP}/hw/bsp/family_support.cmake) # tinyusb stuff
family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR}) family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
#set(PROJECT DragonProbe) project(${PROJECT})
project(${PROJECT} C CXX ASM) family_initialize_project(PROJECT ${CMAKE_CURRENT_LIST_DIR}) # calls pico_sdk_init()
#family_initialize_project(PROJECT ${CMAKE_CURRENT_LIST_DIR}) # calls pico_sdk_init() #pico_sdk_init()
pico_sdk_init()
#pico_set_program_name(${PROJECT} "${PROJECT}") #pico_set_program_name(${PROJECT} "${PROJECT}")
#pico_set_program_version(${PROJECT} "0.1") #pico_set_program_version(${PROJECT} "0.1")
@ -46,12 +49,9 @@ if(FAMILY STREQUAL "rp2040")
target_compile_definitions(${PROJECT} PUBLIC USE_USBCDC_FOR_STDIO=1 PICO_STDIO_USB=1) target_compile_definitions(${PROJECT} PUBLIC USE_USBCDC_FOR_STDIO=1 PICO_STDIO_USB=1)
else() else()
#pico_enable_stdio_uart(${PROJECT} 1) #pico_enable_stdio_uart(${PROJECT} 1)
#set_target_properties(${PROJECT} PROPERTIES PICO_TARGET_STDIO_UART 1)
endif() endif()
pico_enable_stdio_uart(${PROJECT} 1) pico_enable_stdio_uart(${PROJECT} 1)
pico_enable_stdio_usb(${PROJECT} 0) pico_enable_stdio_usb(${PROJECT} 0)
#set_target_properties(${PROJECT} PROPERTIES PICO_TARGET_STDIO_UART 1)
#set_target_properties(${PROJECT} PROPERTIES PICO_TARGET_STDIO_USB 0)
else() else()
message(FATAL_ERROR "Invalid FAMILY '${FAMILY}' specified") message(FATAL_ERROR "Invalid FAMILY '${FAMILY}' specified")
endif() endif()

4
bsp/rp2040/bsp-info.h
View File

@ -9,10 +9,6 @@
/*#define USB_VID 0x1d50*/ /* OpenMoko */ /*#define USB_VID 0x1d50*/ /* OpenMoko */
#define USB_PID 0x1312 #define USB_PID 0x1312
/* openFPGAloader silliness */
/*#define USB_VID 0x0d28*/ /* NXP */
/*#define USB_PID 0x0204*/ /* ARM mbed */
// TODO: other RP2040 boards // TODO: other RP2040 boards
#define INFO_BOARDNAME "RP2040 Pico" #define INFO_BOARDNAME "RP2040 Pico"

3
bsp/rp2040/m_default/bsp-feature.h
View File

@ -25,9 +25,8 @@ enum {
CDC_N__NITF CDC_N__NITF
}; };
enum { enum {
VND_N_CMSISDAP = 0,
#if CFG_TUD_VENDOR > 0 #if CFG_TUD_VENDOR > 0
VND_N_CFG, VND_N_CFG = 0,
#endif #endif
VND_N__NITF VND_N__NITF

8
bsp/rp2040/m_default/cdc_uart.c
View File

@ -48,10 +48,8 @@ void cdc_uart_init(void) {
gpio_set_function(PINOUT_UART_TX, GPIO_FUNC_UART); gpio_set_function(PINOUT_UART_TX, GPIO_FUNC_UART);
gpio_set_function(PINOUT_UART_RX, GPIO_FUNC_UART); gpio_set_function(PINOUT_UART_RX, GPIO_FUNC_UART);
gpio_set_function(PINOUT_UART_CTS, GPIO_FUNC_SIO);
gpio_set_function(PINOUT_UART_RTS, GPIO_FUNC_SIO);
uart_init(PINOUT_UART_INTERFACE, lc_brate/*PINOUT_UART_BAUDRATE*/); uart_init(PINOUT_UART_INTERFACE, lc_brate/*PINOUT_UART_BAUDRATE*/);
//uart_set_hw_flow(PINOUT_UART_INTERFACE, hwflow, hwflow); uart_set_hw_flow(PINOUT_UART_INTERFACE, hwflow, hwflow);
uart_set_format(PINOUT_UART_INTERFACE, lc_data, lc_stop, lc_parity); uart_set_format(PINOUT_UART_INTERFACE, lc_data, lc_stop, lc_parity);
bi_decl(bi_2pins_with_func(PINOUT_UART_TX, PINOUT_UART_RX, GPIO_FUNC_UART)); bi_decl(bi_2pins_with_func(PINOUT_UART_TX, PINOUT_UART_RX, GPIO_FUNC_UART));
@ -60,8 +58,6 @@ void cdc_uart_deinit(void) {
uart_deinit(PINOUT_UART_INTERFACE); uart_deinit(PINOUT_UART_INTERFACE);
gpio_set_function(PINOUT_UART_TX, GPIO_FUNC_NULL); gpio_set_function(PINOUT_UART_TX, GPIO_FUNC_NULL);
gpio_set_function(PINOUT_UART_RX, GPIO_FUNC_NULL); gpio_set_function(PINOUT_UART_RX, GPIO_FUNC_NULL);
gpio_set_function(PINOUT_UART_CTS, GPIO_FUNC_NULL);
gpio_set_function(PINOUT_UART_RTS, GPIO_FUNC_NULL);
} }
void cdc_uart_task(void) { void cdc_uart_task(void) {
@ -94,8 +90,6 @@ bool cdc_uart_get_hwflow(void) {
bool cdc_uart_set_hwflow(bool enable) { bool cdc_uart_set_hwflow(bool enable) {
hwflow = enable; hwflow = enable;
//uart_set_hw_flow(PINOUT_UART_INTERFACE, enable, enable); //uart_set_hw_flow(PINOUT_UART_INTERFACE, enable, enable);
// TODO: CTS
gpio_put(PINOUT_UART_RTS, enable);
return true; return true;
} }

176
bsp/rp2040/m_default/dap_jtag.c
View File

@ -17,24 +17,20 @@
int jtagsm = -1, jtagoffset = -1; int jtagsm = -1, jtagoffset = -1;
void PORT_OFF(void) { void PORT_OFF(void) {
//printf("disable\n"); if (jtagsm) {
if (jtagsm >= 0) {
pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, jtagsm, false); pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, jtagsm, false);
pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, jtagsm); pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, jtagsm);
} }
if (jtagoffset >= 0) { if (jtagoffset)
pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_jtag_program, jtagoffset); pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_jtag_program, jtagoffset);
}
jtagoffset = jtagsm = -1; jtagoffset = jtagsm = -1;
if (swdsm >= 0) { if (swdsm) {
pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, swdsm, false); pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, swdsm, false);
pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, swdsm); pio_sm_unclaim(PINOUT_JTAG_PIO_DEV, swdsm);
} }
if (swdoffset >= 0) { if (swdoffset)
pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_swd_program, swdoffset); pio_remove_program(PINOUT_JTAG_PIO_DEV, &dap_swd_program, swdoffset);
}
swdoffset = swdsm = -1;
sio_hw->gpio_oe_clr = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK | sio_hw->gpio_oe_clr = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK |
PINOUT_TDI_MASK //| PINOUT_TDO_MASK PINOUT_TDI_MASK //| PINOUT_TDO_MASK
@ -54,22 +50,17 @@ void PORT_JTAG_SETUP(void) {
sio_hw->gpio_oe_clr = PINOUT_TDO_MASK; sio_hw->gpio_oe_clr = PINOUT_TDO_MASK;
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TCK], hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TCK],
PADS_BANK0_GPIO0_IE_BITS // bits to set: input enable PADS_BANK0_GPIO0_IE_BITS, // bits to set: input enable
| (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), PADS_BANK0_GPIO0_IE_BITS |
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS // bits to mask out: input enable, output disable PADS_BANK0_GPIO0_OD_BITS); // bits to mask out: input enable, output disable
| PADS_BANK0_GPIO0_SLEWFAST_BITS); hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TMS], PADS_BANK0_GPIO0_IE_BITS,
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TMS], PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDI], PADS_BANK0_GPIO0_IE_BITS,
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
| PADS_BANK0_GPIO0_SLEWFAST_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDI],
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB),
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS
| PADS_BANK0_GPIO0_SLEWFAST_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDO], hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDO],
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS // TDO needs to have its output disabled PADS_BANK0_GPIO0_IE_BITS |
| (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), PADS_BANK0_GPIO0_OD_BITS, // TDO needs to have its output disabled
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS | PADS_BANK0_GPIO0_SLEWFAST_BITS); PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nTRST], PADS_BANK0_GPIO0_IE_BITS, hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nTRST], PADS_BANK0_GPIO0_IE_BITS,
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS); PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nRESET], PADS_BANK0_GPIO0_IE_BITS, hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nRESET], PADS_BANK0_GPIO0_IE_BITS,
@ -94,16 +85,16 @@ void PORT_JTAG_SETUP(void) {
| PINOUT_nTRST_MASK | PINOUT_nRESET_MASK; | PINOUT_nTRST_MASK | PINOUT_nRESET_MASK;
}*/ }*/
/*void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) { void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) {
uint32_t n = info & JTAG_SEQUENCE_TCK; uint32_t n = info & JTAG_SEQUENCE_TCK;
if (n == 0) n = 64; if (n == 0) n = 64;
// printf("seq hi 0x%lx\n", info); printf("seq hi 0x%lx\n", info);
//
// printf("%s", "tdi: "); printf("%s", "tdi: ");
// for (size_t j = 0; j < ((n + 7) >> 3); ++j) { for (size_t j = 0; j < ((n + 7) >> 3); ++j) {
// printf("0x%x ", ((const uint8_t*)tdi)[j]); printf("0x%x ", ((const uint8_t*)tdi)[j]);
// } }
if (info & JTAG_SEQUENCE_TMS) PIN_SWDIO_TMS_SET(); if (info & JTAG_SEQUENCE_TMS) PIN_SWDIO_TMS_SET();
else PIN_SWDIO_TMS_CLR(); else PIN_SWDIO_TMS_CLR();
@ -126,32 +117,17 @@ void PORT_JTAG_SETUP(void) {
n = info & JTAG_SEQUENCE_TCK; n = info & JTAG_SEQUENCE_TCK;
if (n == 0) n = 64; if (n == 0) n = 64;
// if (info & JTAG_SEQUENCE_TDO) { if (info & JTAG_SEQUENCE_TDO) {
// printf("%s", "\ntdo: "); printf("%s", "\ntdo: ");
// for (size_t j = 0; j < ((n + 7) >> 3); ++j) { for (size_t j = 0; j < ((n + 7) >> 3); ++j) {
// printf("0x%x ", ((const uint8_t*)tdo)[j]); printf("0x%x ", ((const uint8_t*)tdo)[j]);
// } }
// printf("%c", '\n'); printf("%c", '\n');
// } else printf("%s", "\nno tdo\n"); } else printf("%s", "\nno tdo\n");
}*/
void jtag_tms_seq(uint32_t count, const uint8_t* data) {
for (size_t i = 0; i < count; ++i) {
uint8_t byte = data[i >> 3],
bit = (byte >> (i & 7)) & 1;
if (bit) PIN_SWDIO_TMS_SET();
else PIN_SWDIO_TMS_CLR();
PIN_SWCLK_TCK_CLR();
PIN_DELAY_SLOW(DAP_Data.clock_delay);
PIN_SWCLK_TCK_SET();
PIN_DELAY_SLOW(DAP_Data.clock_delay);
}
} }
#else #else
void PORT_JTAG_SETUP(void) { void PORT_JTAG_SETUP(void) {
//printf("jtag setup\n");
resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS); resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS);
/* set to default high level */ /* set to default high level */
@ -163,22 +139,17 @@ void PORT_JTAG_SETUP(void) {
sio_hw->gpio_oe_clr = PINOUT_TDO_MASK; sio_hw->gpio_oe_clr = PINOUT_TDO_MASK;
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TCK], hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TCK],
PADS_BANK0_GPIO0_IE_BITS // bits to set: input enable PADS_BANK0_GPIO0_IE_BITS, // bits to set: input enable
| (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), PADS_BANK0_GPIO0_IE_BITS |
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS // bits to mask out: input enable, output disable PADS_BANK0_GPIO0_OD_BITS); // bits to mask out: input enable, output disable
| PADS_BANK0_GPIO0_SLEWFAST_BITS); hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TMS], PADS_BANK0_GPIO0_IE_BITS,
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TMS], PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDI], PADS_BANK0_GPIO0_IE_BITS,
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
| PADS_BANK0_GPIO0_SLEWFAST_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDI],
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB),
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS
| PADS_BANK0_GPIO0_SLEWFAST_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDO], hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_TDO],
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS // TDO needs to have its output disabled PADS_BANK0_GPIO0_IE_BITS |
| (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), PADS_BANK0_GPIO0_OD_BITS, // TDO needs to have its output disabled
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS | PADS_BANK0_GPIO0_SLEWFAST_BITS); PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nTRST], PADS_BANK0_GPIO0_IE_BITS, hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nTRST], PADS_BANK0_GPIO0_IE_BITS,
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS); PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nRESET], PADS_BANK0_GPIO0_IE_BITS, hw_write_masked(&padsbank0_hw->io[PINOUT_JTAG_nRESET], PADS_BANK0_GPIO0_IE_BITS,
@ -196,19 +167,14 @@ void PORT_JTAG_SETUP(void) {
iobank0_hw->io[PINOUT_JTAG_nTRST].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB; iobank0_hw->io[PINOUT_JTAG_nTRST].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
iobank0_hw->io[PINOUT_JTAG_nRESET].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB; iobank0_hw->io[PINOUT_JTAG_nRESET].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
if (jtagsm == -1) jtagsm = pio_claim_unused_sm(PINOUT_JTAG_PIO_DEV, false); if (jtagsm == -1) jtagsm = pio_claim_unused_sm(PINOUT_JTAG_PIO_DEV, true);
if (jtagoffset == -1) if (jtagoffset == -1)
jtagoffset = pio_add_program(PINOUT_JTAG_PIO_DEV, &dap_jtag_program); jtagoffset = pio_add_program(PINOUT_JTAG_PIO_DEV, &dap_jtag_program);
dap_jtag_program_init(PINOUT_JTAG_PIO_DEV, jtagsm, jtagoffset, dap_jtag_program_init(PINOUT_JTAG_PIO_DEV, jtagsm, jtagoffset,
50*1000, PINOUT_JTAG_TCK, PINOUT_JTAG_TDI, PINOUT_JTAG_TDO); 50*1000, PINOUT_JTAG_TCK, PINOUT_JTAG_TDI, PINOUT_JTAG_TDO);
} }
#define JTAG_SEQUENCE_NO_TMS 0x80000u /* should be large enough */
void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) { void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) {
//printf("jtag seq\n");
//pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, jtagsm, true);
float div = (float)clock_get_hz(clk_sys) / (4 * DAP_Data.clock_freq); float div = (float)clock_get_hz(clk_sys) / (4 * DAP_Data.clock_freq);
if (div < 2) div = 2; if (div < 2) div = 2;
else if (div > 65536) div = 65536; else if (div > 65536) div = 65536;
@ -219,10 +185,8 @@ void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) {
uint32_t n = info & JTAG_SEQUENCE_TCK; uint32_t n = info & JTAG_SEQUENCE_TCK;
if (n == 0) n = 64; if (n == 0) n = 64;
//if (!(n & JTAG_SEQUENCE_NO_TMS)) { if (info & JTAG_SEQUENCE_TMS) PIN_SWDIO_TMS_SET();
if (info & JTAG_SEQUENCE_TMS) PIN_SWDIO_TMS_SET(); else PIN_SWDIO_TMS_CLR();
else PIN_SWDIO_TMS_CLR();
//}
io_wo_8* tx = (io_wo_8*)&PINOUT_JTAG_PIO_DEV->txf[jtagsm]; io_wo_8* tx = (io_wo_8*)&PINOUT_JTAG_PIO_DEV->txf[jtagsm];
io_ro_8* rx = (io_ro_8*)&PINOUT_JTAG_PIO_DEV->rxf[jtagsm]; io_ro_8* rx = (io_ro_8*)&PINOUT_JTAG_PIO_DEV->rxf[jtagsm];
@ -232,9 +196,9 @@ void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) {
//printf("n=%lu bytelen=%lu last_shift=%lu\n", n, bytelen, last_shift); //printf("n=%lu bytelen=%lu last_shift=%lu\n", n, bytelen, last_shift);
uint32_t txremain = bytelen, uint32_t txremain = bytelen,
rxremain = last_shift ? bytelen : (bytelen + 1); rxremain = last_shift ? bytelen : (bytelen + 1);
//printf("txremain=%lu rxremain=%lu\n", txremain, rxremain); /*printf("txremain=%lu rxremain=%lu\n", txremain, rxremain);
/*printf("%s", "tdi: "); printf("%s", "tdi: ");
for (size_t j = 0; j < ((n + 7) >> 3); ++j) { for (size_t j = 0; j < ((n + 7) >> 3); ++j) {
printf("0x%x ", ((const uint8_t*)tdi)[j]); printf("0x%x ", ((const uint8_t*)tdi)[j]);
} }
@ -274,54 +238,6 @@ void JTAG_Sequence(uint32_t info, const uint8_t* tdi, uint8_t* tdo) {
} }
printf("%c", '\n'); printf("%c", '\n');
} else printf("%s", "no tdo\n");*/ } else printf("%s", "no tdo\n");*/
//pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, jtagsm, false);
}
void jtag_tms_seq(uint32_t count, const uint8_t* data) {
//printf("jtag tms seq\n");
// work around openFPGAloader bug (how did this even get here?)
if (DAP_Data.clock_delay == 0) {
DAP_Data.clock_delay = 8;
}
/*pio_sm_set_out_pins(PINOUT_JTAG_PIO_DEV, jtagsm, PINOUT_JTAG_TMS, 1);
pio_sm_set_set_pins(PINOUT_JTAG_PIO_DEV, jtagsm, PINOUT_JTAG_TMS, 1);
pio_sm_set_pins(PINOUT_JTAG_PIO_DEV, jtagsm, gpio_get(PINOUT_JTAG_TMS)?1:0);
gpio_set_function(PINOUT_JTAG_TMS, GPIO_FUNC_PIO0 + ((PINOUT_JTAG_PIO_DEV == pio0) ? 0 : 1));
for (uint32_t i = 0, n; i < count; i += n) {
n = count - i;
if (n == 0) break;
if (n > 64) n = 64;
n &= JTAG_SEQUENCE_TCK;
JTAG_Sequence(n | JTAG_SEQUENCE_NO_TMS, data, NULL);
}
gpio_put(PINOUT_JTAG_TMS, data[(count >> 3)] & (1 << (count & 7)));
gpio_set_function(PINOUT_JTAG_TMS, GPIO_FUNC_SIO);
pio_sm_set_out_pins(PINOUT_JTAG_PIO_DEV, jtagsm, PINOUT_JTAG_TDI, 1);
pio_sm_set_set_pins(PINOUT_JTAG_PIO_DEV, jtagsm, PINOUT_JTAG_TDI, 1);*/
// FIXME: above doesn't seem to work somehow -- so fall back to bit-banging
const uint8_t tdibit = 0xff;
PIN_SWCLK_TCK_SET();
gpio_set_function(PINOUT_JTAG_TMS, GPIO_FUNC_SIO);
gpio_set_function(PINOUT_JTAG_TCK, GPIO_FUNC_SIO);
for (size_t i = 0; i < count; ++i) {
uint8_t byte = data[i >> 3],
bit = byte & (1 << (i & 7));//(byte >> (i & 7)) & 1;
//JTAG_Sequence(1 | (bit ? JTAG_SEQUENCE_TMS : 0), &tdibit, NULL);
if (bit) PIN_SWDIO_TMS_SET();
else PIN_SWDIO_TMS_CLR();
PIN_SWCLK_TCK_CLR();
PIN_DELAY_SLOW(DAP_Data.clock_delay);
PIN_SWCLK_TCK_SET();
PIN_DELAY_SLOW(DAP_Data.clock_delay);
}
gpio_set_function(PINOUT_JTAG_TCK, GPIO_FUNC_PIO0);
} }
#endif #endif
@ -354,7 +270,6 @@ static void jtag_seq(uint32_t num, int tms, const void* tdi, void* tdo) {
} }
uint32_t JTAG_ReadIDCode(void) { uint32_t JTAG_ReadIDCode(void) {
//printf("jtag readID\n");
// tdi=NULL: ~~0xff!~~ repeat last-seen bit, ignore otherwise // tdi=NULL: ~~0xff!~~ repeat last-seen bit, ignore otherwise
// tdo=NULL: ignore // tdo=NULL: ignore
jtag_seq(1, JTAG_SEQUENCE_TMS, NULL, NULL); jtag_seq(1, JTAG_SEQUENCE_TMS, NULL, NULL);
@ -395,7 +310,6 @@ uint32_t JTAG_ReadIDCode(void) {
} }
void JTAG_IR(uint32_t ir) { void JTAG_IR(uint32_t ir) {
//printf("jtag IR\n");
jtag_seq(2,JTAG_SEQUENCE_TMS, NULL, NULL); jtag_seq(2,JTAG_SEQUENCE_TMS, NULL, NULL);
jtag_seq(2,0, NULL, NULL); jtag_seq(2,0, NULL, NULL);
uint64_t v = ~(uint64_t)0; uint64_t v = ~(uint64_t)0;
@ -497,7 +411,7 @@ static uint8_t xfer_base(uint32_t request, uint32_t* data, bool check_ack) {
exit: exit:
jtag_seq(1,JTAG_SEQUENCE_TMS, NULL, NULL); jtag_seq(1,JTAG_SEQUENCE_TMS, NULL, NULL);
jtag_seq(1,0, NULL, NULL); jtag_seq(1,0, NULL, NULL);
PIN_TDI_OUT(1); // TDI HI (no clk) PIN_TDI_OUT(1); // TODO: TDI HI (no clk)
if (request & DAP_TRANSFER_TIMESTAMP) DAP_Data.timestamp = TIMESTAMP_GET(); if (request & DAP_TRANSFER_TIMESTAMP) DAP_Data.timestamp = TIMESTAMP_GET();
if (check_ack) jtag_seq(DAP_Data.transfer.idle_cycles, 0, NULL, NULL); if (check_ack) jtag_seq(DAP_Data.transfer.idle_cycles, 0, NULL, NULL);
return (uint8_t)ack; return (uint8_t)ack;
@ -611,12 +525,10 @@ exit:
} }
void JTAG_WriteAbort(uint32_t data) { void JTAG_WriteAbort(uint32_t data) {
//printf("jtag wrabort\n");
xfer_base(0 /* write,A2=0,A3=0 */, &data, false); xfer_base(0 /* write,A2=0,A3=0 */, &data, false);
} }
uint8_t JTAG_Transfer(uint32_t request, uint32_t* data) { uint8_t JTAG_Transfer(uint32_t request, uint32_t* data) {
//printf("jtag xfer\n");
return xfer_base(request, data, true); return xfer_base(request, data, true);
} }
//#endif //#endif

1
bsp/rp2040/m_default/dap_jtag.pio
View File

@ -33,7 +33,6 @@ static inline void dap_jtag_program_init(PIO pio, uint sm, uint offset,
uint16_t freq, uint pin_tck, uint pin_tdi, uint pin_tdo) { uint16_t freq, uint pin_tck, uint pin_tdi, uint pin_tdo) {
pio_sm_config c = dap_jtag_program_get_default_config(offset); pio_sm_config c = dap_jtag_program_get_default_config(offset);
sm_config_set_out_pins(&c, pin_tdi, 1); sm_config_set_out_pins(&c, pin_tdi, 1);
//sm_config_set_set_pins(&c, pin_tdi, 1);
sm_config_set_in_pins(&c, pin_tdo); sm_config_set_in_pins(&c, pin_tdo);
sm_config_set_sideset_pins(&c, pin_tck); sm_config_set_sideset_pins(&c, pin_tck);
// (shift to left, autopush/pull, threshold=nbits) // (shift to left, autopush/pull, threshold=nbits)

77
bsp/rp2040/m_default/dap_swd.c
View File

@ -24,12 +24,10 @@ void PORT_SWD_SETUP(void) {
sio_hw->gpio_oe_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK; sio_hw->gpio_oe_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK;
sio_hw->gpio_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK; sio_hw->gpio_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK;
hw_write_masked(&padsbank0_hw->io[PINOUT_SWCLK], hw_write_masked(&padsbank0_hw->io[PINOUT_SWCLK], PADS_BANK0_GPIO0_IE_BITS,
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS | PADS_BANK0_GPIO0_SLEWFAST_BITS); hw_write_masked(&padsbank0_hw->io[PINOUT_SWDIO], PADS_BANK0_GPIO0_IE_BITS,
hw_write_masked(&padsbank0_hw->io[PINOUT_SWDIO], PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB),
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS | PADS_BANK0_GPIO0_SLEWFAST_BITS);
iobank0_hw->io[PINOUT_SWCLK].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB; iobank0_hw->io[PINOUT_SWCLK].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
iobank0_hw->io[PINOUT_SWDIO].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB; iobank0_hw->io[PINOUT_SWDIO].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
} }
@ -103,23 +101,20 @@ void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi) {
#else #else
void PORT_SWD_SETUP(void) { void PORT_SWD_SETUP(void) {
//printf("swd setup\n");
resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS); resets_hw->reset &= ~(RESETS_RESET_IO_BANK0_BITS | RESETS_RESET_PADS_BANK0_BITS);
/* set to default high level */ /* set to default high level */
sio_hw->gpio_oe_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK; sio_hw->gpio_oe_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK;
sio_hw->gpio_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK; sio_hw->gpio_set = PINOUT_SWCLK_MASK | PINOUT_SWDIO_MASK;
hw_write_masked(&padsbank0_hw->io[PINOUT_SWCLK], hw_write_masked(&padsbank0_hw->io[PINOUT_SWCLK], PADS_BANK0_GPIO0_IE_BITS,
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS | PADS_BANK0_GPIO0_SLEWFAST_BITS); hw_write_masked(&padsbank0_hw->io[PINOUT_SWDIO], PADS_BANK0_GPIO0_IE_BITS,
hw_write_masked(&padsbank0_hw->io[PINOUT_SWDIO], PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS);
PADS_BANK0_GPIO0_IE_BITS | (GPIO_SLEW_RATE_SLOW << PADS_BANK0_GPIO0_SLEWFAST_LSB), iobank0_hw->io[PINOUT_SWCLK].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
PADS_BANK0_GPIO0_IE_BITS | PADS_BANK0_GPIO0_OD_BITS | PADS_BANK0_GPIO0_SLEWFAST_BITS); iobank0_hw->io[PINOUT_SWDIO].ctrl = GPIO_FUNC_SIO << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
iobank0_hw->io[PINOUT_SWCLK].ctrl = GPIO_FUNC_PIO0 << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
iobank0_hw->io[PINOUT_SWDIO].ctrl = GPIO_FUNC_PIO0 << IO_BANK0_GPIO0_CTRL_FUNCSEL_LSB;
if (swdsm == -1) swdsm = pio_claim_unused_sm(PINOUT_JTAG_PIO_DEV, false); if (swdsm == -1) swdsm = pio_claim_unused_sm(PINOUT_JTAG_PIO_DEV, true);
if (swdoffset == -1) if (swdoffset == -1)
swdoffset = pio_add_program(PINOUT_JTAG_PIO_DEV, &dap_swd_program); swdoffset = pio_add_program(PINOUT_JTAG_PIO_DEV, &dap_swd_program);
dap_swd_program_init(PINOUT_JTAG_PIO_DEV, swdsm, swdoffset, dap_swd_program_init(PINOUT_JTAG_PIO_DEV, swdsm, swdoffset,
@ -143,7 +138,6 @@ inline static void PIN_SWDIO_SET_PIO(void) {
} }
void SWD_Sequence(uint32_t info, const uint8_t* swdo, uint8_t* swdi) { void SWD_Sequence(uint32_t info, const uint8_t* swdo, uint8_t* swdi) {
//printf("swd sequence\n");
pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, swdsm, true); pio_sm_set_enabled(PINOUT_JTAG_PIO_DEV, swdsm, true);
//busy_wait_us_32(0); //busy_wait_us_32(0);
@ -215,8 +209,7 @@ void SWD_Sequence(uint32_t info, const uint8_t* swdo, uint8_t* swdi) {
} }
#endif #endif
static void swd_seq(uint32_t count, uint32_t flags, const uint8_t* swdo, uint8_t* swdi) { void swd_seq(uint32_t count, uint32_t flags, const uint8_t* swdo, uint8_t* swdi) {
//printf("swd seqbase count=%lu\n", count);
static uint64_t last_bit = ~(uint64_t)0; static uint64_t last_bit = ~(uint64_t)0;
uint64_t devnull = 0; uint64_t devnull = 0;
@ -252,38 +245,24 @@ static void swd_seq(uint32_t count, uint32_t flags, const uint8_t* swdo, uint8_t
uint8_t lastbyte = swdo[((count + 7) >> 3) - 1]; uint8_t lastbyte = swdo[((count + 7) >> 3) - 1];
last_bit = (lastbyte & (1 << (count & 7))) ? ~(uint64_t)0 : (uint64_t)0; last_bit = (lastbyte & (1 << (count & 7))) ? ~(uint64_t)0 : (uint64_t)0;
} }
//printf("swd seqbase end\n");
} }
void jtag_tms_seq(uint32_t count, const uint8_t* data);
void SWJ_Sequence(uint32_t count, const uint8_t* data) { void SWJ_Sequence(uint32_t count, const uint8_t* data) {
//printf("swj sequence\n"); swd_seq(count, 0, data, NULL);
// we can't just do a swd_seq() call here, as the debugger might be in JTAG /*for (uint32_t i = 0, k = 0; i < count; ++i) {
// instead of SWD mode. if ((i & 7) == 0) {
val = data[k];
++k;
}
if ((swdsm == -1 || swdoffset == -1) && jtagsm >= 0 && jtagoffset >= 0) { swdio = (val >> (i & 7)) & 1;
jtag_tms_seq(count, data); // JTAG mode -- handle in JTAG code // SET SWDIO
} else if (swdsm >= 0 && swdoffset >= 0) { // SWCLK LO; DELAY; SWCLK HI; DELAY
swd_seq(count, 0, data, NULL); // SWD mode - we can do just this
} else {
//printf("E: SWJ_Sequence while not in JTAG or SBW mode\n");
// welp - can't really report an error to the upper CMSIS-DAP layers
jtag_tms_seq(count, data); // uses only SIO for now so ¯\_(ツ)_/¯
}
// hackier but stabler
/*jtag_tms_seq(count, data);
if (swdsm != -1 && swdoffset != -1 && jtagsm == -1 && jtagoffset == -1) {
gpio_set_function(PINOUT_JTAG_TMS, GPIO_FUNC_PIO0);
}*/ }*/
} }
uint8_t SWD_Transfer(uint32_t request, uint32_t* data) { uint8_t SWD_Transfer(uint32_t request, uint32_t* data) {
//printf("swd xfer request=%08lx\n", request);
uint32_t parity; uint32_t parity;
uint8_t swdo; uint8_t swdo;
@ -296,13 +275,11 @@ uint8_t SWD_Transfer(uint32_t request, uint32_t* data) {
uint8_t ack = 0; uint8_t ack = 0;
swd_seq(3, SWD_SEQUENCE_DIN, NULL, &ack); swd_seq(3, SWD_SEQUENCE_DIN, NULL, &ack);
//printf(" ack=%hhu\n", ack);
uint32_t num; uint32_t num;
switch (ack) { switch (ack) {
case DAP_TRANSFER_OK: case DAP_TRANSFER_OK:
if (request & DAP_TRANSFER_RnW) { if (request & DAP_TRANSFER_RnW) {
//printf(" xfer ok, r\n");
uint64_t val = 0; uint64_t val = 0;
parity = 0; parity = 0;
// FIXME: this is little-endian-only! // FIXME: this is little-endian-only!
@ -318,7 +295,6 @@ uint8_t SWD_Transfer(uint32_t request, uint32_t* data) {
//PIN_SWDIO_OUT_ENABLE(); //PIN_SWDIO_OUT_ENABLE();
} else { // write } else { // write
//printf(" xfer ok, w\n");
swd_seq(DAP_Data.swd_conf.turnaround, SWD_SEQUENCE_DIN, NULL, NULL); swd_seq(DAP_Data.swd_conf.turnaround, SWD_SEQUENCE_DIN, NULL, NULL);
//PIN_SWDIO_OUT_ENABLE(); //PIN_SWDIO_OUT_ENABLE();
@ -333,45 +309,36 @@ uint8_t SWD_Transfer(uint32_t request, uint32_t* data) {
swd_seq(33, 0, (const uint8_t*)&out, NULL); swd_seq(33, 0, (const uint8_t*)&out, NULL);
} }
//printf(" set ts\n");
if (request & DAP_TRANSFER_TIMESTAMP) DAP_Data.timestamp = TIMESTAMP_GET(); if (request & DAP_TRANSFER_TIMESTAMP) DAP_Data.timestamp = TIMESTAMP_GET();
num = DAP_Data.transfer.idle_cycles; num = DAP_Data.transfer.idle_cycles;
//printf(" idlecyc=%lu\n", num); for (uint32_t i = 0; i < num; num += 64) {
for (uint32_t i = 0; i < num; i += 64) {
uint64_t swdio = 0; uint64_t swdio = 0;
uint32_t cyc = num - i; uint32_t cyc = num - i;
if (cyc > 64) cyc = 64; if (cyc > 64) cyc = 64;
//printf(" sequence of %lu\n", cyc);
SWD_Sequence((cyc & SWD_SEQUENCE_CLK), (const uint8_t*)&swdio, NULL); SWD_Sequence((cyc & SWD_SEQUENCE_CLK), (const uint8_t*)&swdio, NULL);
} }
//printf(" idlecyc end\n");
break; break;
case DAP_TRANSFER_WAIT: case DAP_TRANSFER_FAULT: case DAP_TRANSFER_WAIT: case DAP_TRANSFER_FAULT:
num = DAP_Data.swd_conf.turnaround; num = DAP_Data.swd_conf.turnaround;
if (DAP_Data.swd_conf.data_phase && (request & DAP_TRANSFER_RnW)) { if (DAP_Data.swd_conf.data_phase && (request & DAP_TRANSFER_RnW)) {
num += 33; // 32 bits + parity num += 33; // 32 bits + parity
} }
//printf(" wait/fault: %lu\n", num);
swd_seq(num, SWD_SEQUENCE_DIN, NULL, NULL); swd_seq(num, SWD_SEQUENCE_DIN, NULL, NULL);
if (DAP_Data.swd_conf.data_phase && !(request & DAP_TRANSFER_RnW)) { if (DAP_Data.swd_conf.data_phase && !(request & DAP_TRANSFER_RnW)) {
//printf(" w/f dataphase\n");
uint64_t swdio = 0; uint64_t swdio = 0;
swd_seq(33, 0, (const uint8_t*)&swdio, NULL); // 32 data bits + parity swd_seq(33, 0, (const uint8_t*)&swdio, NULL); // 32 data bits + parity
} }
break; break;
default: // protocol error default: // protocol error
//printf(" proto error\n");
swd_seq(DAP_Data.swd_conf.turnaround + 33, SWD_SEQUENCE_DIN, NULL, NULL); swd_seq(DAP_Data.swd_conf.turnaround + 33, SWD_SEQUENCE_DIN, NULL, NULL);
break; break;
} }
//printf(" finished\n");
PIN_SWDIO_OUT_ENABLE(); PIN_SWDIO_OUT_ENABLE();
PIN_SWDIO_SET_PIO(); PIN_SWDIO_SET_PIO();
return ack; return ack;

2
bsp/rp2040/m_default/pinout.h
View File

@ -15,7 +15,7 @@
#define PINOUT_JTAG_TCK 2 // == SWCLK #define PINOUT_JTAG_TCK 2 // == SWCLK
#define PINOUT_JTAG_TMS 3 // == SWDIO #define PINOUT_JTAG_TMS 3 // == SWDIO
#define PINOUT_JTAG_TDI 4 #define PINOUT_JTAG_TDI 4
#define PINOUT_JTAG_TDO 5 // == SWO #define PINOUT_JTAG_TDO 5
#define PINOUT_JTAG_nTRST 6 #define PINOUT_JTAG_nTRST 6
#define PINOUT_JTAG_nRESET 7 #define PINOUT_JTAG_nRESET 7
#define PINOUT_JTAG_PIO_DEV pio0 #define PINOUT_JTAG_PIO_DEV pio0

3
bsp/rp2040/m_isp/bsp-feature.h
View File

@ -22,9 +22,8 @@ enum {
CDC_N__NITF CDC_N__NITF
}; };
enum { enum {
VND_N_CMSISDAP = 0,
#if CFG_TUD_VENDOR > 0 #if CFG_TUD_VENDOR > 0
VND_N_CFG, VND_N_CFG = 0,
#endif #endif
VND_N_MEHFET, VND_N_MEHFET,

16
bsp/rp2040/m_isp/sbw.pio
View File

@ -86,18 +86,18 @@ PUBLIC sbw_tms_seq:
; alternatively, one could set the "load-bearing instruction" to a ; alternatively, one could set the "load-bearing instruction" to a
; "set pins, 0/1 side 1 [12]" for a fixed value useful for single sets/clears ; "set pins, 0/1 side 1 [12]" for a fixed value useful for single sets/clears
PUBLIC sbw_tclk_burst: PUBLIC sbw_tclk_burst:
set pindirs, 1 side 1 ; SBWTDIO is now output set pindirs, 1 side 1 ; SBWTDIO is now output
; tms slot: ; tms slot:
set pins, 0 side 1 ; stay in run-test/idle TAP state set pins, 0 side 1 ; stay in run-test/idle TAP state
nop side 0 ; target reads TMS at falling edge nop side 0 ; target reads TMS at falling edge
mov pins, y side 0 ; during low phase, prepare TCLK mov pins, y side 0 ; during low phase, prepare TCLK
; tdi slot: ; tdi slot:
nop side 1 [6] ; wait a bit nop side 1 [12] ; wait a bit
burst_loop: burst_loop:
;PUBLIC sbw_tclk_burst_loadbearing_insn: ;PUBLIC sbw_tclk_burst_loadbearing_insn:
out pins, 1 side 1 [6] ; in the middle of TDI hiphase: do TCLK out pins, 1 side 1 [12] ; in the middle of TDI hiphase: do TCLK
jmp x--, burst_loop side 1 [6] jmp x--, burst_loop side 1 [12]
nop side 0 [1] ; need a low clock edge for TDO nop side 0 [1] ; need a low clock edge for TDO
; tdo slot: ; tdo slot:
set pindirs, 0 side 1 [1] set pindirs, 0 side 1 [1]
nop side 0 [1] nop side 0 [1]

4
bsp/rp2040/m_isp/sbw_hw.c
View File

@ -36,6 +36,7 @@ void sbw_preinit(bool nrst) {
gpio_put(PINOUT_SBW_TCK , true ); // start SBW stuff gpio_put(PINOUT_SBW_TCK , true ); // start SBW stuff
busy_wait_ms(5);//busy_wait_us_32(100); // wait a bit more*/ busy_wait_ms(5);//busy_wait_us_32(100); // wait a bit more*/
// TODO: test #if 0 & switch over if it works
#if 1 #if 1
(void)nrst; // always assumed nrst=false here :/ (void)nrst; // always assumed nrst=false here :/
// from slau320 sources // from slau320 sources
@ -77,7 +78,6 @@ void sbw_preinit(bool nrst) {
#else #else
// from MSP430.DLL 'BIOS' (FETUIF?) sources // from MSP430.DLL 'BIOS' (FETUIF?) sources
// can handle SBW/JTAG selection and nRST stuff // can handle SBW/JTAG selection and nRST stuff
// ... but it doesn't seem to work
// TEST = TCK // TEST = TCK
// nRESET = TDIO = NMI // nRESET = TDIO = NMI
@ -300,7 +300,7 @@ void sbw_clrset_tclk(bool value) {
void sbw_tclk_burst(uint32_t ncyc) { void sbw_tclk_burst(uint32_t ncyc) {
//sbw_pio_loadbearing_set_outpins(PINOUT_SBW_PIO); //sbw_pio_loadbearing_set_outpins(PINOUT_SBW_PIO);
uint32_t txremain = ((ncyc + 7) >> 3) * 2 - 1; uint32_t txremain = ((ncyc + 7) >> 3) * 2;
// MSB-first // MSB-first
uint8_t pattern = last_tclk ? 0x55 : 0xaa; uint8_t pattern = last_tclk ? 0x55 : 0xaa;

62
pico_sdk_import.cmake
View File

@ -1,62 +0,0 @@
# This is a copy of <PICO_SDK_PATH>/external/pico_sdk_import.cmake
# This can be dropped into an external project to help locate this SDK
# It should be include()ed prior to project()
if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH))
set(PICO_SDK_PATH $ENV{PICO_SDK_PATH})
message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')")
endif ()
if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT))
set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT})
message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')")
endif ()
if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH))
set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH})
message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')")
endif ()
set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK")
set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable")
set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK")
if (NOT PICO_SDK_PATH)
if (PICO_SDK_FETCH_FROM_GIT)
include(FetchContent)
set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR})
if (PICO_SDK_FETCH_FROM_GIT_PATH)
get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}")
endif ()
FetchContent_Declare(
pico_sdk
GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
GIT_TAG master
)
if (NOT pico_sdk)
message("Downloading Raspberry Pi Pico SDK")
FetchContent_Populate(pico_sdk)
set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR})
endif ()
set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE})
else ()
message(FATAL_ERROR
"SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git."
)
endif ()
endif ()
get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
if (NOT EXISTS ${PICO_SDK_PATH})
message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found")
endif ()
set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake)
if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE})
message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK")
endif ()
set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE)
include(${PICO_SDK_INIT_CMAKE_FILE})

103
src/m_default/_default.c
View File

@ -21,10 +21,6 @@
/* temperature sensor */ /* temperature sensor */
#include "m_default/tempsensor.h" #include "m_default/tempsensor.h"
// TODO: CMSIS-DAP USB bulk:
// * DAP_ExecuteCommand (returns response size)
// * interface: vendor, 0.0 subclass/proto, EP1, CMSIS-DAP in name
enum m_default_cmds { enum m_default_cmds {
mdef_cmd_spi = mode_cmd__specific, mdef_cmd_spi = mode_cmd__specific,
mdef_cmd_i2c, mdef_cmd_i2c,
@ -104,41 +100,6 @@ static void leave_cb(void) {
#endif #endif
} }
void dap_do_bulk_stuff(int itf) {
// FIXME: move to a separate file, maybe
/*static*/ uint8_t rx_buf[DAP_PACKET_SIZE];
/*static*/ uint8_t tx_buf[DAP_PACKET_SIZE];
//static uint32_t rxpos = 0;
const uint32_t rxpos=0;
if (tud_vendor_n_mounted(itf) && tud_vendor_n_available(itf)) {
memset(rx_buf, 0, DAP_PACKET_SIZE);
uint32_t avail = tud_vendor_n_read(itf, &rx_buf[rxpos], sizeof rx_buf - rxpos);
uint32_t pos2 = rxpos + avail;
if (avail) {
memset(tx_buf, 0, DAP_PACKET_SIZE);
uint32_t res = DAP_ExecuteCommand(&rx_buf[rxpos], tx_buf);
uint16_t respcount = (uint16_t)res,
reqcount = (uint16_t)(res>>16);
//printf("avail=%04lx resp=%04x req=%04x rxpos=%lx\n", avail, respcount, reqcount, rxpos);
if (reqcount > pos2) { // command requires more data than available, so, welp
tx_buf[0] = rx_buf[0]; // something
tx_buf[1] = 0xff;
tud_vendor_n_write(itf, tx_buf, 2);
//rxpos=0;//pos2;
} else {
tud_vendor_n_write(itf, tx_buf, respcount);
//memmove(rx_buf, &rx_buf[rxpos+reqcount], DAP_PACKET_SIZE - reqcount);
//rxpos = 0;
}
//printf("->rxpos=%lx\n", rxpos);
}
}
}
static void task_cb(void) { static void task_cb(void) {
#ifdef DBOARD_HAS_UART #ifdef DBOARD_HAS_UART
tud_task(); tud_task();
@ -148,8 +109,6 @@ static void task_cb(void) {
tud_task(); tud_task();
thread_enter(serprogthread); thread_enter(serprogthread);
#endif #endif
dap_do_bulk_stuff(VND_N_CMSISDAP);
} }
static void handle_cmd_cb(uint8_t cmd) { static void handle_cmd_cb(uint8_t cmd) {
@ -231,16 +190,12 @@ enum {
STRID_IF_VND_CFG, STRID_IF_VND_CFG,
STRID_IF_HID_CMSISDAP, STRID_IF_HID_CMSISDAP,
STRID_IF_VND_CMSISDAP,
STRID_IF_VND_I2CTINYUSB, STRID_IF_VND_I2CTINYUSB,
STRID_IF_CDC_UART, STRID_IF_CDC_UART,
STRID_IF_CDC_SERPROG, STRID_IF_CDC_SERPROG,
STRID_IF_CDC_STDIO, STRID_IF_CDC_STDIO,
}; };
enum { enum {
#ifdef DBOARD_HAS_CMSISDAP
ITF_NUM_VND_CMSISDAP,
#endif
#if CFG_TUD_VENDOR > 0 #if CFG_TUD_VENDOR > 0
ITF_NUM_VND_CFG, ITF_NUM_VND_CFG,
#endif #endif
@ -275,7 +230,6 @@ enum {
+ TUD_I2CTINYUSB_LEN + TUD_I2CTINYUSB_LEN
#endif #endif
#ifdef DBOARD_HAS_CMSISDAP #ifdef DBOARD_HAS_CMSISDAP
+ TUD_VENDOR_DESC_LEN
+ TUD_HID_INOUT_DESC_LEN + TUD_HID_INOUT_DESC_LEN
#endif #endif
#ifdef DBOARD_HAS_UART #ifdef DBOARD_HAS_UART
@ -289,20 +243,29 @@ enum {
#endif #endif
}; };
#define EPNUM_VND_DAP_OUT 0x01 #define EPNUM_VND_CFG_OUT 0x01
#define EPNUM_VND_DAP_IN 0x81 #define EPNUM_VND_CFG_IN 0x81
#define EPNUM_VND_CFG_OUT 0x02/*-1*/ #define EPNUM_HID_CMSISDAP 0x02
#define EPNUM_VND_CFG_IN 0x82/*-1*/ #define EPNUM_CDC_UART_OUT 0x03
#define EPNUM_HID_CMSISDAP 0x03/*-1*/ #define EPNUM_CDC_UART_IN 0x83
#define EPNUM_CDC_UART_OUT 0x04/*-1*/ #define EPNUM_CDC_UART_NOTIF 0x84
#define EPNUM_CDC_UART_IN 0x84/*-1*/ #define EPNUM_CDC_SERPROG_OUT 0x05
#define EPNUM_CDC_UART_NOTIF 0x85/*-1*/ #define EPNUM_CDC_SERPROG_IN 0x85
#define EPNUM_CDC_SERPROG_OUT 0x06/*-1*/ #define EPNUM_CDC_SERPROG_NOTIF 0x86
#define EPNUM_CDC_SERPROG_IN 0x86/*-1*/ #define EPNUM_CDC_STDIO_OUT 0x07
#define EPNUM_CDC_SERPROG_NOTIF 0x87/*-1*/ #define EPNUM_CDC_STDIO_IN 0x87
#define EPNUM_CDC_STDIO_OUT 0x08/*-1*/ #define EPNUM_CDC_STDIO_NOTIF 0x88
#define EPNUM_CDC_STDIO_IN 0x88/*-1*/
#define EPNUM_CDC_STDIO_NOTIF 0x89/*-1*/ /*#define EPNUM_CDC_UART_OUT 0x02
#define EPNUM_CDC_UART_IN 0x82
#define EPNUM_CDC_UART_NOTIF 0x83
#define EPNUM_HID_CMSISDAP 0x04
#define EPNUM_CDC_SERPROG_OUT 0x05
#define EPNUM_CDC_SERPROG_IN 0x85
#define EPNUM_CDC_SERPROG_NOTIF 0x86
#define EPNUM_CDC_STDIO_OUT 0x07
#define EPNUM_CDC_STDIO_IN 0x87
#define EPNUM_CDC_STDIO_NOTIF 0x88*/
// clang-format off // clang-format off
#if CFG_TUD_HID > 0 #if CFG_TUD_HID > 0
@ -315,11 +278,6 @@ static const uint8_t desc_configuration[] = {
TUD_CONFIG_DESCRIPTOR(1, ITF_NUM__TOTAL, STRID_CONFIG, CONFIG_TOTAL_LEN, TUD_CONFIG_DESCRIPTOR(1, ITF_NUM__TOTAL, STRID_CONFIG, CONFIG_TOTAL_LEN,
TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100), TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
#ifdef DBOARD_HAS_CMSISDAP
TUD_VENDOR_DESCRIPTOR_EX(ITF_NUM_VND_CMSISDAP, STRID_IF_VND_CMSISDAP, EPNUM_VND_DAP_OUT,
EPNUM_VND_DAP_IN, CFG_TUD_VENDOR_RX_BUFSIZE, 0, 0),
#endif
#if CFG_TUD_VENDOR > 0 #if CFG_TUD_VENDOR > 0
TUD_VENDOR_DESCRIPTOR_EX(ITF_NUM_VND_CFG, STRID_IF_VND_CFG, EPNUM_VND_CFG_OUT, TUD_VENDOR_DESCRIPTOR_EX(ITF_NUM_VND_CFG, STRID_IF_VND_CFG, EPNUM_VND_CFG_OUT,
EPNUM_VND_CFG_IN, CFG_TUD_VENDOR_RX_BUFSIZE, VND_CFG_SUBCLASS, VND_CFG_PROTOCOL), EPNUM_VND_CFG_IN, CFG_TUD_VENDOR_RX_BUFSIZE, VND_CFG_SUBCLASS, VND_CFG_PROTOCOL),
@ -363,7 +321,6 @@ static const char* string_desc_arr[] = {
// max string length check: ||||||||||||||||||||||||||||||| // max string length check: |||||||||||||||||||||||||||||||
[STRID_IF_VND_CFG ] = "Device cfg/ctl interface", [STRID_IF_VND_CFG ] = "Device cfg/ctl interface",
[STRID_IF_HID_CMSISDAP] = "CMSIS-DAP HID interface", [STRID_IF_HID_CMSISDAP] = "CMSIS-DAP HID interface",
[STRID_IF_VND_CMSISDAP] = "CMSIS-DAP bulk interface",
[STRID_IF_VND_I2CTINYUSB] = "I2C-Tiny-USB interface", [STRID_IF_VND_I2CTINYUSB] = "I2C-Tiny-USB interface",
[STRID_IF_CDC_UART] = "UART CDC interface", [STRID_IF_CDC_UART] = "UART CDC interface",
[STRID_IF_CDC_SERPROG] = "Serprog CDC interface", [STRID_IF_CDC_SERPROG] = "Serprog CDC interface",
@ -400,7 +357,6 @@ static void my_hid_set_report_cb(uint8_t instance, uint8_t report_id,
(void)report_id; (void)report_id;
(void)report_type; (void)report_type;
memset(tx_buffer, 0, CFG_TUD_HID_EP_BUFSIZE);
DAP_ProcessCommand(rx_buffer, tx_buffer); DAP_ProcessCommand(rx_buffer, tx_buffer);
tud_hid_report(0, tx_buffer, response_size); tud_hid_report(0, tx_buffer, response_size);
@ -469,16 +425,3 @@ struct mode m_01_default = {
}; };
// clang-format on // clang-format on
#if defined(DBOARD_HAS_UART)
// FIXME: use mode-specific callback here?
void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
(void)dtr;
if (mode_current != &m_01_default) return;
if (itf == CDC_N_UART) {
cdc_uart_set_hwflow(rts);
}
}
#endif

40
src/m_isp/_isp.c
View File

@ -93,8 +93,6 @@ static void leave_cb(void) {
#endif #endif
} }
void dap_do_bulk_stuff(int itf);
static void task_cb(void) { static void task_cb(void) {
#ifdef DBOARD_HAS_UART #ifdef DBOARD_HAS_UART
tud_task(); tud_task();
@ -104,8 +102,6 @@ static void task_cb(void) {
tud_task(); tud_task();
thread_enter(mehfetthread); thread_enter(mehfetthread);
#endif #endif
dap_do_bulk_stuff(VND_N_CMSISDAP);
} }
static void handle_cmd_cb(uint8_t cmd) { static void handle_cmd_cb(uint8_t cmd) {
@ -140,15 +136,11 @@ enum {
STRID_IF_VND_CFG, STRID_IF_VND_CFG,
STRID_IF_HID_CMSISDAP, STRID_IF_HID_CMSISDAP,
STRID_IF_VND_CMSISDAP,
STRID_IF_CDC_UART, STRID_IF_CDC_UART,
STRID_IF_VND_MEHFET, STRID_IF_VND_MEHFET,
STRID_IF_CDC_STDIO, STRID_IF_CDC_STDIO,
}; };
enum { enum {
#ifdef DBOARD_HAS_CMSISDAP
ITF_NUM_VND_CMSISDAP,
#endif
#if CFG_TUD_VENDOR > 0 #if CFG_TUD_VENDOR > 0
ITF_NUM_VND_CFG, ITF_NUM_VND_CFG,
#endif #endif
@ -176,7 +168,6 @@ enum {
+ TUD_VENDOR_DESC_LEN + TUD_VENDOR_DESC_LEN
#endif #endif
#ifdef DBOARD_HAS_CMSISDAP #ifdef DBOARD_HAS_CMSISDAP
+ TUD_VENDOR_DESC_LEN
+ TUD_HID_INOUT_DESC_LEN + TUD_HID_INOUT_DESC_LEN
#endif #endif
#ifdef DBOARD_HAS_UART #ifdef DBOARD_HAS_UART
@ -190,19 +181,17 @@ enum {
#endif #endif
}; };
#define EPNUM_VND_DAP_OUT 0x01 #define EPNUM_VND_CFG_OUT 0x01
#define EPNUM_VND_DAP_IN 0x81 #define EPNUM_VND_CFG_IN 0x81
#define EPNUM_VND_CFG_OUT 0x02/*-1*/ #define EPNUM_HID_CMSISDAP 0x02
#define EPNUM_VND_CFG_IN 0x82/*-1*/ #define EPNUM_CDC_UART_OUT 0x03
#define EPNUM_HID_CMSISDAP 0x03/*-1*/ #define EPNUM_CDC_UART_IN 0x83
#define EPNUM_CDC_UART_OUT 0x04/*-1*/ #define EPNUM_CDC_UART_NOTIF 0x84
#define EPNUM_CDC_UART_IN 0x84/*-1*/ #define EPNUM_VND_MEHFET_OUT 0x05
#define EPNUM_CDC_UART_NOTIF 0x85/*-1*/ #define EPNUM_VND_MEHFET_IN 0x85
#define EPNUM_VND_MEHFET_OUT 0x06/*-1*/ #define EPNUM_CDC_STDIO_OUT 0x06
#define EPNUM_VND_MEHFET_IN 0x86/*-1*/ #define EPNUM_CDC_STDIO_IN 0x86
#define EPNUM_CDC_STDIO_OUT 0x07/*-1*/ #define EPNUM_CDC_STDIO_NOTIF 0x87
#define EPNUM_CDC_STDIO_IN 0x87/*-1*/
#define EPNUM_CDC_STDIO_NOTIF 0x88/*-1*/
// clang-format off // clang-format off
#if CFG_TUD_HID > 0 #if CFG_TUD_HID > 0
@ -214,11 +203,6 @@ static const uint8_t desc_configuration[] = {
TUD_CONFIG_DESCRIPTOR(1, ITF_NUM__TOTAL, STRID_CONFIG, CONFIG_TOTAL_LEN, TUD_CONFIG_DESCRIPTOR(1, ITF_NUM__TOTAL, STRID_CONFIG, CONFIG_TOTAL_LEN,
TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100), TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
#ifdef DBOARD_HAS_CMSISDAP
TUD_VENDOR_DESCRIPTOR_EX(ITF_NUM_VND_CMSISDAP, STRID_IF_VND_CMSISDAP, EPNUM_VND_DAP_OUT,
EPNUM_VND_DAP_IN, CFG_TUD_VENDOR_RX_BUFSIZE, 0, 0),
#endif
#if CFG_TUD_VENDOR > 0 #if CFG_TUD_VENDOR > 0
TUD_VENDOR_DESCRIPTOR_EX(ITF_NUM_VND_CFG, STRID_IF_VND_CFG, EPNUM_VND_CFG_OUT, TUD_VENDOR_DESCRIPTOR_EX(ITF_NUM_VND_CFG, STRID_IF_VND_CFG, EPNUM_VND_CFG_OUT,
EPNUM_VND_CFG_IN, CFG_TUD_VENDOR_RX_BUFSIZE, VND_CFG_SUBCLASS, VND_CFG_PROTOCOL), EPNUM_VND_CFG_IN, CFG_TUD_VENDOR_RX_BUFSIZE, VND_CFG_SUBCLASS, VND_CFG_PROTOCOL),
@ -258,7 +242,6 @@ static const char* string_desc_arr[] = {
// max string length check: ||||||||||||||||||||||||||||||| // max string length check: |||||||||||||||||||||||||||||||
[STRID_IF_VND_CFG ] = "Device cfg/ctl interface", [STRID_IF_VND_CFG ] = "Device cfg/ctl interface",
[STRID_IF_HID_CMSISDAP] = "CMSIS-DAP HID interface", [STRID_IF_HID_CMSISDAP] = "CMSIS-DAP HID interface",
[STRID_IF_VND_CMSISDAP] = "CMSIS-DAP bulk interface",
[STRID_IF_CDC_UART] = "UART CDC interface", [STRID_IF_CDC_UART] = "UART CDC interface",
[STRID_IF_VND_MEHFET] = "MehFET MSP430 debug interface", [STRID_IF_VND_MEHFET] = "MehFET MSP430 debug interface",
#ifdef USE_USBCDC_FOR_STDIO #ifdef USE_USBCDC_FOR_STDIO
@ -294,7 +277,6 @@ static void my_hid_set_report_cb(uint8_t instance, uint8_t report_id,
(void)report_id; (void)report_id;
(void)report_type; (void)report_type;
memset(tx_buffer, 0, CFG_TUD_HID_EP_BUFSIZE);
DAP_ProcessCommand(rx_buffer, tx_buffer); DAP_ProcessCommand(rx_buffer, tx_buffer);
tud_hid_report(0, tx_buffer, response_size); tud_hid_report(0, tx_buffer, response_size);

8
src/tusb_config.h
View File

@ -51,14 +51,14 @@ extern "C" {
// Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise // Default to Highspeed for MCU with internal HighSpeed PHY (can be port specific), otherwise
// FullSpeed // FullSpeed
#ifndef BOARD_DEVICE_RHPORT_SPEED #ifndef BOARD_DEVICE_RHPORT_SPEED
/*#if (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ #if (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || \
CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_NUC505 || \ CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX || CFG_TUSB_MCU == OPT_MCU_NUC505 || \
CFG_TUSB_MCU == OPT_MCU_CXD56) \ CFG_TUSB_MCU == OPT_MCU_CXD56) \
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED
#else*/ #else
#define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED
//#endif #endif
#endif #endif
// Device mode with rhport and speed defined by board.mk // Device mode with rhport and speed defined by board.mk
@ -106,7 +106,7 @@ extern "C" {
//------------- CLASS -------------// //------------- CLASS -------------//
#define CFG_TUD_MSC 0 #define CFG_TUD_MSC 0
#define CFG_TUD_MIDI 0 #define CFG_TUD_MIDI 0
#define CFG_TUD_ECM_RNDIS 0 #define CFG_TUD_NET 0
// see also: bsp/<family>/bsp-info.h // see also: bsp/<family>/bsp-info.h
#define CFG_TUD_HID_EP_BUFSIZE 64 #define CFG_TUD_HID_EP_BUFSIZE 64

2
tinyusb

@ -1 +1 @@
Subproject commit 4bfab30c02279a0530e1a56f4a7c539f2d35a293 Subproject commit d49938d0f5052bce70e55c652b657c0a6a7e84fe