Nordic nRF51 series support
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Mike
parent
3077472620
commit
34d0f64529
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@ -0,0 +1,40 @@
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.global _start
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_start:
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ldr r0, _ready
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ldr r1, _addr
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mov r2, pc
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add r2, #(_data - . - 2)
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ldr r3, _size
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_next:
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cmp r3, #0
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beq _done
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@ Write data to flash
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ldr r4, [r2]
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str r4, [r1]
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_wait: @ Wait for READY bit
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ldr r4, [r0]
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mov r6, #1
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tst r4, r6
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beq _wait
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sub r3, #4
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add r1, #4
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add r2, #4
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b _next
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_done:
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bkpt
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@.align 4
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.org 0x24
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_ready:
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.word 0x4001E400
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_addr:
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.word 0
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_size:
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.word 12
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_data:
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.word 0xAAAAAAAA
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.word 0xBBBBBBBB
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.word 0xCCCCCCCC
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@ -28,6 +28,7 @@ SRC = \
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lpc11xx.c \
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lpc43xx.c \
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main.c \
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nrf51.c \
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platform.c \
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sam3x.c \
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stm32f1.c \
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@ -383,6 +383,7 @@ cortexm_probe(struct target_s *target)
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PROBE(lpc11xx_probe);
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PROBE(lpc43xx_probe);
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PROBE(sam3x_probe);
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PROBE(nrf51_probe);
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PROBE(lmi_probe);
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#undef PROBE
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@ -212,6 +212,7 @@ bool lmi_probe(struct target_s *target);
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bool lpc11xx_probe(struct target_s *target);
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bool lpc43xx_probe(struct target_s *target);
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bool sam3x_probe(struct target_s *target);
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bool nrf51_probe(struct target_s *target);
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#endif
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@ -0,0 +1,244 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2014 Mike Walters <mike@flomp.net>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements nRF51 target specific functions for detecting
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* the device, providing the XML memory map and Flash memory programming.
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*/
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#include <stdlib.h>
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#include <string.h>
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#include "general.h"
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#include "adiv5.h"
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#include "target.h"
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#include "command.h"
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#include "gdb_packet.h"
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static int nrf51_flash_erase(struct target_s *target, uint32_t addr, int len);
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static int nrf51_flash_write(struct target_s *target, uint32_t dest,
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const uint8_t *src, int len);
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static bool nrf51_cmd_erase_all(target *t);
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const struct command_s nrf51_cmd_list[] = {
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{"erase_mass", (cmd_handler)nrf51_cmd_erase_all, "Erase entire flash memory"},
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{NULL, NULL, NULL}
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};
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static const char nrf51_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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/* "<!DOCTYPE memory-map "
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" PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
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" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
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"<memory-map>"
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" <memory type=\"flash\" start=\"0x0\" length=\"0x40000\">"
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" <property name=\"blocksize\">0x400</property>"
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" </memory>"
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x4000\"/>"
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"</memory-map>";
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/* Non-Volatile Memory Controller (NVMC) Registers */
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#define NRF51_NVMC 0x4001E000
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#define NRF51_NVMC_READY (NRF51_NVMC + 0x400)
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#define NRF51_NVMC_CONFIG (NRF51_NVMC + 0x504)
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#define NRF51_NVMC_ERASEPAGE (NRF51_NVMC + 0x508)
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#define NRF51_NVMC_ERASEALL (NRF51_NVMC + 0x50C)
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#define NRF51_NVMC_ERASEUICR (NRF51_NVMC + 0x514)
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#define NRF51_NVMC_CONFIG_REN 0x0 // Read only access
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#define NRF51_NVMC_CONFIG_WEN 0x1 // Write enable
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#define NRF51_NVMC_CONFIG_EEN 0x2 // Erase enable
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/* Factory Information Configuration Registers (FICR) */
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#define NRF51_FICR 0x10000000
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#define NRF51_FICR_CODEPAGESIZE (NRF51_FICR + 0x010)
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#define NRF51_FICR_CODESIZE (NRF51_FICR + 0x014)
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#define NRF51_FICR_CONFIGID (NRF51_FICR + 0x05C)
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#define NRF51_PAGE_SIZE 1024
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uint16_t nrf51_flash_write_stub[] = {
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// _start:
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0x4808, // ldr r0, [pc, #32] ; (24 <_ready>)
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0x4909, // ldr r1, [pc, #36] ; (28 <_addr>)
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0x467a, // mov r2, pc
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0x3228, // adds r2, #40 ; 0x28
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0x4b08, // ldr r3, [pc, #32] ; (2c <_size>)
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// next:
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0x2b00, // cmp r3, #0
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0xd009, // beq.n 22 <_done>
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0x6814, // ldr r4, [r2, #0]
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0x600c, // str r4, [r1, #0]
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// wait:
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0x6804, // ldr r4, [r0, #0]
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0x2601, // movs r6, #1
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0x4234, // tst r4, r6
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0xd0fb, // beq.n 12 <_wait>
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0x3b04, // subs r3, #4
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0x3104, // adds r1, #4
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0x3204, // adds r2, #4
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0xe7f3, // b.n a <_next>
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// done:
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0xbe00, // bkpt 0x0000
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// ready:
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0xe400, 0x4001 // .word 0x4001e400
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// addr:
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// 0x0000, 0x0000
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// size:
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// 0x0000, 0x0000
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// data:
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// ...
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};
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bool nrf51_probe(struct target_s *target)
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{
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ADIv5_AP_t *ap = adiv5_target_ap(target);
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target->idcode = adiv5_ap_mem_read(ap, NRF51_FICR_CONFIGID) & 0xFFFF;
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switch (target->idcode) {
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case 0x001D:
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case 0x002A:
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case 0x0044:
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case 0x003C:
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case 0x0020:
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case 0x002F:
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case 0x0040:
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case 0x0047:
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case 0x004D:
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case 0x0026:
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case 0x004C:
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target->driver = "Nordic nRF51";
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target->xml_mem_map = nrf51_xml_memory_map;
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target->flash_erase = nrf51_flash_erase;
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target->flash_write = nrf51_flash_write;
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target_add_commands(target, nrf51_cmd_list, "nRF51");
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return true;
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}
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return false;
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}
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static int nrf51_flash_erase(struct target_s *target, uint32_t addr, int len)
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{
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ADIv5_AP_t *ap = adiv5_target_ap(target);
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addr &= ~(NRF51_PAGE_SIZE - 1);
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len &= ~(NRF51_PAGE_SIZE - 1);
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/* Enable erase */
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adiv5_ap_mem_write(ap, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_EEN);
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/* Poll for NVMC_READY */
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while(adiv5_ap_mem_read(ap, NRF51_NVMC_READY) == 0)
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if(target_check_error(target))
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return -1;
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while (len) {
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/* Write address of first word in page to erase it */
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adiv5_ap_mem_write(ap, NRF51_NVMC_ERASEPAGE, addr);
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/* Poll for NVMC_READY */
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while(adiv5_ap_mem_read(ap, NRF51_NVMC_READY) == 0)
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if(target_check_error(target))
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return -1;
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addr += NRF51_PAGE_SIZE;
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len -= NRF51_PAGE_SIZE;
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}
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/* Return to read-only */
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adiv5_ap_mem_write(ap, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_REN);
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/* Poll for NVMC_READY */
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while(adiv5_ap_mem_read(ap, NRF51_NVMC_READY) == 0)
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if(target_check_error(target))
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return -1;
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return 0;
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}
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static int nrf51_flash_write(struct target_s *target, uint32_t dest,
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const uint8_t *src, int len)
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{
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ADIv5_AP_t *ap = adiv5_target_ap(target);
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uint32_t offset = dest % 4;
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uint32_t words = (offset + len + 3) / 4;
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uint32_t data[2 + words];
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/* Construct data buffer used by stub */
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data[0] = dest - offset;
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data[1] = words * 4; /* length must always be a multiple of 4 */
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data[2] = 0xFFFFFFFF; /* pad partial words with all 1s to avoid */
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data[words + 1] = 0xFFFFFFFF; /* damaging overlapping areas */
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memcpy((uint8_t *)&data[2] + offset, src, len);
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/* Enable write */
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adiv5_ap_mem_write(ap, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_WEN);
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/* Poll for NVMC_READY */
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while(adiv5_ap_mem_read(ap, NRF51_NVMC_READY) == 0)
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if(target_check_error(target))
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return -1;
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/* Write stub and data to target ram and set PC */
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target_mem_write_words(target, 0x20000000, (void*)nrf51_flash_write_stub, 0x28);
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target_mem_write_words(target, 0x20000028, data, len + 8);
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target_pc_write(target, 0x20000000);
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if(target_check_error(target))
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return -1;
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/* Execute the stub */
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target_halt_resume(target, 0);
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while(!target_halt_wait(target));
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/* Return to read-only */
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adiv5_ap_mem_write(ap, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_REN);
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return 0;
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}
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static bool nrf51_cmd_erase_all(target *t)
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{
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ADIv5_AP_t *ap = adiv5_target_ap(t);
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/* Enable erase */
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adiv5_ap_mem_write(ap, NRF51_NVMC_CONFIG, NRF51_NVMC_CONFIG_EEN);
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/* Poll for NVMC_READY */
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while(adiv5_ap_mem_read(ap, NRF51_NVMC_READY) == 0)
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if(target_check_error(t))
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return false;
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/* Erase all */
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adiv5_ap_mem_write(ap, NRF51_NVMC_ERASEALL, 1);
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/* Poll for NVMC_READY */
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while(adiv5_ap_mem_read(ap, NRF51_NVMC_READY) == 0)
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if(target_check_error(t))
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return false;
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return true;
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}
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