platform: Implemented sub support in the non-native platforms for target clock tristating
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adcfe22f86
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@ -101,3 +101,8 @@ void platform_request_boot(void)
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SYSCFG_MEMRM &= ~3;
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SYSCFG_MEMRM |= 1;
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -142,3 +142,8 @@ void platform_target_set_power(const bool power)
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gpio_set_val(PWR_BR_PORT, PWR_BR_PIN, !power);
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}
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#endif
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -110,3 +110,8 @@ void platform_request_boot(void)
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magic[1] = BOOTMAGIC1;
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scb_reset_system();
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -115,3 +115,8 @@ void platform_request_boot(void)
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magic[1] = BOOTMAGIC1;
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scb_reset_system();
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -137,3 +137,8 @@ void platform_target_set_power(const bool power)
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gpio_set_val(PWR_BR_PORT, PWR_BR_PIN, !power);
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}
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#endif
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -105,3 +105,8 @@ void platform_request_boot(void)
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SYSCFG_MEMRM &= ~3;
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SYSCFG_MEMRM |= 1;
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -141,3 +141,8 @@ uint32_t platform_max_frequency_get(void)
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{
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return 0;
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -160,3 +160,8 @@ const char *platform_target_voltage(void)
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return ret;
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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@ -190,3 +190,8 @@ void set_idle_state(int state)
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break;
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}
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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