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target: target_addr type name cleanup

This commit is contained in:
Rafael Silva 2022-08-19 18:11:34 +01:00 committed by Rachel Mant
parent 21922676f9
commit 89a5c2a8a2
33 changed files with 246 additions and 277 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/command.c
View File

@ -641,10 +641,10 @@ static bool cmd_heapinfo(target *t, int argc, const char **argv)
if (t == NULL)
gdb_out("not attached\n");
else if (argc == 5) {
target_addr heap_base = strtoul(argv[1], NULL, 16);
target_addr heap_limit = strtoul(argv[2], NULL, 16);
target_addr stack_base = strtoul(argv[3], NULL, 16);
target_addr stack_limit = strtoul(argv[4], NULL, 16);
target_addr_t heap_base = strtoul(argv[1], NULL, 16);
target_addr_t heap_limit = strtoul(argv[2], NULL, 16);
target_addr_t stack_base = strtoul(argv[3], NULL, 16);
target_addr_t stack_limit = strtoul(argv[4], NULL, 16);
gdb_outf("heapinfo heap_base: %p heap_limit: %p stack_base: %p stack_limit: %p\n", heap_base, heap_limit,
stack_base, stack_limit);
target_set_heapinfo(t, heap_base, heap_limit, stack_base, stack_limit);

36
src/gdb_hostio.c
View File

@ -47,9 +47,8 @@ int hostio_reply(struct target_controller *tc, char *pbuf, int len)
}
/* Interface to host system calls */
int hostio_open(struct target_controller *tc,
target_addr path, size_t path_len,
enum target_open_flags flags, mode_t mode)
int hostio_open(
struct target_controller *tc, target_addr_t path, size_t path_len, enum target_open_flags flags, mode_t mode)
{
gdb_putpacket_f("Fopen,%08X/%X,%08X,%08X", path, path_len, flags, mode);
return gdb_main_loop(tc, true);
@ -61,58 +60,50 @@ int hostio_close(struct target_controller *tc, int fd)
return gdb_main_loop(tc, true);
}
int hostio_read(struct target_controller *tc,
int fd, target_addr buf, unsigned int count)
int hostio_read(struct target_controller *tc, int fd, target_addr_t buf, unsigned int count)
{
gdb_putpacket_f("Fread,%08X,%08X,%08X", fd, buf, count);
return gdb_main_loop(tc, true);
}
int hostio_write(struct target_controller *tc,
int fd, target_addr buf, unsigned int count)
int hostio_write(struct target_controller *tc, int fd, target_addr_t buf, unsigned int count)
{
gdb_putpacket_f("Fwrite,%08X,%08X,%08X", fd, buf, count);
return gdb_main_loop(tc, true);
}
long hostio_lseek(struct target_controller *tc,
int fd, long offset, enum target_seek_flag flag)
long hostio_lseek(struct target_controller *tc, int fd, long offset, enum target_seek_flag flag)
{
gdb_putpacket_f("Flseek,%08X,%08X,%08X", fd, offset, flag);
return gdb_main_loop(tc, true);
}
int hostio_rename(struct target_controller *tc,
target_addr oldpath, size_t old_len,
target_addr newpath, size_t new_len)
int hostio_rename(
struct target_controller *tc, target_addr_t oldpath, size_t old_len, target_addr_t newpath, size_t new_len)
{
gdb_putpacket_f("Frename,%08X/%X,%08X/%X",
oldpath, old_len, newpath, new_len);
gdb_putpacket_f("Frename,%08X/%X,%08X/%X", oldpath, old_len, newpath, new_len);
return gdb_main_loop(tc, true);
}
int hostio_unlink(struct target_controller *tc,
target_addr path, size_t path_len)
int hostio_unlink(struct target_controller *tc, target_addr_t path, size_t path_len)
{
gdb_putpacket_f("Funlink,%08X/%X", path, path_len);
return gdb_main_loop(tc, true);
}
int hostio_stat(struct target_controller *tc,
target_addr path, size_t path_len, target_addr buf)
int hostio_stat(struct target_controller *tc, target_addr_t path, size_t path_len, target_addr_t buf)
{
gdb_putpacket_f("Fstat,%08X/%X,%08X", path, path_len, buf);
return gdb_main_loop(tc, true);
}
int hostio_fstat(struct target_controller *tc, int fd, target_addr buf)
int hostio_fstat(struct target_controller *tc, int fd, target_addr_t buf)
{
gdb_putpacket_f("Ffstat,%X,%08X", fd, buf);
return gdb_main_loop(tc, true);
}
int hostio_gettimeofday(struct target_controller *tc,
target_addr tv, target_addr tz)
int hostio_gettimeofday(struct target_controller *tc, target_addr_t tv, target_addr_t tz)
{
gdb_putpacket_f("Fgettimeofday,%08X,%08X", tv, tz);
return gdb_main_loop(tc, true);
@ -124,8 +115,7 @@ int hostio_isatty(struct target_controller *tc, int fd)
return gdb_main_loop(tc, true);
}
int hostio_system(struct target_controller *tc,
target_addr cmd, size_t cmd_len)
int hostio_system(struct target_controller *tc, target_addr_t cmd, size_t cmd_len)
{
gdb_putpacket_f("Fsystem,%08X/%X", cmd, cmd_len);
return gdb_main_loop(tc, true);

33
src/gdb_hostio.h
View File

@ -26,28 +26,19 @@
int hostio_reply(struct target_controller *tc, char *packet, int len);
/* Interface to host system calls */
int hostio_open(struct target_controller *,
target_addr path, size_t path_len,
enum target_open_flags flags, mode_t mode);
int hostio_open(
struct target_controller *, target_addr_t path, size_t path_len, enum target_open_flags flags, mode_t mode);
int hostio_close(struct target_controller *, int fd);
int hostio_read(struct target_controller *,
int fd, target_addr buf, unsigned int count);
int hostio_write(struct target_controller *,
int fd, target_addr buf, unsigned int count);
long hostio_lseek(struct target_controller *,
int fd, long offset, enum target_seek_flag flag);
int hostio_rename(struct target_controller *,
target_addr oldpath, size_t old_len,
target_addr newpath, size_t new_len);
int hostio_unlink(struct target_controller *,
target_addr path, size_t path_len);
int hostio_stat(struct target_controller *,
target_addr path, size_t path_len, target_addr buf);
int hostio_fstat(struct target_controller *, int fd, target_addr buf);
int hostio_gettimeofday(struct target_controller *,
target_addr tv, target_addr tz);
int hostio_read(struct target_controller *, int fd, target_addr_t buf, unsigned int count);
int hostio_write(struct target_controller *, int fd, target_addr_t buf, unsigned int count);
long hostio_lseek(struct target_controller *, int fd, long offset, enum target_seek_flag flag);
int hostio_rename(
struct target_controller *, target_addr_t oldpath, size_t old_len, target_addr_t newpath, size_t new_len);
int hostio_unlink(struct target_controller *, target_addr_t path, size_t path_len);
int hostio_stat(struct target_controller *, target_addr_t path, size_t path_len, target_addr_t buf);
int hostio_fstat(struct target_controller *, int fd, target_addr_t buf);
int hostio_gettimeofday(struct target_controller *, target_addr_t tv, target_addr_t tz);
int hostio_isatty(struct target_controller *, int fd);
int hostio_system(struct target_controller *,
target_addr cmd, size_t cmd_len);
int hostio_system(struct target_controller *, target_addr_t cmd, size_t cmd_len);
#endif /* GDB_HOSTIO_H */

2
src/gdb_main.c
View File

@ -208,7 +208,7 @@ int gdb_main_loop(struct target_controller *tc, bool in_syscall)
case '?': { /* '?': Request reason for target halt */
/* This packet isn't documented as being mandatory,
* but GDB doesn't work without it. */
target_addr watch;
target_addr_t watch;
enum target_halt_reason reason;
if (!cur_target) {

53
src/include/target.h
View File

@ -31,7 +31,7 @@
#include <sys/types.h>
typedef struct target_s target;
typedef uint32_t target_addr;
typedef uint32_t target_addr_t;
struct target_controller;
#if PC_HOSTED == 1
@ -56,11 +56,11 @@ unsigned int target_part_id(target *t);
/* Memory access functions */
bool target_mem_map(target *t, char *buf, size_t len);
int target_mem_read(target *t, void *dest, target_addr src, size_t len);
int target_mem_write(target *t, target_addr dest, const void *src, size_t len);
int target_mem_read(target *t, void *dest, target_addr_t src, size_t len);
int target_mem_write(target *t, target_addr_t dest, const void *src, size_t len);
/* Flash memory access functions */
int target_flash_erase(target *t, target_addr addr, size_t len);
int target_flash_write(target *t, target_addr dest, const void *src, size_t len);
int target_flash_erase(target *t, target_addr_t addr, size_t len);
int target_flash_write(target *t, target_addr_t dest, const void *src, size_t len);
int target_flash_done(target *t);
/* Register access functions */
@ -84,11 +84,11 @@ enum target_halt_reason {
void target_reset(target *t);
void target_halt_request(target *t);
enum target_halt_reason target_halt_poll(target *t, target_addr *watch);
enum target_halt_reason target_halt_poll(target *t, target_addr_t *watch);
void target_halt_resume(target *t, bool step);
void target_set_cmdline(target *t, char *cmdline);
void target_set_heapinfo(target *t, target_addr heap_base, target_addr heap_limit,
target_addr stack_base, target_addr stack_limit);
void target_set_heapinfo(
target *t, target_addr_t heap_base, target_addr_t heap_limit, target_addr_t stack_base, target_addr_t stack_limit);
/* Break-/watchpoint functions */
enum target_breakwatch {
@ -98,8 +98,8 @@ enum target_breakwatch {
TARGET_WATCH_READ,
TARGET_WATCH_ACCESS,
};
int target_breakwatch_set(target *t, enum target_breakwatch, target_addr, size_t);
int target_breakwatch_clear(target *t, enum target_breakwatch, target_addr, size_t);
int target_breakwatch_set(target *t, enum target_breakwatch, target_addr_t, size_t);
int target_breakwatch_clear(target *t, enum target_breakwatch, target_addr_t, size_t);
/* Command interpreter */
void target_command_help(target *t);
@ -151,29 +151,20 @@ struct target_controller {
void (*printf)(struct target_controller *, const char *fmt, va_list);
/* Interface to host system calls */
int (*open)(struct target_controller *,
target_addr path, size_t path_len,
enum target_open_flags flags, mode_t mode);
int (*open)(
struct target_controller *, target_addr_t path, size_t path_len, enum target_open_flags flags, mode_t mode);
int (*close)(struct target_controller *, int fd);
int (*read)(struct target_controller *,
int fd, target_addr buf, unsigned int count);
int (*write)(struct target_controller *,
int fd, target_addr buf, unsigned int count);
long (*lseek)(struct target_controller *,
int fd, long offset, enum target_seek_flag flag);
int (*rename)(struct target_controller *,
target_addr oldpath, size_t old_len,
target_addr newpath, size_t new_len);
int (*unlink)(struct target_controller *,
target_addr path, size_t path_len);
int (*stat)(struct target_controller *,
target_addr path, size_t path_len, target_addr buf);
int (*fstat)(struct target_controller *, int fd, target_addr buf);
int (*gettimeofday)(struct target_controller *,
target_addr tv, target_addr tz);
int (*read)(struct target_controller *, int fd, target_addr_t buf, unsigned int count);
int (*write)(struct target_controller *, int fd, target_addr_t buf, unsigned int count);
long (*lseek)(struct target_controller *, int fd, long offset, enum target_seek_flag flag);
int (*rename)(
struct target_controller *, target_addr_t oldpath, size_t old_len, target_addr_t newpath, size_t new_len);
int (*unlink)(struct target_controller *, target_addr_t path, size_t path_len);
int (*stat)(struct target_controller *, target_addr_t path, size_t path_len, target_addr_t buf);
int (*fstat)(struct target_controller *, int fd, target_addr_t buf);
int (*gettimeofday)(struct target_controller *, target_addr_t tv, target_addr_t tz);
int (*isatty)(struct target_controller *, int fd);
int (*system)(struct target_controller *,
target_addr cmd, size_t cmd_len);
int (*system)(struct target_controller *, target_addr_t cmd, size_t cmd_len);
enum target_errno errno_;
bool interrupted;
};

4
src/rtt.c
View File

@ -285,7 +285,7 @@ static rtt_retval read_rtt(target *cur_target, uint32_t i)
/* target_mem_read, word aligned for speed.
note: dest has to be len + 8 bytes, to allow for alignment and padding.
*/
int target_aligned_mem_read(target *t, void *dest, target_addr src, size_t len)
int target_aligned_mem_read(target *t, void *dest, target_addr_t src, size_t len)
{
uint32_t src0 = src;
uint32_t len0 = len;
@ -395,7 +395,7 @@ void poll_rtt(target *cur_target)
bool rtt_busy = false;
if (last_poll_ms + poll_ms <= now || now < last_poll_ms) {
target_addr watch;
target_addr_t watch;
enum target_halt_reason reason;
bool resume_target = false;
if (!rtt_found)

10
src/target/ch32f1.c
View File

@ -34,8 +34,8 @@
extern const struct command_s stm32f1_cmd_list[]; // Reuse stm32f1 stuff
static int ch32f1_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int ch32f1_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int ch32f1_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int ch32f1_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
// these are common with stm32f1/gd32f1/...
#define FPEC_BASE 0x40022000
@ -200,7 +200,7 @@ bool ch32f1_probe(target *t)
\fn ch32f1_flash_erase
\brief fast erase of CH32
*/
int ch32f1_flash_erase(target_flash_s *f, target_addr addr, size_t len)
int ch32f1_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
volatile uint32_t sr, magic;
target *t = f->t;
@ -297,13 +297,13 @@ static int ch32f1_buffer_clear(target *t)
/**
*/
static int ch32f1_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int ch32f1_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
volatile uint32_t sr, magic;
target *t = f->t;
size_t length = len;
#ifdef CH32_VERIFY
target_addr org_dest = dest;
target_addr_t org_dest = dest;
const void *org_src = src;
#endif
DEBUG_INFO("CH32: flash write 0x%" PRIx32 " ,size=%" PRIu32 "\n", dest, (uint32_t)len);

11
src/target/cortexa.c
View File

@ -46,9 +46,8 @@ static void cortexa_regs_write_internal(target *t);
static ssize_t cortexa_reg_read(target *t, int reg, void *data, size_t max);
static ssize_t cortexa_reg_write(target *t, int reg, const void *data, size_t max);
static void cortexa_reset(target *t);
static enum target_halt_reason cortexa_halt_poll(target *t, target_addr *watch);
static enum target_halt_reason cortexa_halt_poll(target *t, target_addr_t *watch);
static void cortexa_halt_request(target *t);
static int cortexa_breakwatch_set(target *t, struct breakwatch *);
@ -234,7 +233,7 @@ static uint32_t va_to_pa(target *t, uint32_t va)
return pa;
}
static void cortexa_slow_mem_read(target *t, void *dest, target_addr src, size_t len)
static void cortexa_slow_mem_read(target *t, void *dest, target_addr_t src, size_t len)
{
struct cortexa_priv *priv = t->priv;
unsigned words = (len + (src & 3) + 3) / 4;
@ -273,7 +272,7 @@ static void cortexa_slow_mem_read(target *t, void *dest, target_addr src, size_t
}
}
static void cortexa_slow_mem_write_bytes(target *t, target_addr dest, const uint8_t *src, size_t len)
static void cortexa_slow_mem_write_bytes(target *t, target_addr_t dest, const uint8_t *src, size_t len)
{
struct cortexa_priv *priv = t->priv;
@ -292,7 +291,7 @@ static void cortexa_slow_mem_write_bytes(target *t, target_addr dest, const uint
}
}
static void cortexa_slow_mem_write(target *t, target_addr dest, const void *src, size_t len)
static void cortexa_slow_mem_write(target *t, target_addr_t dest, const void *src, size_t len)
{
struct cortexa_priv *priv = t->priv;
if (len == 0)
@ -622,7 +621,7 @@ static void cortexa_halt_request(target *t)
}
}
static enum target_halt_reason cortexa_halt_poll(target *t, target_addr *watch)
static enum target_halt_reason cortexa_halt_poll(target *t, target_addr_t *watch)
{
volatile uint32_t dbgdscr = 0;
volatile struct exception e;

74
src/target/cortexm.c
View File

@ -49,7 +49,7 @@
* where gdb runs, using gdb file i/o calls.
*/
#define TARGET_NULL ((target_addr)0)
#define TARGET_NULL ((target_addr_t)0)
#include <errno.h>
#include <time.h>
#include <sys/time.h>
@ -83,14 +83,14 @@ static ssize_t cortexm_reg_read(target *t, int reg, void *data, size_t max);
static ssize_t cortexm_reg_write(target *t, int reg, const void *data, size_t max);
static void cortexm_reset(target *t);
static enum target_halt_reason cortexm_halt_poll(target *t, target_addr *watch);
static enum target_halt_reason cortexm_halt_poll(target *t, target_addr_t *watch);
static void cortexm_halt_resume(target *t, bool step);
static void cortexm_halt_request(target *t);
static int cortexm_fault_unwind(target *t);
static int cortexm_breakwatch_set(target *t, struct breakwatch *);
static int cortexm_breakwatch_clear(target *t, struct breakwatch *);
static target_addr cortexm_check_watch(target *t);
static target_addr_t cortexm_check_watch(target *t);
#define CORTEXM_MAX_WATCHPOINTS 4U /* architecture says up to 15, no implementation has > 4 */
#define CORTEXM_MAX_BREAKPOINTS 8U /* architecture says up to 127, no implementation has > 8 */
@ -224,7 +224,7 @@ ADIv5_AP_t *cortexm_ap(target *t)
return ((struct cortexm_priv *)t->priv)->ap;
}
static void cortexm_cache_clean(target *t, target_addr addr, size_t len, bool invalidate)
static void cortexm_cache_clean(target *t, target_addr_t addr, size_t len, bool invalidate)
{
struct cortexm_priv *priv = t->priv;
if (!priv->has_cache || (priv->dcache_minline == 0))
@ -233,11 +233,11 @@ static void cortexm_cache_clean(target *t, target_addr addr, size_t len, bool in
size_t minline = priv->dcache_minline;
/* flush data cache for RAM regions that intersect requested region */
target_addr mem_end = addr + len; /* following code is NOP if wraparound */
target_addr_t mem_end = addr + len; /* following code is NOP if wraparound */
/* requested region is [src, src_end) */
for (struct target_ram *r = t->ram; r; r = r->next) {
target_addr ram = r->start;
target_addr ram_end = r->start + r->length;
target_addr_t ram = r->start;
target_addr_t ram_end = r->start + r->length;
/* RAM region is [ram, ram_end) */
if (addr > ram)
ram = addr;
@ -249,13 +249,13 @@ static void cortexm_cache_clean(target *t, target_addr addr, size_t len, bool in
}
}
static void cortexm_mem_read(target *t, void *dest, target_addr src, size_t len)
static void cortexm_mem_read(target *t, void *dest, target_addr_t src, size_t len)
{
cortexm_cache_clean(t, src, len, false);
adiv5_mem_read(cortexm_ap(t), dest, src, len);
}
static void cortexm_mem_write(target *t, target_addr dest, const void *src, size_t len)
static void cortexm_mem_write(target *t, target_addr_t dest, const void *src, size_t len)
{
cortexm_cache_clean(t, dest, len, true);
adiv5_mem_write(cortexm_ap(t), dest, src, len);
@ -675,7 +675,7 @@ static void cortexm_regs_write(target *t, const void *data)
}
}
int cortexm_mem_write_sized(target *t, target_addr dest, const void *src, size_t len, enum align align)
int cortexm_mem_write_sized(target *t, target_addr_t dest, const void *src, size_t len, enum align align)
{
cortexm_cache_clean(t, dest, len, true);
adiv5_mem_write_sized(cortexm_ap(t), dest, src, len, align);
@ -779,7 +779,7 @@ static void cortexm_halt_request(target *t)
}
}
static enum target_halt_reason cortexm_halt_poll(target *t, target_addr *watch)
static enum target_halt_reason cortexm_halt_poll(target *t, target_addr_t *watch)
{
struct cortexm_priv *priv = t->priv;
@ -1089,7 +1089,7 @@ static int cortexm_breakwatch_clear(target *t, struct breakwatch *bw)
}
}
static target_addr cortexm_check_watch(target *t)
static target_addr_t cortexm_check_watch(target *t)
{
struct cortexm_priv *priv = t->priv;
unsigned i;
@ -1158,7 +1158,7 @@ static bool cortexm_redirect_stdout(target *t, int argc, const char **argv)
#if PC_HOSTED == 0
/* probe memory access functions */
static void probe_mem_read(target *t __attribute__((unused)), void *probe_dest, target_addr target_src, size_t len)
static void probe_mem_read(target *t __attribute__((unused)), void *probe_dest, target_addr_t target_src, size_t len)
{
uint8_t *dst = (uint8_t *)probe_dest;
uint8_t *src = (uint8_t *)target_src;
@ -1169,7 +1169,7 @@ static void probe_mem_read(target *t __attribute__((unused)), void *probe_dest,
}
static void probe_mem_write(
target *t __attribute__((unused)), target_addr target_dest, const void *probe_src, size_t len)
target *t __attribute__((unused)), target_addr_t target_dest, const void *probe_src, size_t len)
{
uint8_t *dst = (uint8_t *)target_dest;
uint8_t *src = (uint8_t *)probe_src;
@ -1199,7 +1199,7 @@ static int cortexm_hostio_request(target *t)
/* code that runs in pc-hosted process. use linux system calls. */
case SEMIHOSTING_SYS_OPEN: { /* open */
target_addr fnam_taddr = params[0];
target_addr_t fnam_taddr = params[0];
uint32_t fnam_len = params[2];
ret = -1;
if (fnam_taddr == TARGET_NULL || fnam_len == 0)
@ -1253,7 +1253,7 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_READ: { /* read */
ret = -1;
target_addr buf_taddr = params[1];
target_addr_t buf_taddr = params[1];
uint32_t buf_len = params[2];
if (buf_taddr == TARGET_NULL)
break;
@ -1277,7 +1277,7 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_WRITE: { /* write */
ret = -1;
target_addr buf_taddr = params[1];
target_addr_t buf_taddr = params[1];
uint32_t buf_len = params[2];
if (buf_taddr == TARGET_NULL)
break;
@ -1303,7 +1303,7 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_WRITEC: { /* writec */
ret = -1;
uint8_t ch;
target_addr ch_taddr = arm_regs[1];
target_addr_t ch_taddr = arm_regs[1];
if (ch_taddr == TARGET_NULL)
break;
ch = target_mem_read8(t, ch_taddr);
@ -1317,7 +1317,7 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_WRITE0: { /* write0 */
ret = -1;
uint8_t ch;
target_addr str = arm_regs[1];
target_addr_t str = arm_regs[1];
if (str == TARGET_NULL)
break;
while ((ch = target_mem_read8(t, str++)) != '\0') {
@ -1344,13 +1344,13 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_RENAME: { /* rename */
ret = -1;
target_addr fnam1_taddr = params[0];
target_addr_t fnam1_taddr = params[0];
uint32_t fnam1_len = params[1];
if (fnam1_taddr == TARGET_NULL)
break;
if (fnam1_len == 0)
break;
target_addr fnam2_taddr = params[2];
target_addr_t fnam2_taddr = params[2];
uint32_t fnam2_len = params[3];
if (fnam2_taddr == TARGET_NULL)
break;
@ -1385,7 +1385,7 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_REMOVE: { /* unlink */
ret = -1;
target_addr fnam_taddr = params[0];
target_addr_t fnam_taddr = params[0];
if (fnam_taddr == TARGET_NULL)
break;
uint32_t fnam_len = params[1];
@ -1407,7 +1407,7 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_SYSTEM: { /* system */
ret = -1;
target_addr cmd_taddr = params[0];
target_addr_t cmd_taddr = params[0];
if (cmd_taddr == TARGET_NULL)
break;
uint32_t cmd_len = params[1];
@ -1522,8 +1522,8 @@ static int cortexm_hostio_request(target *t)
break;
case SEMIHOSTING_SYS_WRITE0: { /* write0 */
ret = -1;
target_addr str_begin = arm_regs[1];
target_addr str_end = str_begin;
target_addr_t str_begin = arm_regs[1];
target_addr_t str_end = str_begin;
while (target_mem_read8(t, str_end) != 0) {
if (target_check_error(t))
break;
@ -1562,13 +1562,13 @@ static int cortexm_hostio_request(target *t)
ret = -1;
uint32_t fio_stat[16]; /* same size as fio_stat in gdb/include/gdb/fileio.h */
//DEBUG("SYS_FLEN fio_stat addr %p\n", fio_stat);
void (*saved_mem_read)(target * t, void *dest, target_addr src, size_t len);
void (*saved_mem_write)(target * t, target_addr dest, const void *src, size_t len);
void (*saved_mem_read)(target * t, void *dest, target_addr_t src, size_t len);
void (*saved_mem_write)(target * t, target_addr_t dest, const void *src, size_t len);
saved_mem_read = t->mem_read;
saved_mem_write = t->mem_write;
t->mem_read = probe_mem_read;
t->mem_write = probe_mem_write;
int rc = tc_fstat(t, params[0] - 1, (target_addr)fio_stat); /* write fstat() result in fio_stat[] */
int rc = tc_fstat(t, params[0] - 1, (target_addr_t)fio_stat); /* write fstat() result in fio_stat[] */
t->mem_read = saved_mem_read;
t->mem_write = saved_mem_write;
if (rc)
@ -1592,14 +1592,14 @@ static int cortexm_hostio_request(target *t)
uint64_t ftv_usec;
} fio_timeval;
//DEBUG("SYS_TIME fio_timeval addr %p\n", &fio_timeval);
void (*saved_mem_read)(target * t, void *dest, target_addr src, size_t len);
void (*saved_mem_write)(target * t, target_addr dest, const void *src, size_t len);
void (*saved_mem_read)(target *t, void *dest, target_addr_t src, size_t len);
void (*saved_mem_write)(target *t, target_addr_t dest, const void *src, size_t len);
saved_mem_read = t->mem_read;
saved_mem_write = t->mem_write;
t->mem_read = probe_mem_read;
t->mem_write = probe_mem_write;
int rc = tc_gettimeofday(
t, (target_addr)&fio_timeval, (target_addr)NULL); /* write gettimeofday() result in fio_timeval[] */
t, (target_addr_t)&fio_timeval, (target_addr_t)NULL); /* write gettimeofday() result in fio_timeval[] */
t->mem_read = saved_mem_read;
t->mem_write = saved_mem_write;
if (rc)
@ -1622,13 +1622,13 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_READC: { /* readc */
uint8_t ch = '?';
//DEBUG("SYS_READC ch addr %p\n", &ch);
void (*saved_mem_read)(target * t, void *dest, target_addr src, size_t len);
void (*saved_mem_write)(target * t, target_addr dest, const void *src, size_t len);
void (*saved_mem_read)(target *t, void *dest, target_addr_t src, size_t len);
void (*saved_mem_write)(target *t, target_addr_t dest, const void *src, size_t len);
saved_mem_read = t->mem_read;
saved_mem_write = t->mem_write;
t->mem_read = probe_mem_read;
t->mem_write = probe_mem_write;
int rc = tc_read(t, STDIN_FILENO, (target_addr)&ch, 1); /* read a character in ch */
int rc = tc_read(t, STDIN_FILENO, (target_addr_t) &ch, 1); /* read a character in ch */
t->mem_read = saved_mem_read;
t->mem_write = saved_mem_write;
if (rc == 1)
@ -1656,8 +1656,8 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_GET_CMDLINE: { /* get_cmdline */
uint32_t retval[2];
ret = -1;
target_addr buf_ptr = params[0];
target_addr buf_len = params[1];
target_addr_t buf_ptr = params[0];
target_addr_t buf_len = params[1];
if (strlen(t->cmdline) + 1 > buf_len)
break;
if (target_mem_write(t, buf_ptr, t->cmdline, strlen(t->cmdline) + 1))
@ -1688,7 +1688,7 @@ static int cortexm_hostio_request(target *t)
case SEMIHOSTING_SYS_TMPNAM: { /* tmpnam */
/* Given a target identifier between 0 and 255, returns a temporary name */
target_addr buf_ptr = params[0];
target_addr_t buf_ptr = params[0];
int target_id = params[1];
int buf_size = params[2];
char fnam[] = "tempXX.tmp";

2
src/target/cortexm.h
View File

@ -191,6 +191,6 @@ ADIv5_AP_t *cortexm_ap(target *t);
bool cortexm_attach(target *t);
void cortexm_detach(target *t);
int cortexm_run_stub(target *t, uint32_t loadaddr, uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3);
int cortexm_mem_write_sized(target *t, target_addr dest, const void *src, size_t len, enum align align);
int cortexm_mem_write_sized(target *t, target_addr_t dest, const void *src, size_t len, enum align align);
#endif /* TARGET_CORTEXM_H */

10
src/target/efm32.c
View File

@ -45,8 +45,8 @@
#define SRAM_BASE 0x20000000
#define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(efm32_flash_write_stub), 4)
static int efm32_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int efm32_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int efm32_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int efm32_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool efm32_mass_erase(target *t);
static const uint16_t efm32_flash_write_stub[] = {
@ -494,7 +494,7 @@ static efm32_v2_di_miscchip_t efm32_v2_read_miscchip(target *t, uint8_t di_versi
/* Shared Functions */
/* -------------------------------------------------------------------------- */
static void efm32_add_flash(target *t, target_addr addr, size_t length, size_t page_size)
static void efm32_add_flash(target *t, target_addr_t addr, size_t length, size_t page_size)
{
target_flash_s *f = calloc(1, sizeof(*f));
if (!f) { /* calloc failed: heap exhaustion */
@ -595,7 +595,7 @@ bool efm32_probe(target *t)
}
/* Erase flash row by row */
static int efm32_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int efm32_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
@ -636,7 +636,7 @@ static int efm32_flash_erase(target_flash_s *f, target_addr addr, size_t len)
}
/* Write flash page by page */
static int efm32_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int efm32_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
(void)len;

10
src/target/kinetis.c
View File

@ -111,8 +111,8 @@ static bool kinetis_cmd_unsafe(target *t, int argc, char **argv)
return true;
}
static int kinetis_flash_cmd_erase(target_flash_s *f, target_addr addr, size_t len);
static int kinetis_flash_cmd_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int kinetis_flash_cmd_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int kinetis_flash_cmd_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static int kinetis_flash_done(target_flash_s *f);
struct kinetis_flash {
@ -432,7 +432,7 @@ static bool kinetis_fccob_cmd(target *t, uint8_t cmd, uint32_t addr, const uint3
return true;
}
static int kinetis_flash_cmd_erase(target_flash_s *const f, target_addr addr, size_t len)
static int kinetis_flash_cmd_erase(target_flash_s *const f, target_addr_t addr, size_t len)
{
while (len) {
if (kinetis_fccob_cmd(f->t, FTFx_CMD_ERASE_SECTOR, addr, NULL, 0)) {
@ -449,7 +449,7 @@ static int kinetis_flash_cmd_erase(target_flash_s *const f, target_addr addr, si
return 0;
}
static int kinetis_flash_cmd_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int kinetis_flash_cmd_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
struct kinetis_flash *const kf = (struct kinetis_flash *)f;
@ -524,7 +524,7 @@ const struct command_s kinetis_mdm_cmd_list[] = {
{NULL, NULL, NULL},
};
enum target_halt_reason mdm_halt_poll(target *t, const target_addr *const watch)
enum target_halt_reason mdm_halt_poll(target *t, const target_addr_t *const watch)
{
(void)t;
(void)watch;

8
src/target/lmi.c
View File

@ -60,8 +60,8 @@
#define LMI_FLASH_FMC_COMT (1 << 3)
#define LMI_FLASH_FMC_WRKEY 0xA4420000
static int lmi_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int lmi_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int lmi_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int lmi_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool lmi_mass_erase(target *t);
static const char lmi_driver_str[] = "TI Stellaris/Tiva";
@ -156,7 +156,7 @@ bool lmi_probe(target *const t)
}
}
static int lmi_flash_erase(target_flash_s *f, target_addr addr, const size_t len)
static int lmi_flash_erase(target_flash_s *f, target_addr_t addr, const size_t len)
{
target *t = f->t;
target_check_error(t);
@ -181,7 +181,7 @@ static int lmi_flash_erase(target_flash_s *f, target_addr addr, const size_t len
return 0;
}
static int lmi_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int lmi_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;
target_check_error(t);

4
src/target/lpc43xx.c
View File

@ -48,7 +48,7 @@
static bool lpc43xx_cmd_reset(target *t, int argc, const char *argv[]);
static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[]);
static int lpc43xx_flash_init(target *t);
static int lpc43xx_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int lpc43xx_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static bool lpc43xx_mass_erase(target *t);
static void lpc43xx_set_internal_clock(target *t);
static void lpc43xx_wdt_set_period(target *t);
@ -186,7 +186,7 @@ static int lpc43xx_flash_init(target *t)
return 0;
}
static int lpc43xx_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int lpc43xx_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
if (lpc43xx_flash_init(f->t))
return -1;

4
src/target/lpc546xx.c
View File

@ -54,7 +54,7 @@ static bool lpc546xx_cmd_write_sector(target *t, int argc, const char *argv[]);
static void lpc546xx_reset_attach(target *t);
static int lpc546xx_flash_init(target *t);
static int lpc546xx_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int lpc546xx_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static bool lpc546xx_mass_erase(target *t);
static void lpc546xx_wdt_set_period(target *t);
static void lpc546xx_wdt_pet(target *t);
@ -291,7 +291,7 @@ static int lpc546xx_flash_init(target *t)
return 0;
}
static int lpc546xx_flash_erase(target_flash_s *tf, target_addr addr, size_t len)
static int lpc546xx_flash_erase(target_flash_s *tf, target_addr_t addr, size_t len)
{
if (lpc546xx_flash_init(tf->t))
return -1;

12
src/target/lpc_common.c
View File

@ -70,9 +70,9 @@ char *iap_error[] = {
"Page is invalid",
};
static int lpc_flash_write(target_flash_s *tf, target_addr dest, const void *src, size_t len);
static int lpc_flash_write(target_flash_s *tf, target_addr_t dest, const void *src, size_t len);
struct lpc_flash *lpc_add_flash(target *t, target_addr addr, size_t length)
struct lpc_flash *lpc_add_flash(target *t, target_addr_t addr, size_t length)
{
struct lpc_flash *lf = calloc(1, sizeof(*lf));
target_flash_s *f;
@ -99,7 +99,7 @@ static uint8_t lpc_sector_for_addr(struct lpc_flash *f, uint32_t addr)
static inline bool lpc_is_full_erase(struct lpc_flash *f, const uint32_t begin, const uint32_t end)
{
const target_addr addr = f->f.start;
const target_addr_t addr = f->f.start;
const size_t len = f->f.length;
return begin == lpc_sector_for_addr(f, addr) && end == lpc_sector_for_addr(f, addr + len - 1U);
}
@ -182,7 +182,7 @@ enum iap_status lpc_iap_call(struct lpc_flash *f, void *result, enum iap_cmd cmd
#define LPX80X_SECTOR_SIZE 0x400
#define LPX80X_PAGE_SIZE 0x40
int lpc_flash_erase(target_flash_s *tf, target_addr addr, size_t len)
int lpc_flash_erase(target_flash_s *tf, target_addr_t addr, size_t len)
{
struct lpc_flash *f = (struct lpc_flash *)tf;
const uint32_t start = lpc_sector_for_addr(f, addr);
@ -220,7 +220,7 @@ int lpc_flash_erase(target_flash_s *tf, target_addr addr, size_t len)
return 0;
}
static int lpc_flash_write(target_flash_s *tf, target_addr dest, const void *src, size_t len)
static int lpc_flash_write(target_flash_s *tf, target_addr_t dest, const void *src, size_t len)
{
struct lpc_flash *f = (struct lpc_flash *)tf;
/* prepare... */
@ -257,7 +257,7 @@ static int lpc_flash_write(target_flash_s *tf, target_addr dest, const void *src
return 0;
}
int lpc_flash_write_magic_vect(target_flash_s *f, target_addr dest, const void *src, size_t len)
int lpc_flash_write_magic_vect(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
if (dest == 0) {
/* Fill in the magic vector to allow booting the flash */

6
src/target/lpc_common.h
View File

@ -80,9 +80,9 @@ struct lpc_flash {
uint32_t iap_msp;
};
struct lpc_flash *lpc_add_flash(target *t, target_addr addr, size_t length);
struct lpc_flash *lpc_add_flash(target *t, target_addr_t addr, size_t length);
enum iap_status lpc_iap_call(struct lpc_flash *f, void *result, enum iap_cmd cmd, ...);
int lpc_flash_erase(target_flash_s *f, target_addr addr, size_t len);
int lpc_flash_write_magic_vect(target_flash_s *f, target_addr dest, const void *src, size_t len);
int lpc_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
int lpc_flash_write_magic_vect(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
#endif /* TARGET_LPC_COMMON_H */

26
src/target/msp432.c
View File

@ -101,25 +101,25 @@
/* Support variables to call code in ROM */
struct msp432_flash {
target_flash_s f;
target_addr flash_protect_register; /* Address of the WEPROT register*/
target_addr FlashCtl_eraseSector; /* Erase flash sector routine in ROM*/
target_addr FlashCtl_programMemory; /* Flash programming routine in ROM */
target_addr_t flash_protect_register; /* Address of the WEPROT register*/
target_addr_t FlashCtl_eraseSector; /* Erase flash sector routine in ROM*/
target_addr_t FlashCtl_programMemory; /* Flash programming routine in ROM */
};
/* Flash operations */
static bool msp432_sector_erase(target_flash_s *f, target_addr addr);
static int msp432_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int msp432_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static bool msp432_sector_erase(target_flash_s *f, target_addr_t addr);
static int msp432_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int msp432_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
/* Utility functions */
/* Find the the target flash that conatins a specific address */
static target_flash_s *get_target_flash(target *t, target_addr addr);
static target_flash_s *get_target_flash(target *t, target_addr_t addr);
/* Call a subroutine in the MSP432 ROM (or anywhere else...)*/
static void msp432_call_ROM(target *t, uint32_t address, uint32_t regs[]);
/* Protect or unprotect the sector containing address */
static inline uint32_t msp432_sector_unprotect(struct msp432_flash *mf, target_addr addr)
static inline uint32_t msp432_sector_unprotect(struct msp432_flash *mf, target_addr_t addr)
{
/* Read the old protection register */
uint32_t old_mask = target_mem_read32(mf->f.t, mf->flash_protect_register);
@ -143,7 +143,7 @@ const struct command_s msp432_cmd_list[] = {
{"sector_erase", (cmd_handler)msp432_cmd_sector_erase, "Erase sector containing given address"},
{NULL, NULL, NULL}};
static void msp432_add_flash(target *t, uint32_t addr, size_t length, target_addr prot_reg)
static void msp432_add_flash(target *t, uint32_t addr, size_t length, target_addr_t prot_reg)
{
struct msp432_flash *mf = calloc(1, sizeof(*mf));
target_flash_s *f;
@ -227,7 +227,7 @@ bool msp432_probe(target *t)
/* Flash operations */
/* Erase a single sector at addr calling the ROM routine*/
static bool msp432_sector_erase(target_flash_s *f, target_addr addr)
static bool msp432_sector_erase(target_flash_s *f, target_addr_t addr)
{
target *t = f->t;
struct msp432_flash *mf = (struct msp432_flash *)f;
@ -257,7 +257,7 @@ static bool msp432_sector_erase(target_flash_s *f, target_addr addr)
}
/* Erase from addr for len bytes */
static int msp432_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int msp432_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
int ret = 0;
while (len) {
@ -275,7 +275,7 @@ static int msp432_flash_erase(target_flash_s *f, target_addr addr, size_t len)
}
/* Program flash */
static int msp432_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int msp432_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
struct msp432_flash *mf = (struct msp432_flash *)f;
target *t = f->t;
@ -347,7 +347,7 @@ static bool msp432_cmd_sector_erase(target *t, int argc, const char **argv)
}
/* Returns flash bank containing addr, or NULL if not found */
static target_flash_s *get_target_flash(target *t, target_addr addr)
static target_flash_s *get_target_flash(target *t, target_addr_t addr)
{
target_flash_s *f = t->flash;
while (f) {

8
src/target/nrf51.c
View File

@ -27,8 +27,8 @@
#include "cortexm.h"
#include "adiv5.h"
static int nrf51_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int nrf51_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int nrf51_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int nrf51_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool nrf51_mass_erase(target *t);
static bool nrf51_cmd_erase_uicr(target *t, int argc, const char **argv);
@ -159,7 +159,7 @@ bool nrf51_probe(target *t)
return true;
}
static int nrf51_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int nrf51_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
/* Enable erase */
@ -203,7 +203,7 @@ static int nrf51_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int nrf51_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int nrf51_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;

8
src/target/nxpke04.c
View File

@ -116,8 +116,8 @@ static const uint8_t cmdLen[] = {
/* Flash routines */
static bool ke04_command(target *t, uint8_t cmd, uint32_t addr, const uint8_t data[8]);
static int ke04_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int ke04_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int ke04_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int ke04_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static int ke04_flash_done(target_flash_s *f);
static bool ke04_mass_erase(target *t);
@ -322,7 +322,7 @@ static bool ke04_command(target *t, uint8_t cmd, uint32_t addr, const uint8_t da
return true;
}
static int ke04_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int ke04_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
while (len) {
if (ke04_command(f->t, CMD_ERASE_FLASH_SECTOR, addr, NULL)) {
@ -336,7 +336,7 @@ static int ke04_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int ke04_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int ke04_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
/* Ensure we don't write something horrible over the security byte */
target *t = f->t;

12
src/target/rp.c
View File

@ -150,14 +150,14 @@ const struct command_s rp_cmd_list[] = {
{NULL, NULL, NULL}
};
static int rp_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int rp_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int rp_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int rp_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool rp_read_rom_func_table(target *t);
static bool rp_attach(target *t);
static void rp_flash_prepare(target *t);
static void rp_flash_resume(target *t);
static void rp_spi_read(target *t, uint16_t command, target_addr address, void *buffer, size_t length);
static void rp_spi_read(target *t, uint16_t command, target_addr_t address, void *buffer, size_t length);
static uint32_t rp_get_flash_length(target *t);
static bool rp_mass_erase(target *t);
@ -383,7 +383,7 @@ static void rp_flash_resume(target *t)
* chip erase 5000/25000 ms
* page programm 0.4/ 3 ms
*/
static int rp_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int rp_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
DEBUG_INFO("Erase addr 0x%08" PRIx32 " len 0x%" PRIx32 "\n", addr, (uint32_t)len);
target *t = f->t;
@ -449,7 +449,7 @@ static int rp_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return ret;
}
static int rp_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int rp_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
DEBUG_INFO("RP Write 0x%08" PRIx32 " len 0x%" PRIx32 "\n", dest, (uint32_t)len);
target *t = f->t;
@ -505,7 +505,7 @@ static void rp_spi_chip_select(target *const t, const bool active)
}
static void rp_spi_read(
target *const t, const uint16_t command, const target_addr address, void *const buffer, const size_t length)
target *const t, const uint16_t command, const target_addr_t address, void *const buffer, const size_t length)
{
/* Ensure the controller is in the correct serial SPI mode and select the Flash */
const uint32_t ssi_enabled = target_mem_read32(t, RP_SSI_ENABLE);

12
src/target/sam3x.c
View File

@ -28,9 +28,9 @@
#include "target.h"
#include "target_internal.h"
static int sam_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int sam3_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int sam_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int sam_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int sam3_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int sam_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static int sam_gpnvm_get(target *t, uint32_t base, uint32_t *gpnvm);
@ -535,7 +535,7 @@ static enum sam_driver sam_driver(target *t)
return DRIVER_SAMX7X;
}
static int sam_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int sam_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
uint32_t base = ((struct sam_flash *)f)->eefc_base;
@ -561,7 +561,7 @@ static int sam_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int sam3_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int sam3_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
/* The SAM3X/SAM3N don't really have a page erase function.
* We do nothing here and use Erase/Write page in flash_write.
@ -570,7 +570,7 @@ static int sam3_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int sam_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int sam_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;
struct sam_flash *sf = (struct sam_flash *)f;

8
src/target/sam4l.c
View File

@ -103,8 +103,8 @@
#define FLASHCALW_FGPFRLO (FLASHCALW_BASE + 0x18)
static void sam4l_extended_reset(target *t);
static int sam4l_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int sam4l_flash_write_buf(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int sam4l_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int sam4l_flash_write_buf(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
/* why Atmel couldn't make it sequential ... */
static const size_t __ram_size[16] = {
@ -329,7 +329,7 @@ sam4l_flash_command(target *t, uint32_t page, uint32_t cmd)
* Write data from 'src' into flash using the algorithim provided by
* Atmel in their data sheet.
*/
static int sam4l_flash_write_buf(target_flash_s *f, target_addr addr, const void *src, size_t len)
static int sam4l_flash_write_buf(target_flash_s *f, target_addr_t addr, const void *src, size_t len)
{
target *t = f->t;
uint32_t *src_data = (uint32_t *)src;
@ -377,7 +377,7 @@ static int sam4l_flash_write_buf(target_flash_s *f, target_addr addr, const void
/*
* Erase flash across the addresses specified by addr and len
*/
static int sam4l_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int sam4l_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
uint16_t page;

8
src/target/samd.c
View File

@ -39,8 +39,8 @@
#include "target_internal.h"
#include "cortexm.h"
static int samd_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int samd_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int samd_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int samd_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
bool samd_mass_erase(target *t);
static bool samd_cmd_lock_flash(target *t, int argc, const char **argv);
@ -579,7 +579,7 @@ static void samd_unlock_current_address(target *t)
/*
* Erase flash row by row
*/
static int samd_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int samd_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
while (len) {
@ -615,7 +615,7 @@ static int samd_flash_erase(target_flash_s *f, target_addr addr, size_t len)
* Write flash page by page
*/
static int samd_flash_write(target_flash_s *f,
target_addr dest, const void *src, size_t len)
target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;

8
src/target/samx5x.c
View File

@ -38,8 +38,8 @@
#include "target_internal.h"
#include "cortexm.h"
static int samx5x_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int samx5x_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int samx5x_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int samx5x_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool samx5x_cmd_lock_flash(target *t, int argc, const char **argv);
static bool samx5x_cmd_unlock_flash(target *t, int argc, const char **argv);
static bool samx5x_cmd_unlock_bootprot(target *t, int argc, const char **argv);
@ -496,7 +496,7 @@ static int samx5x_check_nvm_error(target *t)
/**
* Erase flash block by block
*/
static int samx5x_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int samx5x_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
uint16_t errs = samx5x_read_nvm_error(t);
@ -562,7 +562,7 @@ static int samx5x_flash_erase(target_flash_s *f, target_addr addr, size_t len)
/**
* Write flash page by page
*/
static int samx5x_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int samx5x_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;
bool error = false;

12
src/target/stm32f1.c
View File

@ -46,8 +46,8 @@ const struct command_s stm32f1_cmd_list[] = {
{NULL, NULL, NULL}
};
static int stm32f1_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int stm32f1_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int stm32f1_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int stm32f1_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool stm32f1_mass_erase(target *t);
/* Flash Program ad Erase Controller Register Map */
@ -357,11 +357,11 @@ static int stm32f1_flash_unlock(target *t, uint32_t bank_offset)
return 0;
}
static int stm32f1_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int stm32f1_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
target_addr end = addr + len - 1;
target_addr start = addr;
target_addr_t end = addr + len - 1;
target_addr_t start = addr;
if (t->part_id == 0x430 && end >= FLASH_BANK_SPLIT)
if (stm32f1_flash_unlock(t, FLASH_BANK2_OFFSET))
@ -418,7 +418,7 @@ static int stm32f1_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int stm32f1_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int stm32f1_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;
uint32_t sr;

8
src/target/stm32f4.c
View File

@ -47,8 +47,8 @@ const struct command_s stm32f4_cmd_list[] = {
};
static bool stm32f4_attach(target *t);
static int stm32f4_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int stm32f4_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int stm32f4_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int stm32f4_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool stm32f4_mass_erase(target *t);
/* Flash Program and Erase Controller Register Map */
@ -390,7 +390,7 @@ static void stm32f4_flash_unlock(target *t)
}
}
static int stm32f4_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int stm32f4_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
struct stm32f4_flash *sf = (struct stm32f4_flash *)f;
@ -437,7 +437,7 @@ static int stm32f4_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int stm32f4_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int stm32f4_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
/* Translate ITCM addresses to AXIM */
if ((dest >= ITCM_BASE) && (dest < AXIM_BASE)) {

8
src/target/stm32g0.c
View File

@ -160,8 +160,8 @@ typedef struct stm32g0_priv {
static bool stm32g0_attach(target *t);
static void stm32g0_detach(target *t);
static int stm32g0_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int stm32g0_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int stm32g0_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int stm32g0_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool stm32g0_mass_erase(target *t);
/* Custom commands */
@ -340,7 +340,7 @@ static void stm32g0_flash_op_finish(target *t)
* Flash erasure function.
* OTP case: this function clears any previous error and returns.
*/
static int stm32g0_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int stm32g0_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *const t = f->t;
@ -402,7 +402,7 @@ static int stm32g0_flash_erase(target_flash_s *f, target_addr addr, size_t len)
* OTP area is programmed as the "program" area. It can be programmed 8-bytes
* by 8-bytes.
*/
static int stm32g0_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int stm32g0_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *const t = f->t;
stm32g0_priv_s *ps = (stm32g0_priv_s *)t->target_storage;

8
src/target/stm32h7.c
View File

@ -52,8 +52,8 @@ const struct command_s stm32h7_cmd_list[] = {
{NULL, NULL, NULL}
};
static int stm32h7_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int stm32h7_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int stm32h7_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int stm32h7_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool stm32h7_mass_erase(target *t);
static const char stm32h7_driver_str[] = "STM32H7";
@ -267,7 +267,7 @@ static bool stm32h7_flash_unlock(target *t, const uint32_t addr)
return !(target_mem_read32(t, regbase + FLASH_CR) & FLASH_CR_LOCK);
}
static int stm32h7_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int stm32h7_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
struct stm32h7_flash *sf = (struct stm32h7_flash *)f;
@ -307,7 +307,7 @@ static int stm32h7_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int stm32h7_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int stm32h7_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;
struct stm32h7_flash *sf = (struct stm32h7_flash *)f;

16
src/target/stm32l0.c
View File

@ -143,11 +143,11 @@
#define STM32L1_NVM_OPTR_BOR_LEV_M (0xf)
#define STM32L1_NVM_OPTR_SPRMOD (1 << 8)
static int stm32lx_nvm_prog_erase(target_flash_s *f, target_addr addr, size_t len);
static int stm32lx_nvm_prog_write(target_flash_s *f, target_addr destination, const void *src, size_t size);
static int stm32lx_nvm_prog_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int stm32lx_nvm_prog_write(target_flash_s *f, target_addr_t destination, const void *src, size_t size);
static int stm32lx_nvm_data_erase(target_flash_s *f, target_addr addr, size_t len);
static int stm32lx_nvm_data_write(target_flash_s *f, target_addr destination, const void *source, size_t size);
static int stm32lx_nvm_data_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int stm32lx_nvm_data_write(target_flash_s *f, target_addr_t destination, const void *source, size_t size);
static bool stm32lx_cmd_option(target *t, int argc, char **argv);
static bool stm32lx_cmd_eeprom(target *t, int argc, char **argv);
@ -325,7 +325,7 @@ static bool stm32lx_nvm_opt_unlock(target *t, uint32_t nvm)
interface. This is slower than stubbed versions(see NOTES). The
flash array is erased for all pages from addr to addr+len
inclusive. NVM register file address chosen from target. */
static int stm32lx_nvm_prog_erase(target_flash_s *f, target_addr addr, size_t len)
static int stm32lx_nvm_prog_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
const size_t page_size = f->blocksize;
@ -372,7 +372,7 @@ static int stm32lx_nvm_prog_erase(target_flash_s *f, target_addr addr, size_t le
/** Write to program flash using operations through the debug
interface. */
static int stm32lx_nvm_prog_write(target_flash_s *f, target_addr dest, const void *src, size_t size)
static int stm32lx_nvm_prog_write(target_flash_s *f, target_addr_t dest, const void *src, size_t size)
{
target *t = f->t;
const uint32_t nvm = stm32lx_nvm_phys(t);
@ -408,7 +408,7 @@ static int stm32lx_nvm_prog_write(target_flash_s *f, target_addr dest, const voi
interface . The flash is erased for all pages from addr to
addr+len, inclusive, on a word boundary. NVM register file
address chosen from target. */
static int stm32lx_nvm_data_erase(target_flash_s *f, target_addr addr, size_t len)
static int stm32lx_nvm_data_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
const size_t page_size = f->blocksize;
@ -458,7 +458,7 @@ static int stm32lx_nvm_data_erase(target_flash_s *f, target_addr addr, size_t le
NVM register file address chosen from target. Unaligned
destination writes are supported (though unaligned sources are
not). */
static int stm32lx_nvm_data_write(target_flash_s *f, target_addr destination, const void *src, size_t size)
static int stm32lx_nvm_data_write(target_flash_s *f, target_addr_t destination, const void *src, size_t size)
{
target *t = f->t;
const uint32_t nvm = stm32lx_nvm_phys(t);

8
src/target/stm32l4.c
View File

@ -53,8 +53,8 @@ const struct command_s stm32l4_cmd_list[] = {
{NULL, NULL, NULL}
};
static int stm32l4_flash_erase(target_flash_s *f, target_addr addr, size_t len);
static int stm32l4_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int stm32l4_flash_erase(target_flash_s *f, target_addr_t addr, size_t len);
static int stm32l4_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static bool stm32l4_mass_erase(target *t);
/* Flash Program ad Erase Controller Register Map */
@ -569,7 +569,7 @@ static void stm32l4_flash_unlock(target *t)
}
}
static int stm32l4_flash_erase(target_flash_s *f, target_addr addr, size_t len)
static int stm32l4_flash_erase(target_flash_s *f, target_addr_t addr, size_t len)
{
target *t = f->t;
stm32l4_flash_unlock(t);
@ -614,7 +614,7 @@ static int stm32l4_flash_erase(target_flash_s *f, target_addr addr, size_t len)
return 0;
}
static int stm32l4_flash_write(target_flash_s *f, target_addr dest, const void *src, size_t len)
static int stm32l4_flash_write(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
target *t = f->t;
stm32l4_flash_write32(t, FLASH_CR, FLASH_CR_PG);

46
src/target/target.c
View File

@ -29,7 +29,7 @@ target *target_list = NULL;
#define STDOUT_READ_BUF_SIZE 64
static int target_flash_write_buffered(target_flash_s *f, target_addr dest, const void *src, size_t len);
static int target_flash_write_buffered(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
static int target_flash_done_buffered(target_flash_s *f);
static bool target_cmd_mass_erase(target *t, int argc, const char **argv);
@ -196,7 +196,7 @@ target *target_attach(target *t, struct target_controller *tc)
return t;
}
void target_add_ram(target *t, target_addr start, uint32_t len)
void target_add_ram(target *t, target_addr_t start, uint32_t len)
{
struct target_ram *ram = malloc(sizeof(*ram));
if (!ram) { /* malloc failed: heap exhaustion */
@ -264,7 +264,7 @@ target_flash_s *target_flash_for_addr(target *t, uint32_t addr)
return NULL;
}
int target_flash_erase(target *t, target_addr addr, size_t len)
int target_flash_erase(target *t, target_addr_t addr, size_t len)
{
int ret = 0;
while (len) {
@ -282,7 +282,7 @@ int target_flash_erase(target *t, target_addr addr, size_t len)
return ret;
}
int target_flash_write(target *t, target_addr dest, const void *src, size_t len)
int target_flash_write(target *t, target_addr_t dest, const void *src, size_t len)
{
int ret = 0;
while (len) {
@ -319,7 +319,7 @@ int target_flash_done(target *t)
return 0;
}
int target_flash_write_buffered(target_flash_s *f, target_addr dest, const void *src, size_t len)
int target_flash_write_buffered(target_flash_s *f, target_addr_t dest, const void *src, size_t len)
{
int ret = 0;
@ -396,13 +396,13 @@ bool target_check_error(target *t) {
bool target_attached(target *t) { return t->attached; }
/* Memory access functions */
int target_mem_read(target *t, void *dest, target_addr src, size_t len)
int target_mem_read(target *t, void *dest, target_addr_t src, size_t len)
{
t->mem_read(t, dest, src, len);
return target_check_error(t);
}
int target_mem_write(target *t, target_addr dest, const void *src, size_t len)
int target_mem_write(target *t, target_addr_t dest, const void *src, size_t len)
{
t->mem_write(t, dest, src, len);
return target_check_error(t);
@ -443,7 +443,7 @@ void target_regs_write(target *t, const void *data)
/* Halt/resume functions */
void target_reset(target *t) { t->reset(t); }
void target_halt_request(target *t) { t->halt_request(t); }
enum target_halt_reason target_halt_poll(target *t, target_addr *watch)
enum target_halt_reason target_halt_poll(target *t, target_addr_t *watch)
{
return t->halt_poll(t, watch);
}
@ -460,8 +460,8 @@ void target_set_cmdline(target *t, char *cmdline) {
}
/* Set heapinfo for semihosting */
void target_set_heapinfo(target *t, target_addr heap_base, target_addr heap_limit,
target_addr stack_base, target_addr stack_limit) {
void target_set_heapinfo(target *t, target_addr_t heap_base, target_addr_t heap_limit,
target_addr_t stack_base, target_addr_t stack_limit) {
if (t == NULL) return;
t->heapinfo[0] = heap_base;
t->heapinfo[1] = heap_limit;
@ -471,7 +471,7 @@ void target_set_heapinfo(target *t, target_addr heap_base, target_addr heap_limi
/* Break-/watchpoint functions */
int target_breakwatch_set(target *t,
enum target_breakwatch type, target_addr addr, size_t len)
enum target_breakwatch type, target_addr_t addr, size_t len)
{
struct breakwatch bw = {
.type = type,
@ -501,7 +501,7 @@ int target_breakwatch_set(target *t,
}
int target_breakwatch_clear(target *t,
enum target_breakwatch type, target_addr addr, size_t len)
enum target_breakwatch type, target_addr_t addr, size_t len)
{
struct breakwatch *bwp = NULL, *bw;
int ret = 1;
@ -560,7 +560,7 @@ static bool target_cmd_range_erase(target *const t, const int argc, const char *
return false;
}
const target_addr aligned_addr = addr & ~(flash->blocksize - 1U);
const target_addr_t aligned_addr = addr & ~(flash->blocksize - 1U);
const uint32_t aligned_length = length + (addr - aligned_addr);
return target_flash_erase(t, aligned_addr, aligned_length) == 0;
}
@ -665,8 +665,7 @@ void tc_printf(target *t, const char *fmt, ...)
}
/* Interface to host system calls */
int tc_open(target *t, target_addr path, size_t plen,
enum target_open_flags flags, mode_t mode)
int tc_open(target *t, target_addr_t path, size_t plen, enum target_open_flags flags, mode_t mode)
{
if (t->tc->open == NULL) {
t->tc->errno_ = TARGET_ENFILE;
@ -684,14 +683,14 @@ int tc_close(target *t, int fd)
return t->tc->close(t->tc, fd);
}
int tc_read(target *t, int fd, target_addr buf, unsigned int count)
int tc_read(target *t, int fd, target_addr_t buf, unsigned int count)
{
if (t->tc->read == NULL)
return 0;
return t->tc->read(t->tc, fd, buf, count);
}
int tc_write(target *t, int fd, target_addr buf, unsigned int count)
int tc_write(target *t, int fd, target_addr_t buf, unsigned int count)
{
#ifdef PLATFORM_HAS_USBUART
if (t->stdout_redirected && (fd == STDOUT_FILENO || fd == STDERR_FILENO)) {
@ -721,8 +720,7 @@ long tc_lseek(target *t, int fd, long offset, enum target_seek_flag flag)
return t->tc->lseek(t->tc, fd, offset, flag);
}
int tc_rename(target *t, target_addr oldpath, size_t oldlen,
target_addr newpath, size_t newlen)
int tc_rename(target *t, target_addr_t oldpath, size_t oldlen, target_addr_t newpath, size_t newlen)
{
if (t->tc->rename == NULL) {
t->tc->errno_ = TARGET_ENOENT;
@ -731,7 +729,7 @@ int tc_rename(target *t, target_addr oldpath, size_t oldlen,
return t->tc->rename(t->tc, oldpath, oldlen, newpath, newlen);
}
int tc_unlink(target *t, target_addr path, size_t plen)
int tc_unlink(target *t, target_addr_t path, size_t plen)
{
if (t->tc->unlink == NULL) {
t->tc->errno_ = TARGET_ENOENT;
@ -740,7 +738,7 @@ int tc_unlink(target *t, target_addr path, size_t plen)
return t->tc->unlink(t->tc, path, plen);
}
int tc_stat(target *t, target_addr path, size_t plen, target_addr buf)
int tc_stat(target *t, target_addr_t path, size_t plen, target_addr_t buf)
{
if (t->tc->stat == NULL) {
t->tc->errno_ = TARGET_ENOENT;
@ -749,7 +747,7 @@ int tc_stat(target *t, target_addr path, size_t plen, target_addr buf)
return t->tc->stat(t->tc, path, plen, buf);
}
int tc_fstat(target *t, int fd, target_addr buf)
int tc_fstat(target *t, int fd, target_addr_t buf)
{
if (t->tc->fstat == NULL) {
return 0;
@ -757,7 +755,7 @@ int tc_fstat(target *t, int fd, target_addr buf)
return t->tc->fstat(t->tc, fd, buf);
}
int tc_gettimeofday(target *t, target_addr tv, target_addr tz)
int tc_gettimeofday(target *t, target_addr_t tv, target_addr_t tz)
{
if (t->tc->gettimeofday == NULL) {
return -1;
@ -773,7 +771,7 @@ int tc_isatty(target *t, int fd)
return t->tc->isatty(t->tc, fd);
}
int tc_system(target *t, target_addr cmd, size_t cmdlen)
int tc_system(target *t, target_addr_t cmd, size_t cmdlen)
{
if (t->tc->system == NULL) {
return -1;

40
src/target/target_internal.h
View File

@ -27,7 +27,7 @@ extern target *target_list;
target *target_new(void);
struct target_ram {
target_addr start;
target_addr_t start;
size_t length;
struct target_ram *next;
};
@ -35,13 +35,13 @@ struct target_ram {
typedef struct target_flash target_flash_s;
typedef int (*flash_prepare_func)(target_flash_s *f);
typedef int (*flash_erase_func)(target_flash_s *f, target_addr addr, size_t len);
typedef int (*flash_write_func)(target_flash_s *f, target_addr dest, const void *src, size_t len);
typedef int (*flash_erase_func)(target_flash_s *f, target_addr_t addr, size_t len);
typedef int (*flash_write_func)(target_flash_s *f, target_addr_t dest, const void *src, size_t len);
typedef int (*flash_done_func)(target_flash_s *f);
struct target_flash {
target *t; /* Target this flash is attached to */
target_addr start; /* start address of flash */
target_addr_t start; /* start address of flash */
size_t length; /* flash length */
size_t blocksize; /* erase block size */
size_t writesize; /* write operation size, must be <= blocksize */
@ -51,7 +51,7 @@ struct target_flash {
flash_write_func write; /* write to flash */
flash_done_func done; /* finish flash operations */
void *buf; /* buffer for flash operations */
target_addr buf_addr; /* address of block this buffer is for */
target_addr_t buf_addr; /* address of block this buffer is for */
target_flash_s *next; /* next flash in list */
};
@ -72,7 +72,7 @@ struct target_command_s {
struct breakwatch {
struct breakwatch *next;
enum target_breakwatch type;
target_addr addr;
target_addr_t addr;
size_t size;
uint32_t reserved[4]; /* for use by the implementing driver */
};
@ -89,8 +89,8 @@ struct target_s {
bool (*check_error)(target *t);
/* Memory access functions */
void (*mem_read)(target *t, void *dest, target_addr src, size_t len);
void (*mem_write)(target *t, target_addr dest, const void *src, size_t len);
void (*mem_read)(target *t, void *dest, target_addr_t src, size_t len);
void (*mem_write)(target *t, target_addr_t dest, const void *src, size_t len);
/* Register access functions */
size_t regs_size;
@ -104,7 +104,7 @@ struct target_s {
void (*reset)(target *t);
void (*extended_reset)(target *t);
void (*halt_request)(target *t);
enum target_halt_reason (*halt_poll)(target *t, target_addr *watch);
enum target_halt_reason (*halt_poll)(target *t, target_addr_t *watch);
void (*halt_resume)(target *t, bool step);
/* Break-/watchpoint functions */
@ -132,7 +132,7 @@ struct target_s {
uint32_t cpuid;
char *core;
char cmdline[MAX_CMDLINE];
target_addr heapinfo[4];
target_addr_t heapinfo[4];
struct target_command_s *commands;
#ifdef PLATFORM_HAS_USBUART
bool stdout_redirected;
@ -156,7 +156,7 @@ void target_ram_map_free(target *t);
void target_flash_map_free(target *t);
void target_mem_map_free(target *t);
void target_add_commands(target *t, const struct command_s *cmds, const char *name);
void target_add_ram(target *t, target_addr start, uint32_t len);
void target_add_ram(target *t, target_addr_t start, uint32_t len);
void target_add_flash(target *t, target_flash_s *f);
target_flash_s *target_flash_for_addr(target *t, uint32_t addr);
@ -174,17 +174,17 @@ bool target_check_error(target *t);
void tc_printf(target *t, const char *fmt, ...);
/* Interface to host system calls */
int tc_open(target *, target_addr path, size_t plen, enum target_open_flags flags, mode_t mode);
int tc_open(target *, target_addr_t path, size_t plen, enum target_open_flags flags, mode_t mode);
int tc_close(target *t, int fd);
int tc_read(target *t, int fd, target_addr buf, unsigned int count);
int tc_write(target *t, int fd, target_addr buf, unsigned int count);
int tc_read(target *t, int fd, target_addr_t buf, unsigned int count);
int tc_write(target *t, int fd, target_addr_t buf, unsigned int count);
long tc_lseek(target *t, int fd, long offset, enum target_seek_flag flag);
int tc_rename(target *t, target_addr oldpath, size_t oldlen, target_addr newpath, size_t newlen);
int tc_unlink(target *t, target_addr path, size_t plen);
int tc_stat(target *t, target_addr path, size_t plen, target_addr buf);
int tc_fstat(target *t, int fd, target_addr buf);
int tc_gettimeofday(target *t, target_addr tv, target_addr tz);
int tc_rename(target *t, target_addr_t oldpath, size_t oldlen, target_addr_t newpath, size_t newlen);
int tc_unlink(target *t, target_addr_t path, size_t plen);
int tc_stat(target *t, target_addr_t path, size_t plen, target_addr_t buf);
int tc_fstat(target *t, int fd, target_addr_t buf);
int tc_gettimeofday(target *t, target_addr_t tv, target_addr_t tz);
int tc_isatty(target *t, int fd);
int tc_system(target *t, target_addr cmd, size_t cmdlen);
int tc_system(target *t, target_addr_t cmd, size_t cmdlen);
#endif /* TARGET_TARGET_INTERNAL_H */