usbuart: Moved aux_serial_init() into aux_serial.c
This commit is contained in:
dragonmux
Piotr Esden-Tempski
parent
4ec95994a7
commit
a3703186be
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@ -19,6 +19,7 @@
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*/
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#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32F4)
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/dma.h>
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#elif defined(LM4F)
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@ -26,6 +27,7 @@
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#else
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#error "Unknown processor target"
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#endif
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/usb/usbd.h>
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#include <libopencm3/usb/cdc.h>
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@ -38,8 +40,148 @@
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static char aux_serial_transmit_buffer[2U][TX_BUF_SIZE];
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static uint8_t aux_serial_transmit_buffer_index;
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static uint8_t aux_serial_transmit_buffer_consumed;
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#ifdef DMA_STREAM0
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#define dma_channel_reset(dma, channel) dma_stream_reset(dma, channel)
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#define dma_enable_channel(dma, channel) dma_enable_stream(dma, channel)
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#define dma_disable_channel(dma, channel) dma_disable_stream(dma, channel)
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#define DMA_PSIZE_8BIT DMA_SxCR_PSIZE_8BIT
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#define DMA_MSIZE_8BIT DMA_SxCR_MSIZE_8BIT
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#define DMA_PL_HIGH DMA_SxCR_PL_HIGH
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#define DMA_CGIF DMA_ISR_FLAGS
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#else
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#define DMA_PSIZE_8BIT DMA_CCR_PSIZE_8BIT
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#define DMA_MSIZE_8BIT DMA_CCR_MSIZE_8BIT
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#define DMA_PL_HIGH DMA_CCR_PL_HIGH
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#define DMA_CGIF DMA_IFCR_CGIF_BIT
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#endif
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void aux_serial_init(void)
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{
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/* Enable clocks */
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rcc_periph_clock_enable(USBUSART_CLK);
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rcc_periph_clock_enable(USBUSART_DMA_CLK);
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/* Setup UART parameters */
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UART_PIN_SETUP();
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usart_set_baudrate(USBUSART, 38400);
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usart_set_databits(USBUSART, 8);
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usart_set_stopbits(USBUSART, USART_STOPBITS_1);
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usart_set_mode(USBUSART, USART_MODE_TX_RX);
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usart_set_parity(USBUSART, USART_PARITY_NONE);
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usart_set_flow_control(USBUSART, USART_FLOWCONTROL_NONE);
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USART_CR1(USBUSART) |= USART_CR1_IDLEIE;
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/* Setup USART TX DMA */
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#if !defined(USBUSART_TDR) && defined(USBUSART_DR)
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# define USBUSART_TDR USBUSART_DR
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#elif !defined(USBUSART_TDR)
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# define USBUSART_TDR USART_DR(USBUSART)
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#endif
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#if !defined(USBUSART_RDR) && defined(USBUSART_DR)
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# define USBUSART_RDR USBUSART_DR
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#elif !defined(USBUSART_RDR)
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# define USBUSART_RDR USART_DR(USBUSART)
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#endif
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dma_channel_reset(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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dma_set_peripheral_address(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, (uint32_t)&USBUSART_TDR);
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dma_enable_memory_increment_mode(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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dma_set_peripheral_size(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_PSIZE_8BIT);
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dma_set_memory_size(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_MSIZE_8BIT);
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dma_set_priority(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_PL_HIGH);
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dma_enable_transfer_complete_interrupt(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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#ifdef DMA_STREAM0
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dma_set_transfer_mode(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_SxCR_DIR_MEM_TO_PERIPHERAL);
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dma_channel_select(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, USBUSART_DMA_TRG);
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dma_set_dma_flow_control(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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dma_enable_direct_mode(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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#else
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dma_set_read_from_memory(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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#endif
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/* Setup USART RX DMA */
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dma_channel_reset(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_set_peripheral_address(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, (uint32_t)&USBUSART_RDR);
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dma_set_memory_address(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, (uint32_t)buf_rx);
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dma_set_number_of_data(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, RX_FIFO_SIZE);
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dma_enable_memory_increment_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_enable_circular_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_set_peripheral_size(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_PSIZE_8BIT);
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dma_set_memory_size(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_MSIZE_8BIT);
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dma_set_priority(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_PL_HIGH);
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dma_enable_half_transfer_interrupt(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_enable_transfer_complete_interrupt(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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#ifdef DMA_STREAM0
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dma_set_transfer_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);
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dma_channel_select(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, USBUSART_DMA_TRG);
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dma_set_dma_flow_control(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_enable_direct_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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#else
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dma_set_read_from_peripheral(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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#endif
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dma_enable_channel(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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/* Enable interrupts */
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nvic_set_priority(USBUSART_IRQ, IRQ_PRI_USBUSART);
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#if defined(USBUSART_DMA_RXTX_IRQ)
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nvic_set_priority(USBUSART_DMA_RXTX_IRQ, IRQ_PRI_USBUSART_DMA);
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#else
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nvic_set_priority(USBUSART_DMA_TX_IRQ, IRQ_PRI_USBUSART_DMA);
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nvic_set_priority(USBUSART_DMA_RX_IRQ, IRQ_PRI_USBUSART_DMA);
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#endif
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nvic_enable_irq(USBUSART_IRQ);
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#if defined(USBUSART_DMA_RXTX_IRQ)
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nvic_enable_irq(USBUSART_DMA_RXTX_IRQ);
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#else
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nvic_enable_irq(USBUSART_DMA_TX_IRQ);
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nvic_enable_irq(USBUSART_DMA_RX_IRQ);
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#endif
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/* Finally enable the USART */
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usart_enable(USBUSART);
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usart_enable_tx_dma(USBUSART);
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usart_enable_rx_dma(USBUSART);
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}
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#elif defined(LM4F)
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static char aux_serial_transmit_buffer[FIFO_SIZE];
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void aux_serial_init(void)
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{
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UART_PIN_SETUP();
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periph_clock_enable(USBUART_CLK);
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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uart_disable(USBUART);
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/* Setup UART parameters. */
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uart_clock_from_sysclk(USBUART);
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uart_set_baudrate(USBUART, 38400);
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uart_set_databits(USBUART, 8);
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uart_set_stopbits(USBUART, 1);
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uart_set_parity(USBUART, UART_PARITY_NONE);
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// Enable FIFO
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uart_enable_fifo(USBUART);
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// Set FIFO interrupt trigger levels to 1/8 full for RX buffer and
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// 7/8 empty (1/8 full) for TX buffer
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uart_set_fifo_trigger_levels(USBUART, UART_FIFO_RX_TRIG_1_8, UART_FIFO_TX_TRIG_7_8);
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uart_clear_interrupt_flag(USBUART, UART_INT_RX | UART_INT_RT);
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/* Enable interrupts */
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uart_enable_interrupts(UART0, UART_INT_RX| UART_INT_RT);
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/* Finally enable the USART. */
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uart_enable(USBUART);
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//nvic_set_priority(USBUSART_IRQ, IRQ_PRI_USBUSART);
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nvic_enable_irq(USBUART_IRQ);
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}
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#endif
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void aux_serial_set_encoding(struct usb_cdc_line_coding *coding)
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@ -18,7 +18,6 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/dma.h>
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@ -34,18 +33,8 @@
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#include "aux_serial.h"
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#ifdef DMA_STREAM0
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#define dma_channel_reset(dma, channel) dma_stream_reset(dma, channel)
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#define dma_enable_channel(dma, channel) dma_enable_stream(dma, channel)
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#define dma_disable_channel(dma, channel) dma_disable_stream(dma, channel)
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#define DMA_PSIZE_8BIT DMA_SxCR_PSIZE_8BIT
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#define DMA_MSIZE_8BIT DMA_SxCR_MSIZE_8BIT
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#define DMA_PL_HIGH DMA_SxCR_PL_HIGH
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#define DMA_CGIF DMA_ISR_FLAGS
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#else
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#define DMA_PSIZE_8BIT DMA_CCR_PSIZE_8BIT
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#define DMA_MSIZE_8BIT DMA_CCR_MSIZE_8BIT
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#define DMA_PL_HIGH DMA_CCR_PL_HIGH
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#define DMA_CGIF DMA_IFCR_CGIF_BIT
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#endif
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@ -89,93 +78,6 @@ void usbuart_set_led_state(uint8_t ledn, bool state)
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}
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}
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void aux_serial_init(void)
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{
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/* Enable clocks */
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rcc_periph_clock_enable(USBUSART_CLK);
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rcc_periph_clock_enable(USBUSART_DMA_CLK);
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/* Setup UART parameters */
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UART_PIN_SETUP();
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usart_set_baudrate(USBUSART, 38400);
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usart_set_databits(USBUSART, 8);
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usart_set_stopbits(USBUSART, USART_STOPBITS_1);
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usart_set_mode(USBUSART, USART_MODE_TX_RX);
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usart_set_parity(USBUSART, USART_PARITY_NONE);
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usart_set_flow_control(USBUSART, USART_FLOWCONTROL_NONE);
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USART_CR1(USBUSART) |= USART_CR1_IDLEIE;
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/* Setup USART TX DMA */
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#if !defined(USBUSART_TDR) && defined(USBUSART_DR)
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# define USBUSART_TDR USBUSART_DR
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#elif !defined(USBUSART_TDR)
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# define USBUSART_TDR USART_DR(USBUSART)
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#endif
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#if !defined(USBUSART_RDR) && defined(USBUSART_DR)
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# define USBUSART_RDR USBUSART_DR
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#elif !defined(USBUSART_RDR)
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# define USBUSART_RDR USART_DR(USBUSART)
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#endif
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dma_channel_reset(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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dma_set_peripheral_address(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, (uint32_t)&USBUSART_TDR);
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dma_enable_memory_increment_mode(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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dma_set_peripheral_size(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_PSIZE_8BIT);
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dma_set_memory_size(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_MSIZE_8BIT);
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dma_set_priority(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_PL_HIGH);
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dma_enable_transfer_complete_interrupt(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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#ifdef DMA_STREAM0
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dma_set_transfer_mode(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, DMA_SxCR_DIR_MEM_TO_PERIPHERAL);
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dma_channel_select(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN, USBUSART_DMA_TRG);
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dma_set_dma_flow_control(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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dma_enable_direct_mode(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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#else
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dma_set_read_from_memory(USBUSART_DMA_BUS, USBUSART_DMA_TX_CHAN);
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#endif
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/* Setup USART RX DMA */
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dma_channel_reset(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_set_peripheral_address(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, (uint32_t)&USBUSART_RDR);
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dma_set_memory_address(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, (uint32_t)buf_rx);
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dma_set_number_of_data(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, RX_FIFO_SIZE);
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dma_enable_memory_increment_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_enable_circular_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_set_peripheral_size(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_PSIZE_8BIT);
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dma_set_memory_size(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_MSIZE_8BIT);
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dma_set_priority(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_PL_HIGH);
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dma_enable_half_transfer_interrupt(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_enable_transfer_complete_interrupt(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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#ifdef DMA_STREAM0
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dma_set_transfer_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);
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dma_channel_select(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN, USBUSART_DMA_TRG);
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dma_set_dma_flow_control(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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dma_enable_direct_mode(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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#else
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dma_set_read_from_peripheral(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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#endif
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dma_enable_channel(USBUSART_DMA_BUS, USBUSART_DMA_RX_CHAN);
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/* Enable interrupts */
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nvic_set_priority(USBUSART_IRQ, IRQ_PRI_USBUSART);
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#if defined(USBUSART_DMA_RXTX_IRQ)
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nvic_set_priority(USBUSART_DMA_RXTX_IRQ, IRQ_PRI_USBUSART_DMA);
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#else
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nvic_set_priority(USBUSART_DMA_TX_IRQ, IRQ_PRI_USBUSART_DMA);
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nvic_set_priority(USBUSART_DMA_RX_IRQ, IRQ_PRI_USBUSART_DMA);
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#endif
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nvic_enable_irq(USBUSART_IRQ);
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#if defined(USBUSART_DMA_RXTX_IRQ)
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nvic_enable_irq(USBUSART_DMA_RXTX_IRQ);
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#else
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nvic_enable_irq(USBUSART_DMA_TX_IRQ);
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nvic_enable_irq(USBUSART_DMA_RX_IRQ);
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#endif
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/* Finally enable the USART */
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usart_enable(USBUSART);
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usart_enable_tx_dma(USBUSART);
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usart_enable_rx_dma(USBUSART);
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}
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#if defined(USART_ICR)
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#define USBUSART_ISR_TEMPLATE(USART, DMA_IRQ) do { \
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nvic_disable_irq(DMA_IRQ); \
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@ -39,43 +39,6 @@ uint8_t buf_rx_in;
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/* Fifo out pointer, writes assumed to be atomic, should be only incremented outside RX ISR */
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uint8_t buf_rx_out;
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void aux_serial_init(void)
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{
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UART_PIN_SETUP();
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periph_clock_enable(USBUART_CLK);
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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uart_disable(USBUART);
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/* Setup UART parameters. */
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uart_clock_from_sysclk(USBUART);
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uart_set_baudrate(USBUART, 38400);
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uart_set_databits(USBUART, 8);
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uart_set_stopbits(USBUART, 1);
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uart_set_parity(USBUART, UART_PARITY_NONE);
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// Enable FIFO
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uart_enable_fifo(USBUART);
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// Set FIFO interrupt trigger levels to 1/8 full for RX buffer and
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// 7/8 empty (1/8 full) for TX buffer
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uart_set_fifo_trigger_levels(USBUART, UART_FIFO_RX_TRIG_1_8, UART_FIFO_TX_TRIG_7_8);
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uart_clear_interrupt_flag(USBUART, UART_INT_RX | UART_INT_RT);
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/* Enable interrupts */
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uart_enable_interrupts(UART0, UART_INT_RX| UART_INT_RT);
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/* Finally enable the USART. */
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uart_enable(USBUART);
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//nvic_set_priority(USBUSART_IRQ, IRQ_PRI_USBUSART);
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nvic_enable_irq(USBUART_IRQ);
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}
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/*
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* Read a character from the UART RX and stuff it in a software FIFO.
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* Allowed to read from FIFO out pointer, but not write to it.
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