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Cortexm: Allow pure debug on devices not yet handled for flashing 

- Recognize STM32L552 and MIMXRT10XX
- Fix another PIDR
- Fix bad debug print string.
This commit is contained in:
Uwe Bonnes 2020-10-17 16:24:19 +02:00 committed by UweBonnes
parent 3270138ec2
commit cdd07544d5
3 changed files with 12 additions and 2 deletions
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2
src/platforms/hosted/dap.c
View File

@ -397,7 +397,7 @@ unsigned int dap_read_block(ADIv5_AP_t *ap, void *dest, uint32_t src,
dbg_dap_cmd(buf, 1023, 5 + 1); dbg_dap_cmd(buf, 1023, 5 + 1);
unsigned int transferred = buf[0] + (buf[1] << 8); unsigned int transferred = buf[0] + (buf[1] << 8);
if (buf[2] >= DAP_TRANSFER_FAULT) { if (buf[2] >= DAP_TRANSFER_FAULT) {
DEBUG_WARN("dap_read_block @ %08 "PRIx32 " fault -> line reset\n", src); DEBUG_WARN("dap_read_block @ %08" PRIx32 " fault -> line reset\n", src);
dap_line_reset(); dap_line_reset();
} }
if (sz != transferred) { if (sz != transferred) {

2
src/target/adiv5.c
View File

@ -218,7 +218,7 @@ static const struct {
{0x924, 0x13, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M3 ETM", "(Embedded Trace)")}, {0x924, 0x13, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M3 ETM", "(Embedded Trace)")},
{0x925, 0x13, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M4 ETM", "(Embedded Trace)")}, {0x925, 0x13, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M4 ETM", "(Embedded Trace)")},
{0x930, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-R4 ETM", "(Embedded Trace)")}, {0x930, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-R4 ETM", "(Embedded Trace)")},
{0x932, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight MTB-M0+", "(Simple Execution Trace)")}, {0x932, 0x31, 0x0a31, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight MTB-M0+", "(Simple Execution Trace)")},
{0x941, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight TPIU-Lite", "(Trace Port Interface Unit)")}, {0x941, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight TPIU-Lite", "(Trace Port Interface Unit)")},
{0x950, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight Component", "(unidentified Cortex-A9 component)")}, {0x950, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight Component", "(unidentified Cortex-A9 component)")},
{0x955, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight Component", "(unidentified Cortex-A5 component)")}, {0x955, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight Component", "(unidentified Cortex-A5 component)")},

10
src/target/cortexm.c
View File

@ -379,6 +379,10 @@ bool cortexm_probe(ADIv5_AP_t *ap)
switch (ap->ap_designer) { switch (ap->ap_designer) {
case AP_DESIGNER_FREESCALE: case AP_DESIGNER_FREESCALE:
PROBE(kinetis_probe); PROBE(kinetis_probe);
if (ap->ap_partno == 0x88c) {
t->driver = "MIMXRT10xx(no flash)";
target_halt_resume(t, 0);
}
break; break;
case AP_DESIGNER_STM: case AP_DESIGNER_STM:
PROBE(stm32f1_probe); PROBE(stm32f1_probe);
@ -386,6 +390,10 @@ bool cortexm_probe(ADIv5_AP_t *ap)
PROBE(stm32h7_probe); PROBE(stm32h7_probe);
PROBE(stm32l0_probe); PROBE(stm32l0_probe);
PROBE(stm32l4_probe); PROBE(stm32l4_probe);
if (ap->ap_partno == 0x472) {
t->driver = "STM32L552(no flash)";
target_halt_resume(t, 0);
}
break; break;
case AP_DESIGNER_CYPRESS: case AP_DESIGNER_CYPRESS:
DEBUG_WARN("Unhandled Cypress device\n"); DEBUG_WARN("Unhandled Cypress device\n");
@ -432,6 +440,8 @@ bool cortexm_probe(ADIv5_AP_t *ap)
PROBE(lpc17xx_probe); PROBE(lpc17xx_probe);
} }
#undef PROBE #undef PROBE
/* Restart the CortexM we stopped for Romtable scan. Allow pure debug.*/
target_halt_resume(t, 0);
return true; return true;
} }