Cortexm: Allow pure debug on devices not yet handled for flashing
- Recognize STM32L552 and MIMXRT10XX - Fix another PIDR - Fix bad debug print string.
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3270138ec2
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cdd07544d5
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@ -218,7 +218,7 @@ static const struct {
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{0x924, 0x13, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M3 ETM", "(Embedded Trace)")},
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{0x925, 0x13, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M4 ETM", "(Embedded Trace)")},
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{0x930, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-R4 ETM", "(Embedded Trace)")},
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{0x932, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight MTB-M0+", "(Simple Execution Trace)")},
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{0x932, 0x31, 0x0a31, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight MTB-M0+", "(Simple Execution Trace)")},
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{0x941, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight TPIU-Lite", "(Trace Port Interface Unit)")},
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{0x950, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight Component", "(unidentified Cortex-A9 component)")},
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{0x955, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight Component", "(unidentified Cortex-A5 component)")},
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@ -379,6 +379,10 @@ bool cortexm_probe(ADIv5_AP_t *ap)
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switch (ap->ap_designer) {
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case AP_DESIGNER_FREESCALE:
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PROBE(kinetis_probe);
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if (ap->ap_partno == 0x88c) {
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t->driver = "MIMXRT10xx(no flash)";
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target_halt_resume(t, 0);
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}
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break;
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case AP_DESIGNER_STM:
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PROBE(stm32f1_probe);
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@ -386,6 +390,10 @@ bool cortexm_probe(ADIv5_AP_t *ap)
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PROBE(stm32h7_probe);
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PROBE(stm32l0_probe);
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PROBE(stm32l4_probe);
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if (ap->ap_partno == 0x472) {
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t->driver = "STM32L552(no flash)";
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target_halt_resume(t, 0);
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}
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break;
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case AP_DESIGNER_CYPRESS:
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DEBUG_WARN("Unhandled Cypress device\n");
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@ -432,6 +440,8 @@ bool cortexm_probe(ADIv5_AP_t *ap)
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PROBE(lpc17xx_probe);
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}
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#undef PROBE
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/* Restart the CortexM we stopped for Romtable scan. Allow pure debug.*/
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target_halt_resume(t, 0);
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return true;
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}
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